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df90a14
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ace16dc
CUDA: fix crash on large batch size for quant. MoE (llama/13537)
Browse files
ggml/src/ggml-cuda/mmq.cu
CHANGED
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@@ -122,6 +122,7 @@ void ggml_cuda_mul_mat_q(
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const int64_t s13 = src1->nb[3] / ts_src1;
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quantize_mmq_q8_1_cuda(src1_d, nullptr, src1_q8_1.get(), src0->type,
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ne10, s11, s12, s13, ne10_padded, ne11, ne12, ne13, stream);
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}
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const int64_t s12 = ne11*ne10_padded * sizeof(block_q8_1)/(QK8_1*sizeof(int));
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@@ -205,6 +206,7 @@ void ggml_cuda_mul_mat_q(
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const int64_t s13 = src1->nb[2] / ts_src1;
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quantize_mmq_q8_1_cuda(src1_d, ids_src1_dev, src1_q8_1.get(), src0->type,
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ne10, s11, s12, s13, ne10_padded, ne11_flat, ne12_flat, ne13_flat, stream);
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}
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const int64_t s12 = ne11*ne10_padded * sizeof(block_q8_1)/(QK8_1*sizeof(int));
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const int64_t s13 = src1->nb[3] / ts_src1;
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quantize_mmq_q8_1_cuda(src1_d, nullptr, src1_q8_1.get(), src0->type,
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ne10, s11, s12, s13, ne10_padded, ne11, ne12, ne13, stream);
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+
CUDA_CHECK(cudaGetLastError());
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}
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const int64_t s12 = ne11*ne10_padded * sizeof(block_q8_1)/(QK8_1*sizeof(int));
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const int64_t s13 = src1->nb[2] / ts_src1;
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quantize_mmq_q8_1_cuda(src1_d, ids_src1_dev, src1_q8_1.get(), src0->type,
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ne10, s11, s12, s13, ne10_padded, ne11_flat, ne12_flat, ne13_flat, stream);
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+
CUDA_CHECK(cudaGetLastError());
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}
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const int64_t s12 = ne11*ne10_padded * sizeof(block_q8_1)/(QK8_1*sizeof(int));
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ggml/src/ggml-cuda/quantize.cu
CHANGED
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@@ -56,13 +56,13 @@ static __global__ void quantize_mmq_q8_1(
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constexpr int vals_per_scale = ds_layout == MMQ_Q8_1_DS_LAYOUT_D2S6 ? 64 : 32;
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constexpr int vals_per_sum = ds_layout == MMQ_Q8_1_DS_LAYOUT_D2S6 ? 16 : 32;
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-
const int64_t i0 = ((int64_t)blockDim.x*blockIdx.
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if (i0 >= ne0) {
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return;
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}
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-
const int64_t i1 = blockIdx.
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const int64_t i2 = blockIdx.z % ne2;
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const int64_t i3 = blockIdx.z / ne2;
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@@ -75,8 +75,8 @@ static __global__ void quantize_mmq_q8_1(
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block_q8_1_mmq * y = (block_q8_1_mmq *) vy;
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-
const int64_t ib0 = blockIdx.z*((int64_t)gridDim.
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const int64_t ib = ib0 + (i0 / (4*QK8_1))*ne1 + blockIdx.
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const int64_t iqs = i0 % (4*QK8_1); // quant index in block
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// Load 4 floats per thread and calculate max. abs. value between them:
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@@ -166,8 +166,9 @@ void quantize_mmq_q8_1_cuda(
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GGML_ASSERT(ne00 % 4 == 0);
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GGML_ASSERT(ne0 % (4*QK8_1) == 0);
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-
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-
const
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const dim3 block_size(CUDA_QUANTIZE_BLOCK_SIZE_MMQ, 1, 1);
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switch (mmq_get_q8_1_ds_layout(type_src0)) {
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case MMQ_Q8_1_DS_LAYOUT_D4:
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constexpr int vals_per_scale = ds_layout == MMQ_Q8_1_DS_LAYOUT_D2S6 ? 64 : 32;
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constexpr int vals_per_sum = ds_layout == MMQ_Q8_1_DS_LAYOUT_D2S6 ? 16 : 32;
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const int64_t i0 = ((int64_t)blockDim.x*blockIdx.y + threadIdx.x)*4;
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if (i0 >= ne0) {
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return;
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}
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+
const int64_t i1 = blockIdx.x;
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const int64_t i2 = blockIdx.z % ne2;
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const int64_t i3 = blockIdx.z / ne2;
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block_q8_1_mmq * y = (block_q8_1_mmq *) vy;
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const int64_t ib0 = blockIdx.z*((int64_t)gridDim.x*gridDim.y*blockDim.x/QK8_1); // first block of channel
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const int64_t ib = ib0 + (i0 / (4*QK8_1))*ne1 + blockIdx.x; // block index in channel
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const int64_t iqs = i0 % (4*QK8_1); // quant index in block
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// Load 4 floats per thread and calculate max. abs. value between them:
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GGML_ASSERT(ne00 % 4 == 0);
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GGML_ASSERT(ne0 % (4*QK8_1) == 0);
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// ne1 tends to assume the highest values, therefore use it as the "x" dimension of the CUDA grid:
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const int64_t block_num_y = (ne0 + 4*CUDA_QUANTIZE_BLOCK_SIZE_MMQ - 1) / (4*CUDA_QUANTIZE_BLOCK_SIZE_MMQ);
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const dim3 num_blocks(ne1, block_num_y, ne2*ne3);
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const dim3 block_size(CUDA_QUANTIZE_BLOCK_SIZE_MMQ, 1, 1);
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switch (mmq_get_q8_1_ds_layout(type_src0)) {
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case MMQ_Q8_1_DS_LAYOUT_D4:
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