static int audio_decode_frame(VideoState *is) { AVPacket *pkt_temp = &is->audio_pkt_temp; AVPacket *pkt = &is->audio_pkt; AVCodecContext *dec = is->audio_st->codec; int len1, data_size, resampled_data_size; int64_t dec_channel_layout; int got_frame; av_unused double audio_clock0; int new_packet = 0; int flush_complete = 0; int wanted_nb_samples; AVRational tb; int ret; int reconfigure; for (;;) { /* NOTE: the audio packet can contain several frames */ while (pkt_temp->size > 0 || (!pkt_temp->data && new_packet) || is->audio_buf_frames_pending) { if (!is->frame) { if (!(is->frame = avcodec_alloc_frame())) return AVERROR(ENOMEM); } else { av_frame_unref(is->frame); avcodec_get_frame_defaults(is->frame); } if (is->audioq.serial != is->audio_pkt_temp_serial) break; if (is->paused) return -1; if (!is->audio_buf_frames_pending) { if (flush_complete) break; new_packet = 0; len1 = avcodec_decode_audio4(dec, is->frame, &got_frame, pkt_temp); if (len1 < 0) { /* if error, we skip the frame */ pkt_temp->size = 0; break; } pkt_temp->data += len1; pkt_temp->size -= len1; if (!got_frame) { /* stop sending empty packets if the decoder is finished */ if (!pkt_temp->data && dec->codec->capabilities & CODEC_CAP_DELAY) flush_complete = 1; continue; } tb = (AVRational){1, is->frame->sample_rate}; if (is->frame->pts != AV_NOPTS_VALUE) is->frame->pts = av_rescale_q(is->frame->pts, dec->time_base, tb); else if (is->frame->pkt_pts != AV_NOPTS_VALUE) is->frame->pts = av_rescale_q(is->frame->pkt_pts, is->audio_st->time_base, tb); if (pkt_temp->pts != AV_NOPTS_VALUE) pkt_temp->pts += (double) is->frame->nb_samples / is->frame->sample_rate / av_q2d(is->audio_st->time_base); #if CONFIG_AVFILTER dec_channel_layout = get_valid_channel_layout(is->frame->channel_layout, av_frame_get_channels(is->frame)); reconfigure = cmp_audio_fmts(is->audio_filter_src.fmt, is->audio_filter_src.channels, is->frame->format, av_frame_get_channels(is->frame)) || is->audio_filter_src.channel_layout != dec_channel_layout || is->audio_filter_src.freq != is->frame->sample_rate || is->audio_pkt_temp_serial != is->audio_last_serial; if (reconfigure) { char buf1[1024], buf2[1024]; av_get_channel_layout_string(buf1, sizeof(buf1), -1, is->audio_filter_src.channel_layout); av_get_channel_layout_string(buf2, sizeof(buf2), -1, dec_channel_layout); av_log(NULL, AV_LOG_DEBUG, "Audio frame changed from rate:%d ch:%d fmt:%s layout:%s serial:%d to rate:%d ch:%d fmt:%s layout:%s serial:%d\n", is->audio_filter_src.freq, is->audio_filter_src.channels, av_get_sample_fmt_name(is->audio_filter_src.fmt), buf1, is->audio_last_serial, is->frame->sample_rate, av_frame_get_channels(is->frame), av_get_sample_fmt_name(is->frame->format), buf2, is->audio_pkt_temp_serial); is->audio_filter_src.fmt = is->frame->format; is->audio_filter_src.channels = av_frame_get_channels(is->frame); is->audio_filter_src.channel_layout = dec_channel_layout; is->audio_filter_src.freq = is->frame->sample_rate; is->audio_last_serial = is->audio_pkt_temp_serial; if ((ret = configure_audio_filters(is, afilters, 1)) < 0) return ret; } if ((ret = av_buffersrc_add_frame(is->in_audio_filter, is->frame)) < 0) return ret; av_frame_unref(is->frame); #endif } #if CONFIG_AVFILTER if ((ret = av_buffersink_get_frame_flags(is->out_audio_filter, is->frame, 0)) < 0) { if (ret == AVERROR(EAGAIN)) { is->audio_buf_frames_pending = 0; continue; } return ret; } is->audio_buf_frames_pending = 1; tb = is->out_audio_filter->inputs[0]->time_base; #endif data_size = av_samples_get_buffer_size(NULL, av_frame_get_channels(is->frame), is->frame->nb_samples, is->frame->format, 1); dec_channel_layout = (is->frame->channel_layout && av_frame_get_channels(is->frame) == av_get_channel_layout_nb_channels(is->frame->channel_layout)) ? is->frame->channel_layout : av_get_default_channel_layout(av_frame_get_channels(is->frame)); wanted_nb_samples = synchronize_audio(is, is->frame->nb_samples); if (is->frame->format != is->audio_src.fmt || dec_channel_layout != is->audio_src.channel_layout || is->frame->sample_rate != is->audio_src.freq || (wanted_nb_samples != is->frame->nb_samples && !is->swr_ctx)) { swr_free(&is->swr_ctx); is->swr_ctx = swr_alloc_set_opts(NULL, is->audio_tgt.channel_layout, is->audio_tgt.fmt, is->audio_tgt.freq, dec_channel_layout, is->frame->format, is->frame->sample_rate, 0, NULL); if (!is->swr_ctx || swr_init(is->swr_ctx) < 0) { av_log(NULL, AV_LOG_ERROR, "Cannot create sample rate converter for conversion of %d Hz %s %d channels to %d Hz %s %d channels!\n", is->frame->sample_rate, av_get_sample_fmt_name(is->frame->format), av_frame_get_channels(is->frame), is->audio_tgt.freq, av_get_sample_fmt_name(is->audio_tgt.fmt), is->audio_tgt.channels); break; } is->audio_src.channel_layout = dec_channel_layout; is->audio_src.channels = av_frame_get_channels(is->frame); is->audio_src.freq = is->frame->sample_rate; is->audio_src.fmt = is->frame->format; } if (is->swr_ctx) { const uint8_t **in = (const uint8_t **)is->frame->extended_data; uint8_t **out = &is->audio_buf1; int out_count = (int64_t)wanted_nb_samples * is->audio_tgt.freq / is->frame->sample_rate + 256; int out_size = av_samples_get_buffer_size(NULL, is->audio_tgt.channels, out_count, is->audio_tgt.fmt, 0); int len2; if (out_size < 0) { av_log(NULL, AV_LOG_ERROR, "av_samples_get_buffer_size() failed\n"); break; } if (wanted_nb_samples != is->frame->nb_samples) { if (swr_set_compensation(is->swr_ctx, (wanted_nb_samples - is->frame->nb_samples) * is->audio_tgt.freq / is->frame->sample_rate, wanted_nb_samples * is->audio_tgt.freq / is->frame->sample_rate) < 0) { av_log(NULL, AV_LOG_ERROR, "swr_set_compensation() failed\n"); break; } } av_fast_malloc(&is->audio_buf1, &is->audio_buf1_size, out_size); if (!is->audio_buf1) return AVERROR(ENOMEM); len2 = swr_convert(is->swr_ctx, out, out_count, in, is->frame->nb_samples); if (len2 < 0) { av_log(NULL, AV_LOG_ERROR, "swr_convert() failed\n"); break; } if (len2 == out_count) { av_log(NULL, AV_LOG_WARNING, "audio buffer is probably too small\n"); swr_init(is->swr_ctx); } is->audio_buf = is->audio_buf1; resampled_data_size = len2 * is->audio_tgt.channels * av_get_bytes_per_sample(is->audio_tgt.fmt); } else { is->audio_buf = is->frame->data[0]; resampled_data_size = data_size; } audio_clock0 = is->audio_clock; /* update the audio clock with the pts */ if (is->frame->pts != AV_NOPTS_VALUE) is->audio_clock = is->frame->pts * av_q2d(tb) + (double) is->frame->nb_samples / is->frame->sample_rate; else is->audio_clock = NAN; is->audio_clock_serial = is->audio_pkt_temp_serial; #ifdef DEBUG { static double last_clock; printf("audio: delay=%0.3f clock=%0.3f clock0=%0.3f\n", is->audio_clock - last_clock, is->audio_clock, audio_clock0); last_clock = is->audio_clock; } #endif return resampled_data_size; } /* free the current packet */ if (pkt->data) av_free_packet(pkt); memset(pkt_temp, 0, sizeof(*pkt_temp)); if (is->audioq.abort_request) { return -1; } if (is->audioq.nb_packets == 0) SDL_CondSignal(is->continue_read_thread); /* read next packet */ if ((new_packet = packet_queue_get(&is->audioq, pkt, 1, &is->audio_pkt_temp_serial)) < 0) return -1; if (pkt->data == flush_pkt.data) { avcodec_flush_buffers(dec); flush_complete = 0; is->audio_buf_frames_pending = 0; } *pkt_temp = *pkt; } }


static hwaddr ppc_hash64_pte_raddr(ppc_slb_t *slb, ppc_hash_pte64_t pte, target_ulong eaddr) { hwaddr mask; int target_page_bits; hwaddr rpn = pte.pte1 & HPTE64_R_RPN; /* * We support 4K, 64K and 16M now */ target_page_bits = ppc_hash64_page_shift(slb); mask = (1ULL << target_page_bits) - 1; return (rpn & ~mask) | (eaddr & mask); }


static void nfs_file_close(BlockDriverState *bs) { NFSClient *client = bs->opaque; nfs_client_close(client); qemu_mutex_destroy(&client->mutex); }


static int mp3_seek(AVFormatContext *s, int stream_index, int64_t timestamp, int flags) { MP3Context *mp3 = s->priv_data; AVIndexEntry *ie; AVStream *st = s->streams[0]; int64_t ret = av_index_search_timestamp(st, timestamp, flags); uint32_t header = 0; if (!mp3->xing_toc) { st->skip_samples = timestamp <= 0 ? mp3->start_pad + 528 + 1 : 0; return -1; } if (ret < 0) return ret; ie = &st->index_entries[ret]; ret = avio_seek(s->pb, ie->pos, SEEK_SET); if (ret < 0) return ret; while (!s->pb->eof_reached) { header = (header << 8) + avio_r8(s->pb); if (ff_mpa_check_header(header) >= 0) { ff_update_cur_dts(s, st, ie->timestamp); ret = avio_seek(s->pb, -4, SEEK_CUR); st->skip_samples = ie->timestamp <= 0 ? mp3->start_pad + 528 + 1 : 0; return (ret >= 0) ? 0 : ret; } } return AVERROR_EOF; }


static void test_bmdma_no_busmaster(void) { QPCIDevice *dev; void *bmdma_base, *ide_base; uint8_t status; dev = get_pci_device(&bmdma_base, &ide_base); /* No PRDT_EOT, each entry addr 0/size 64k, and in theory qemu shouldn't be * able to access it anyway because the Bus Master bit in the PCI command * register isn't set. This is complete nonsense, but it used to be pretty * good at confusing and occasionally crashing qemu. */ PrdtEntry prdt[4096] = { }; status = send_dma_request(CMD_READ_DMA | CMDF_NO_BM, 0, 512, prdt, ARRAY_SIZE(prdt), NULL); /* Not entirely clear what the expected result is, but this is what we get * in practice. At least we want to be aware of any changes. */ g_assert_cmphex(status, ==, BM_STS_ACTIVE | BM_STS_INTR); assert_bit_clear(qpci_io_readb(dev, ide_base + reg_status), DF | ERR); }


static int configure_output_video_filter(FilterGraph *fg, OutputFilter *ofilter, AVFilterInOut *out) { char *pix_fmts; OutputStream *ost = ofilter->ost; AVCodecContext *codec = ost->st->codec; AVFilterContext *last_filter = out->filter_ctx; int pad_idx = out->pad_idx; int ret; char name[255]; snprintf(name, sizeof(name), "output stream %d:%d", ost->file_index, ost->index); ret = avfilter_graph_create_filter(&ofilter->filter, avfilter_get_by_name("buffersink"), name, NULL, pix_fmts, fg->graph); if (ret < 0) return ret; if (codec->width || codec->height) { char args[255]; AVFilterContext *filter; snprintf(args, sizeof(args), "%d:%d:flags=0x%X", codec->width, codec->height, (unsigned)ost->sws_flags); snprintf(name, sizeof(name), "scaler for output stream %d:%d", ost->file_index, ost->index); if ((ret = avfilter_graph_create_filter(&filter, avfilter_get_by_name("scale"), name, args, NULL, fg->graph)) < 0) return ret; if ((ret = avfilter_link(last_filter, pad_idx, filter, 0)) < 0) return ret; last_filter = filter; pad_idx = 0; } if ((pix_fmts = choose_pix_fmts(ost))) { AVFilterContext *filter; snprintf(name, sizeof(name), "pixel format for output stream %d:%d", ost->file_index, ost->index); if ((ret = avfilter_graph_create_filter(&filter, avfilter_get_by_name("format"), "format", pix_fmts, NULL, fg->graph)) < 0) return ret; if ((ret = avfilter_link(last_filter, pad_idx, filter, 0)) < 0) return ret; last_filter = filter; pad_idx = 0; av_freep(&pix_fmts); } if (ost->frame_rate.num) { AVFilterContext *fps; char args[255]; snprintf(args, sizeof(args), "fps=%d/%d", ost->frame_rate.num, ost->frame_rate.den); snprintf(name, sizeof(name), "fps for output stream %d:%d", ost->file_index, ost->index); ret = avfilter_graph_create_filter(&fps, avfilter_get_by_name("fps"), name, args, NULL, fg->graph); if (ret < 0) return ret; ret = avfilter_link(last_filter, pad_idx, fps, 0); if (ret < 0) return ret; last_filter = fps; pad_idx = 0; } if ((ret = avfilter_link(last_filter, pad_idx, ofilter->filter, 0)) < 0) return ret; return 0; }


static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, int is_write, sigset_t *old_set) { CPUState *cpu = current_cpu; CPUClass *cc; int ret; unsigned long address = (unsigned long)info->si_addr; /* We must handle PC addresses from two different sources: * a call return address and a signal frame address. * * Within cpu_restore_state_from_tb we assume the former and adjust * the address by -GETPC_ADJ so that the address is within the call * insn so that addr does not accidentally match the beginning of the * next guest insn. * * However, when the PC comes from the signal frame, it points to * the actual faulting host insn and not a call insn. Subtracting * GETPC_ADJ in that case may accidentally match the previous guest insn. * * So for the later case, adjust forward to compensate for what * will be done later by cpu_restore_state_from_tb. */ if (helper_retaddr) { pc = helper_retaddr; } else { pc += GETPC_ADJ; } /* For synchronous signals we expect to be coming from the vCPU * thread (so current_cpu should be valid) and either from running * code or during translation which can fault as we cross pages. * * If neither is true then something has gone wrong and we should * abort rather than try and restart the vCPU execution. */ if (!cpu || !cpu->running) { printf("qemu:%s received signal outside vCPU context @ pc=0x%" PRIxPTR "\n", __func__, pc); abort(); } #if defined(DEBUG_SIGNAL) printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", pc, address, is_write, *(unsigned long *)old_set); #endif /* XXX: locking issue */ if (is_write && h2g_valid(address)) { switch (page_unprotect(h2g(address), pc)) { case 0: /* Fault not caused by a page marked unwritable to protect * cached translations, must be the guest binary's problem. */ break; case 1: /* Fault caused by protection of cached translation; TBs * invalidated, so resume execution. Retain helper_retaddr * for a possible second fault. */ return 1; case 2: /* Fault caused by protection of cached translation, and the * currently executing TB was modified and must be exited * immediately. Clear helper_retaddr for next execution. */ helper_retaddr = 0; cpu_exit_tb_from_sighandler(cpu, old_set); /* NORETURN */ default: g_assert_not_reached(); } } /* Convert forcefully to guest address space, invalid addresses are still valid segv ones */ address = h2g_nocheck(address); cc = CPU_GET_CLASS(cpu); /* see if it is an MMU fault */ g_assert(cc->handle_mmu_fault); ret = cc->handle_mmu_fault(cpu, address, is_write, MMU_USER_IDX); if (ret == 0) { /* The MMU fault was handled without causing real CPU fault. * Retain helper_retaddr for a possible second fault. */ return 1; } /* All other paths lead to cpu_exit; clear helper_retaddr * for next execution. */ helper_retaddr = 0; if (ret < 0) { return 0; /* not an MMU fault */ } /* Now we have a real cpu fault. */ cpu_restore_state(cpu, pc); sigprocmask(SIG_SETMASK, old_set, NULL); cpu_loop_exit(cpu); /* never comes here */ return 1; }


static void vc1_sprite_flush(AVCodecContext *avctx) { VC1Context *v = avctx->priv_data; MpegEncContext *s = &v->s; AVFrame *f = &s->current_picture.f; int plane, i; /* Windows Media Image codecs have a convergence interval of two keyframes. Since we can't enforce it, clear to black the missing sprite. This is wrong but it looks better than doing nothing. */ if (f->data[0]) for (plane = 0; plane < (s->flags&CODEC_FLAG_GRAY ? 1 : 3); plane++) for (i = 0; i < v->sprite_height>>!!plane; i++) memset(f->data[plane] + i * f->linesize[plane], plane ? 128 : 0, f->linesize[plane]); }


static int process_command(AVFilterContext *ctx, const char *cmd, const char *args, char *res, int res_len, int flags) { OverlayContext *over = ctx->priv; int ret; if (!strcmp(cmd, "x")) ret = set_expr(&over->x_pexpr, args, ctx); else if (!strcmp(cmd, "y")) ret = set_expr(&over->y_pexpr, args, ctx); else if (!strcmp(cmd, "enable")) ret = set_expr(&over->enable_pexpr, args, ctx); else ret = AVERROR(ENOSYS); if (ret < 0) return ret; if (over->eval_mode == EVAL_MODE_INIT) { eval_expr(ctx, EVAL_ALL); av_log(ctx, AV_LOG_VERBOSE, "x:%f xi:%d y:%f yi:%d enable:%f\n", over->var_values[VAR_X], over->x, over->var_values[VAR_Y], over->y, over->enable); } return ret; }


static int rv20_decode_picture_header(RVDecContext *rv) { MpegEncContext *s = &rv->m; int seq, mb_pos, i; int rpr_bits; #if 0 GetBitContext gb= s->gb; for(i=0; i<64; i++){ av_log(s->avctx, AV_LOG_DEBUG, "%d", get_bits1(&gb)); if(i%4==3) av_log(s->avctx, AV_LOG_DEBUG, " "); } av_log(s->avctx, AV_LOG_DEBUG, "\n"); #endif #if 0 av_log(s->avctx, AV_LOG_DEBUG, "%3dx%03d/%02Xx%02X ", s->width, s->height, s->width/4, s->height/4); for(i=0; i<s->avctx->extradata_size; i++){ av_log(s->avctx, AV_LOG_DEBUG, "%02X ", ((uint8_t*)s->avctx->extradata)[i]); if(i%4==3) av_log(s->avctx, AV_LOG_DEBUG, " "); } av_log(s->avctx, AV_LOG_DEBUG, "\n"); #endif i= get_bits(&s->gb, 2); switch(i){ case 0: s->pict_type= AV_PICTURE_TYPE_I; break; case 1: s->pict_type= AV_PICTURE_TYPE_I; break; //hmm ... case 2: s->pict_type= AV_PICTURE_TYPE_P; break; case 3: s->pict_type= AV_PICTURE_TYPE_B; break; default: av_log(s->avctx, AV_LOG_ERROR, "unknown frame type\n"); return -1; } if(s->low_delay && s->pict_type==AV_PICTURE_TYPE_B){ av_log(s->avctx, AV_LOG_ERROR, "low delay B\n"); return -1; } if(s->last_picture_ptr==NULL && s->pict_type==AV_PICTURE_TYPE_B){ av_log(s->avctx, AV_LOG_ERROR, "early B pix\n"); return -1; } if (get_bits1(&s->gb)){ av_log(s->avctx, AV_LOG_ERROR, "reserved bit set\n"); return -1; } s->qscale = get_bits(&s->gb, 5); if(s->qscale==0){ av_log(s->avctx, AV_LOG_ERROR, "error, qscale:0\n"); return -1; } if(RV_GET_MINOR_VER(rv->sub_id) >= 2) s->loop_filter = get_bits1(&s->gb) && !s->avctx->lowres; if(RV_GET_MINOR_VER(rv->sub_id) <= 1) seq = get_bits(&s->gb, 8) << 7; else seq = get_bits(&s->gb, 13) << 2; rpr_bits = s->avctx->extradata[1] & 7; if(rpr_bits){ int f, new_w, new_h; rpr_bits = FFMIN((rpr_bits >> 1) + 1, 3); f = get_bits(&s->gb, rpr_bits); if(f){ new_w= 4*((uint8_t*)s->avctx->extradata)[6+2*f]; new_h= 4*((uint8_t*)s->avctx->extradata)[7+2*f]; }else{ new_w= s->orig_width ; new_h= s->orig_height; } if(new_w != s->width || new_h != s->height){ AVRational old_aspect = s->avctx->sample_aspect_ratio; av_log(s->avctx, AV_LOG_DEBUG, "attempting to change resolution to %dx%d\n", new_w, new_h); if (av_image_check_size(new_w, new_h, 0, s->avctx) < 0) return -1; ff_MPV_common_end(s); // attempt to keep aspect during typical resolution switches if (!old_aspect.num) old_aspect = (AVRational){1, 1}; if (2 * new_w * s->height == new_h * s->width) s->avctx->sample_aspect_ratio = av_mul_q(old_aspect, (AVRational){2, 1}); if (new_w * s->height == 2 * new_h * s->width) s->avctx->sample_aspect_ratio = av_mul_q(old_aspect, (AVRational){1, 2}); avcodec_set_dimensions(s->avctx, new_w, new_h); s->width = new_w; s->height = new_h; if (ff_MPV_common_init(s) < 0) return -1; } if(s->avctx->debug & FF_DEBUG_PICT_INFO){ av_log(s->avctx, AV_LOG_DEBUG, "F %d/%d\n", f, rpr_bits); } } if (av_image_check_size(s->width, s->height, 0, s->avctx) < 0) return AVERROR_INVALIDDATA; mb_pos = ff_h263_decode_mba(s); seq |= s->time &~0x7FFF; if(seq - s->time > 0x4000) seq -= 0x8000; if(seq - s->time < -0x4000) seq += 0x8000; if(seq != s->time){ if(s->pict_type!=AV_PICTURE_TYPE_B){ s->time= seq; s->pp_time= s->time - s->last_non_b_time; s->last_non_b_time= s->time; }else{ s->time= seq; s->pb_time= s->pp_time - (s->last_non_b_time - s->time); if(s->pp_time <=s->pb_time || s->pp_time <= s->pp_time - s->pb_time || s->pp_time<=0){ av_log(s->avctx, AV_LOG_DEBUG, "messed up order, possible from seeking? skipping current b frame\n"); return FRAME_SKIPPED; } ff_mpeg4_init_direct_mv(s); } } s->no_rounding= get_bits1(&s->gb); if(RV_GET_MINOR_VER(rv->sub_id) <= 1 && s->pict_type == AV_PICTURE_TYPE_B) skip_bits(&s->gb, 5); // binary decoder reads 3+2 bits here but they don't seem to be used s->f_code = 1; s->unrestricted_mv = 1; s->h263_aic= s->pict_type == AV_PICTURE_TYPE_I; // s->alt_inter_vlc=1; // s->obmc=1; // s->umvplus=1; s->modified_quant=1; if(!s->avctx->lowres) s->loop_filter=1; if(s->avctx->debug & FF_DEBUG_PICT_INFO){ av_log(s->avctx, AV_LOG_INFO, "num:%5d x:%2d y:%2d type:%d qscale:%2d rnd:%d\n", seq, s->mb_x, s->mb_y, s->pict_type, s->qscale, s->no_rounding); } av_assert0(s->pict_type != AV_PICTURE_TYPE_B || !s->low_delay); return s->mb_width*s->mb_height - mb_pos; }


void qio_channel_test_validate(QIOChannelTest *test) { g_assert_cmpint(memcmp(test->input, test->output, test->len), ==, 0); g_assert(test->readerr == NULL); g_assert(test->writeerr == NULL); g_free(test->inputv); g_free(test->outputv); g_free(test->input); g_free(test->output); g_free(test); }


static void vapic_map_rom_writable(VAPICROMState *s) { hwaddr rom_paddr = s->rom_state_paddr & ROM_BLOCK_MASK; MemoryRegionSection section; MemoryRegion *as; size_t rom_size; uint8_t *ram; as = sysbus_address_space(&s->busdev); if (s->rom_mapped_writable) { memory_region_del_subregion(as, &s->rom); memory_region_destroy(&s->rom); } /* grab RAM memory region (region @rom_paddr may still be pc.rom) */ section = memory_region_find(as, 0, 1); /* read ROM size from RAM region */ ram = memory_region_get_ram_ptr(section.mr); rom_size = ram[rom_paddr + 2] * ROM_BLOCK_SIZE; s->rom_size = rom_size; /* We need to round to avoid creating subpages * from which we cannot run code. */ rom_size += rom_paddr & ~TARGET_PAGE_MASK; rom_paddr &= TARGET_PAGE_MASK; rom_size = TARGET_PAGE_ALIGN(rom_size); memory_region_init_alias(&s->rom, OBJECT(s), "kvmvapic-rom", section.mr, rom_paddr, rom_size); memory_region_add_subregion_overlap(as, rom_paddr, &s->rom, 1000); s->rom_mapped_writable = true; memory_region_unref(section.mr); }


static int handle_intercept(S390CPU *cpu) { CPUState *cs = CPU(cpu); struct kvm_run *run = cs->kvm_run; int icpt_code = run->s390_sieic.icptcode; int r = 0; DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, (long)cs->kvm_run->psw_addr); switch (icpt_code) { case ICPT_INSTRUCTION: r = handle_instruction(cpu, run); break; case ICPT_WAITPSW: /* disabled wait, since enabled wait is handled in kernel */ if (s390_del_running_cpu(cpu) == 0) { if (is_special_wait_psw(cs)) { qemu_system_shutdown_request(); } else { QObject *data; data = qobject_from_jsonf("{ 'action': %s }", "pause"); monitor_protocol_event(QEVENT_GUEST_PANICKED, data); qobject_decref(data); vm_stop(RUN_STATE_GUEST_PANICKED); } } r = EXCP_HALTED; break; case ICPT_CPU_STOP: if (s390_del_running_cpu(cpu) == 0) { qemu_system_shutdown_request(); } r = EXCP_HALTED; break; case ICPT_SOFT_INTERCEPT: fprintf(stderr, "KVM unimplemented icpt SOFT\n"); exit(1); break; case ICPT_IO: fprintf(stderr, "KVM unimplemented icpt IO\n"); exit(1); break; default: fprintf(stderr, "Unknown intercept code: %d\n", icpt_code); exit(1); break; } return r; }


static void dump_op_count(void) { int i; FILE *f; f = fopen("/tmp/op.log", "w"); for(i = INDEX_op_end; i < NB_OPS; i++) { fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]); } fclose(f); }


static void qed_check_for_leaks(QEDCheck *check) { BDRVQEDState *s = check->s; size_t i; for (i = s->header.header_size; i < check->nclusters; i++) { if (!qed_test_bit(check->used_clusters, i)) { check->result->leaks++; } } }


static void test_qemu_strtol_full_max(void) { const char *str = g_strdup_printf("%ld", LONG_MAX); long res; int err; err = qemu_strtol(str, NULL, 0, &res); g_assert_cmpint(err, ==, 0); g_assert_cmpint(res, ==, LONG_MAX); }


char *spapr_get_cpu_core_type(const char *model) { char *core_type; gchar **model_pieces = g_strsplit(model, ",", 2); core_type = g_strdup_printf("%s-%s", model_pieces[0], TYPE_SPAPR_CPU_CORE); g_strfreev(model_pieces); /* Check whether it exists or whether we have to look up an alias name */ if (!object_class_by_name(core_type)) { const char *realmodel; g_free(core_type); realmodel = ppc_cpu_lookup_alias(model); if (realmodel) { return spapr_get_cpu_core_type(realmodel); } return NULL; } return core_type; }


static int get_refcount(BlockDriverState *bs, int64_t cluster_index) { BDRVQcowState *s = bs->opaque; int refcount_table_index, block_index; int64_t refcount_block_offset; int ret; uint16_t *refcount_block; uint16_t refcount; refcount_table_index = cluster_index >> (s->cluster_bits - REFCOUNT_SHIFT); if (refcount_table_index >= s->refcount_table_size) return 0; refcount_block_offset = s->refcount_table[refcount_table_index] & REFT_OFFSET_MASK; if (!refcount_block_offset) return 0; ret = qcow2_cache_get(bs, s->refcount_block_cache, refcount_block_offset, (void**) &refcount_block); if (ret < 0) { return ret; } block_index = cluster_index & ((1 << (s->cluster_bits - REFCOUNT_SHIFT)) - 1); refcount = be16_to_cpu(refcount_block[block_index]); ret = qcow2_cache_put(bs, s->refcount_block_cache, (void**) &refcount_block); if (ret < 0) { return ret; } return refcount; }


static void openpic_irq_raise(OpenPICState *opp, int n_CPU, IRQ_src_t *src) { int n_ci = IDR_CI0_SHIFT - n_CPU; if ((opp->flags & OPENPIC_FLAG_IDE_CRIT) && (src->ide & (1 << n_ci))) { qemu_irq_raise(opp->dst[n_CPU].irqs[OPENPIC_OUTPUT_CINT]); } else { qemu_irq_raise(opp->dst[n_CPU].irqs[OPENPIC_OUTPUT_INT]); } }


static int dx2_decode_slice_420(GetBitContext *gb, AVFrame *frame, int line, int left, uint8_t lru[3][8]) { int x, y; int width = frame->width; int ystride = frame->linesize[0]; int ustride = frame->linesize[1]; int vstride = frame->linesize[2]; uint8_t *Y = frame->data[0] + ystride * line; uint8_t *U = frame->data[1] + (ustride >> 1) * line; uint8_t *V = frame->data[2] + (vstride >> 1) * line; for (y = 0; y < left - 1 && get_bits_left(gb) > 16; y += 2) { for (x = 0; x < width; x += 2) { Y[x + 0 + 0 * ystride] = decode_sym(gb, lru[0]); Y[x + 1 + 0 * ystride] = decode_sym(gb, lru[0]); Y[x + 0 + 1 * ystride] = decode_sym(gb, lru[0]); Y[x + 1 + 1 * ystride] = decode_sym(gb, lru[0]); U[x >> 1] = decode_sym(gb, lru[1]) ^ 0x80; V[x >> 1] = decode_sym(gb, lru[2]) ^ 0x80; } Y += ystride << 1; U += ustride; V += vstride; } return y; }


static inline void RENAME(bgr16ToUV)(uint8_t *dstU, uint8_t *dstV, uint8_t *src1, uint8_t *src2, int width) { int i; assert(src1==src2); for(i=0; i<width; i++) { int d0= ((uint32_t*)src1)[i]; int dl= (d0&0x07E0F81F); int dh= ((d0>>5)&0x07C0F83F); int dh2= (dh>>11) + (dh<<21); int d= dh2 + dl; int b= d&0x7F; int r= (d>>11)&0x7F; int g= d>>21; dstU[i]= ((2*RU*r + GU*g + 2*BU*b)>>(RGB2YUV_SHIFT+1-2)) + 128; dstV[i]= ((2*RV*r + GV*g + 2*BV*b)>>(RGB2YUV_SHIFT+1-2)) + 128; } }


static int file_close_dir(URLContext *h) { #if HAVE_DIRENT_H FileContext *c = h->priv_data; closedir(c->dir); return 0; #else return AVERROR(ENOSYS); #endif /* HAVE_DIRENT_H */ }


static int sdp_read_header(AVFormatContext *s, AVFormatParameters *ap) { RTSPState *rt = s->priv_data; RTSPStream *rtsp_st; int size, i, err; char *content; char url[1024]; /* read the whole sdp file */ /* XXX: better loading */ content = av_malloc(SDP_MAX_SIZE); size = get_buffer(s->pb, content, SDP_MAX_SIZE - 1); if (size <= 0) { av_free(content); return AVERROR_INVALIDDATA; } content[size] ='\0'; sdp_parse(s, content); av_free(content); /* open each RTP stream */ for(i=0;i<rt->nb_rtsp_streams;i++) { rtsp_st = rt->rtsp_streams[i]; snprintf(url, sizeof(url), "rtp://%s:%d?localport=%d&ttl=%d", inet_ntoa(rtsp_st->sdp_ip), rtsp_st->sdp_port, rtsp_st->sdp_port, rtsp_st->sdp_ttl); if (url_open(&rtsp_st->rtp_handle, url, URL_RDWR) < 0) { err = AVERROR_INVALIDDATA; goto fail; } if ((err = rtsp_open_transport_ctx(s, rtsp_st))) goto fail; } return 0; fail: rtsp_close_streams(rt); return err; }


static void ff_h264_idct_add16intra_mmx2(uint8_t *dst, const int *block_offset, DCTELEM *block, int stride, const uint8_t nnzc[6*8]){ int i; for(i=0; i<16; i++){ if(nnzc[ scan8[i] ]) ff_h264_idct_add_mmx (dst + block_offset[i], block + i*16, stride); else if(block[i*16]) ff_h264_idct_dc_add_mmx2(dst + block_offset[i], block + i*16, stride); } }


static void floor_encode(vorbis_enc_context *venc, vorbis_enc_floor *fc, PutBitContext *pb, uint16_t *posts, float *floor, int samples) { int range = 255 / fc->multiplier + 1; int coded[MAX_FLOOR_VALUES]; // first 2 values are unused int i, counter; put_bits(pb, 1, 1); // non zero put_bits(pb, ilog(range - 1), posts[0]); put_bits(pb, ilog(range - 1), posts[1]); coded[0] = coded[1] = 1; for (i = 2; i < fc->values; i++) { int predicted = render_point(fc->list[fc->list[i].low].x, posts[fc->list[i].low], fc->list[fc->list[i].high].x, posts[fc->list[i].high], fc->list[i].x); int highroom = range - predicted; int lowroom = predicted; int room = FFMIN(highroom, lowroom); if (predicted == posts[i]) { coded[i] = 0; // must be used later as flag! continue; } else { if (!coded[fc->list[i].low ]) coded[fc->list[i].low ] = -1; if (!coded[fc->list[i].high]) coded[fc->list[i].high] = -1; } if (posts[i] > predicted) { if (posts[i] - predicted > room) coded[i] = posts[i] - predicted + lowroom; else coded[i] = (posts[i] - predicted) << 1; } else { if (predicted - posts[i] > room) coded[i] = predicted - posts[i] + highroom - 1; else coded[i] = ((predicted - posts[i]) << 1) - 1; } } counter = 2; for (i = 0; i < fc->partitions; i++) { vorbis_enc_floor_class * c = &fc->classes[fc->partition_to_class[i]]; int k, cval = 0, csub = 1<<c->subclass; if (c->subclass) { vorbis_enc_codebook * book = &venc->codebooks[c->masterbook]; int cshift = 0; for (k = 0; k < c->dim; k++) { int l; for (l = 0; l < csub; l++) { int maxval = 1; if (c->books[l] != -1) maxval = venc->codebooks[c->books[l]].nentries; // coded could be -1, but this still works, cause that is 0 if (coded[counter + k] < maxval) break; } assert(l != csub); cval |= l << cshift; cshift += c->subclass; } put_codeword(pb, book, cval); } for (k = 0; k < c->dim; k++) { int book = c->books[cval & (csub-1)]; int entry = coded[counter++]; cval >>= c->subclass; if (book == -1) continue; if (entry == -1) entry = 0; put_codeword(pb, &venc->codebooks[book], entry); } } ff_vorbis_floor1_render_list(fc->list, fc->values, posts, coded, fc->multiplier, floor, samples); }


void qtest_quit(QTestState *s) { int status; pid_t pid = qtest_qemu_pid(s); if (pid != -1) { kill(pid, SIGTERM); waitpid(pid, &status, 0); } unlink(s->pid_file); unlink(s->socket_path); unlink(s->qmp_socket_path); g_free(s->pid_file); g_free(s->socket_path); g_free(s->qmp_socket_path); }


static void guess_mv(MpegEncContext *s){ uint8_t fixed[s->mb_stride * s->mb_height]; #define MV_FROZEN 3 #define MV_CHANGED 2 #define MV_UNCHANGED 1 const int mb_stride = s->mb_stride; const int mb_width = s->mb_width; const int mb_height= s->mb_height; int i, depth, num_avail; int mb_x, mb_y, mot_step, mot_stride; set_mv_strides(s, &mot_step, &mot_stride); num_avail=0; for(i=0; i<s->mb_num; i++){ const int mb_xy= s->mb_index2xy[ i ]; int f=0; int error= s->error_status_table[mb_xy]; if(IS_INTRA(s->current_picture.mb_type[mb_xy])) f=MV_FROZEN; //intra //FIXME check if(!(error&MV_ERROR)) f=MV_FROZEN; //inter with undamaged MV fixed[mb_xy]= f; if(f==MV_FROZEN) num_avail++; } if((!(s->avctx->error_concealment&FF_EC_GUESS_MVS)) || num_avail <= mb_width/2){ for(mb_y=0; mb_y<s->mb_height; mb_y++){ for(mb_x=0; mb_x<s->mb_width; mb_x++){ const int mb_xy= mb_x + mb_y*s->mb_stride; if(IS_INTRA(s->current_picture.mb_type[mb_xy])) continue; if(!(s->error_status_table[mb_xy]&MV_ERROR)) continue; s->mv_dir = s->last_picture.data[0] ? MV_DIR_FORWARD : MV_DIR_BACKWARD; s->mb_intra=0; s->mv_type = MV_TYPE_16X16; s->mb_skipped=0; s->dsp.clear_blocks(s->block[0]); s->mb_x= mb_x; s->mb_y= mb_y; s->mv[0][0][0]= 0; s->mv[0][0][1]= 0; decode_mb(s, 0); } } return; } for(depth=0;; depth++){ int changed, pass, none_left; none_left=1; changed=1; for(pass=0; (changed || pass<2) && pass<10; pass++){ int mb_x, mb_y; int score_sum=0; changed=0; for(mb_y=0; mb_y<s->mb_height; mb_y++){ for(mb_x=0; mb_x<s->mb_width; mb_x++){ const int mb_xy= mb_x + mb_y*s->mb_stride; int mv_predictor[8][2]={{0}}; int ref[8]={0}; int pred_count=0; int j; int best_score=256*256*256*64; int best_pred=0; const int mot_index= (mb_x + mb_y*mot_stride) * mot_step; int prev_x, prev_y, prev_ref; if((mb_x^mb_y^pass)&1) continue; if(fixed[mb_xy]==MV_FROZEN) continue; assert(!IS_INTRA(s->current_picture.mb_type[mb_xy])); assert(s->last_picture_ptr && s->last_picture_ptr->data[0]); j=0; if(mb_x>0 && fixed[mb_xy-1 ]==MV_FROZEN) j=1; if(mb_x+1<mb_width && fixed[mb_xy+1 ]==MV_FROZEN) j=1; if(mb_y>0 && fixed[mb_xy-mb_stride]==MV_FROZEN) j=1; if(mb_y+1<mb_height && fixed[mb_xy+mb_stride]==MV_FROZEN) j=1; if(j==0) continue; j=0; if(mb_x>0 && fixed[mb_xy-1 ]==MV_CHANGED) j=1; if(mb_x+1<mb_width && fixed[mb_xy+1 ]==MV_CHANGED) j=1; if(mb_y>0 && fixed[mb_xy-mb_stride]==MV_CHANGED) j=1; if(mb_y+1<mb_height && fixed[mb_xy+mb_stride]==MV_CHANGED) j=1; if(j==0 && pass>1) continue; none_left=0; if(mb_x>0 && fixed[mb_xy-1]){ mv_predictor[pred_count][0]= s->current_picture.motion_val[0][mot_index - mot_step][0]; mv_predictor[pred_count][1]= s->current_picture.motion_val[0][mot_index - mot_step][1]; ref [pred_count] = s->current_picture.ref_index[0][4*(mb_xy-1)]; pred_count++; } if(mb_x+1<mb_width && fixed[mb_xy+1]){ mv_predictor[pred_count][0]= s->current_picture.motion_val[0][mot_index + mot_step][0]; mv_predictor[pred_count][1]= s->current_picture.motion_val[0][mot_index + mot_step][1]; ref [pred_count] = s->current_picture.ref_index[0][4*(mb_xy+1)]; pred_count++; } if(mb_y>0 && fixed[mb_xy-mb_stride]){ mv_predictor[pred_count][0]= s->current_picture.motion_val[0][mot_index - mot_stride*mot_step][0]; mv_predictor[pred_count][1]= s->current_picture.motion_val[0][mot_index - mot_stride*mot_step][1]; ref [pred_count] = s->current_picture.ref_index[0][4*(mb_xy-s->mb_stride)]; pred_count++; } if(mb_y+1<mb_height && fixed[mb_xy+mb_stride]){ mv_predictor[pred_count][0]= s->current_picture.motion_val[0][mot_index + mot_stride*mot_step][0]; mv_predictor[pred_count][1]= s->current_picture.motion_val[0][mot_index + mot_stride*mot_step][1]; ref [pred_count] = s->current_picture.ref_index[0][4*(mb_xy+s->mb_stride)]; pred_count++; } if(pred_count==0) continue; if(pred_count>1){ int sum_x=0, sum_y=0, sum_r=0; int max_x, max_y, min_x, min_y, max_r, min_r; for(j=0; j<pred_count; j++){ sum_x+= mv_predictor[j][0]; sum_y+= mv_predictor[j][1]; sum_r+= ref[j]; if(j && ref[j] != ref[j-1]) goto skip_mean_and_median; } /* mean */ mv_predictor[pred_count][0] = sum_x/j; mv_predictor[pred_count][1] = sum_y/j; ref [pred_count] = sum_r/j; /* median */ if(pred_count>=3){ min_y= min_x= min_r= 99999; max_y= max_x= max_r=-99999; }else{ min_x=min_y=max_x=max_y=min_r=max_r=0; } for(j=0; j<pred_count; j++){ max_x= FFMAX(max_x, mv_predictor[j][0]); max_y= FFMAX(max_y, mv_predictor[j][1]); max_r= FFMAX(max_r, ref[j]); min_x= FFMIN(min_x, mv_predictor[j][0]); min_y= FFMIN(min_y, mv_predictor[j][1]); min_r= FFMIN(min_r, ref[j]); } mv_predictor[pred_count+1][0] = sum_x - max_x - min_x; mv_predictor[pred_count+1][1] = sum_y - max_y - min_y; ref [pred_count+1] = sum_r - max_r - min_r; if(pred_count==4){ mv_predictor[pred_count+1][0] /= 2; mv_predictor[pred_count+1][1] /= 2; ref [pred_count+1] /= 2; } pred_count+=2; } skip_mean_and_median: /* zero MV */ pred_count++; if (!fixed[mb_xy]) { if (s->avctx->codec_id == CODEC_ID_H264) { // FIXME } else { ff_thread_await_progress((AVFrame *) s->last_picture_ptr, mb_y, 0); } if (!s->last_picture.motion_val[0] || !s->last_picture.ref_index[0]) goto skip_last_mv; prev_x = s->last_picture.motion_val[0][mot_index][0]; prev_y = s->last_picture.motion_val[0][mot_index][1]; prev_ref = s->last_picture.ref_index[0][4*mb_xy]; } else { prev_x = s->current_picture.motion_val[0][mot_index][0]; prev_y = s->current_picture.motion_val[0][mot_index][1]; prev_ref = s->current_picture.ref_index[0][4*mb_xy]; } /* last MV */ mv_predictor[pred_count][0]= prev_x; mv_predictor[pred_count][1]= prev_y; ref [pred_count] = prev_ref; pred_count++; s->mv_dir = MV_DIR_FORWARD; s->mb_intra=0; s->mv_type = MV_TYPE_16X16; s->mb_skipped=0; s->dsp.clear_blocks(s->block[0]); s->mb_x= mb_x; s->mb_y= mb_y; for(j=0; j<pred_count; j++){ int score=0; uint8_t *src= s->current_picture.data[0] + mb_x*16 + mb_y*16*s->linesize; s->current_picture.motion_val[0][mot_index][0]= s->mv[0][0][0]= mv_predictor[j][0]; s->current_picture.motion_val[0][mot_index][1]= s->mv[0][0][1]= mv_predictor[j][1]; if(ref[j]<0) //predictor intra or otherwise not available continue; decode_mb(s, ref[j]); if(mb_x>0 && fixed[mb_xy-1]){ int k; for(k=0; k<16; k++) score += FFABS(src[k*s->linesize-1 ]-src[k*s->linesize ]); } if(mb_x+1<mb_width && fixed[mb_xy+1]){ int k; for(k=0; k<16; k++) score += FFABS(src[k*s->linesize+15]-src[k*s->linesize+16]); } if(mb_y>0 && fixed[mb_xy-mb_stride]){ int k; for(k=0; k<16; k++) score += FFABS(src[k-s->linesize ]-src[k ]); } if(mb_y+1<mb_height && fixed[mb_xy+mb_stride]){ int k; for(k=0; k<16; k++) score += FFABS(src[k+s->linesize*15]-src[k+s->linesize*16]); } if(score <= best_score){ // <= will favor the last MV best_score= score; best_pred= j; } } score_sum+= best_score; s->mv[0][0][0]= mv_predictor[best_pred][0]; s->mv[0][0][1]= mv_predictor[best_pred][1]; for(i=0; i<mot_step; i++) for(j=0; j<mot_step; j++){ s->current_picture.motion_val[0][mot_index+i+j*mot_stride][0]= s->mv[0][0][0]; s->current_picture.motion_val[0][mot_index+i+j*mot_stride][1]= s->mv[0][0][1]; } decode_mb(s, ref[best_pred]); if(s->mv[0][0][0] != prev_x || s->mv[0][0][1] != prev_y){ fixed[mb_xy]=MV_CHANGED; changed++; }else fixed[mb_xy]=MV_UNCHANGED; } } // printf(".%d/%d", changed, score_sum); fflush(stdout); } if(none_left) return; for(i=0; i<s->mb_num; i++){ int mb_xy= s->mb_index2xy[i]; if(fixed[mb_xy]) fixed[mb_xy]=MV_FROZEN; } // printf(":"); fflush(stdout); } }


void qemu_bh_delete(QEMUBH *bh) { qemu_bh_cancel(bh); qemu_free(bh); }


static int read_var_block_data(ALSDecContext *ctx, ALSBlockData *bd) { ALSSpecificConfig *sconf = &ctx->sconf; AVCodecContext *avctx = ctx->avctx; GetBitContext *gb = &ctx->gb; unsigned int k; unsigned int s[8]; unsigned int sx[8]; unsigned int sub_blocks, log2_sub_blocks, sb_length; unsigned int start = 0; unsigned int opt_order; int sb; int32_t *quant_cof = bd->quant_cof; int32_t *current_res; // ensure variable block decoding by reusing this field *bd->const_block = 0; *bd->opt_order = 1; bd->js_blocks = get_bits1(gb); opt_order = *bd->opt_order; // determine the number of subblocks for entropy decoding if (!sconf->bgmc && !sconf->sb_part) { log2_sub_blocks = 0; } else { if (sconf->bgmc && sconf->sb_part) log2_sub_blocks = get_bits(gb, 2); else log2_sub_blocks = 2 * get_bits1(gb); sub_blocks = 1 << log2_sub_blocks; // do not continue in case of a damaged stream since // block_length must be evenly divisible by sub_blocks if (bd->block_length & (sub_blocks - 1)) { av_log(avctx, AV_LOG_WARNING, "Block length is not evenly divisible by the number of subblocks.\n"); sb_length = bd->block_length >> log2_sub_blocks; if (sconf->bgmc) { s[0] = get_bits(gb, 8 + (sconf->resolution > 1)); s[k] = s[k - 1] + decode_rice(gb, 2); for (k = 0; k < sub_blocks; k++) { sx[k] = s[k] & 0x0F; s [k] >>= 4; } else { s[0] = get_bits(gb, 4 + (sconf->resolution > 1)); s[k] = s[k - 1] + decode_rice(gb, 0); if (get_bits1(gb)) *bd->shift_lsbs = get_bits(gb, 4) + 1; *bd->store_prev_samples = (bd->js_blocks && bd->raw_other) || *bd->shift_lsbs; if (!sconf->rlslms) { if (sconf->adapt_order) { int opt_order_length = av_ceil_log2(av_clip((bd->block_length >> 3) - 1, 2, sconf->max_order + 1)); *bd->opt_order = get_bits(gb, opt_order_length); if (*bd->opt_order > sconf->max_order) { *bd->opt_order = sconf->max_order; av_log(avctx, AV_LOG_ERROR, "Predictor order too large!\n"); } else { *bd->opt_order = sconf->max_order; opt_order = *bd->opt_order; if (opt_order) { int add_base; if (sconf->coef_table == 3) { add_base = 0x7F; // read coefficient 0 quant_cof[0] = 32 * parcor_scaled_values[get_bits(gb, 7)]; // read coefficient 1 if (opt_order > 1) quant_cof[1] = -32 * parcor_scaled_values[get_bits(gb, 7)]; // read coefficients 2 to opt_order for (k = 2; k < opt_order; k++) quant_cof[k] = get_bits(gb, 7); } else { int k_max; add_base = 1; // read coefficient 0 to 19 k_max = FFMIN(opt_order, 20); for (k = 0; k < k_max; k++) { int rice_param = parcor_rice_table[sconf->coef_table][k][1]; int offset = parcor_rice_table[sconf->coef_table][k][0]; quant_cof[k] = decode_rice(gb, rice_param) + offset; if (quant_cof[k] < -64 || quant_cof[k] > 63) { av_log(avctx, AV_LOG_ERROR, "Quantization coefficient %d is out of range!\n", quant_cof[k]); return AVERROR_INVALIDDATA; // read coefficients 20 to 126 k_max = FFMIN(opt_order, 127); for (; k < k_max; k++) quant_cof[k] = decode_rice(gb, 2) + (k & 1); // read coefficients 127 to opt_order for (; k < opt_order; k++) quant_cof[k] = decode_rice(gb, 1); quant_cof[0] = 32 * parcor_scaled_values[quant_cof[0] + 64]; if (opt_order > 1) quant_cof[1] = -32 * parcor_scaled_values[quant_cof[1] + 64]; for (k = 2; k < opt_order; k++) quant_cof[k] = (quant_cof[k] << 14) + (add_base << 13); // read LTP gain and lag values if (sconf->long_term_prediction) { *bd->use_ltp = get_bits1(gb); if (*bd->use_ltp) { int r, c; bd->ltp_gain[0] = decode_rice(gb, 1) << 3; bd->ltp_gain[1] = decode_rice(gb, 2) << 3; r = get_unary(gb, 0, 3); c = get_bits(gb, 2); bd->ltp_gain[2] = ltp_gain_values[r][c]; bd->ltp_gain[3] = decode_rice(gb, 2) << 3; bd->ltp_gain[4] = decode_rice(gb, 1) << 3; *bd->ltp_lag = get_bits(gb, ctx->ltp_lag_length); *bd->ltp_lag += FFMAX(4, opt_order + 1); // read first value and residuals in case of a random access block if (bd->ra_block) { if (opt_order) bd->raw_samples[0] = decode_rice(gb, avctx->bits_per_raw_sample - 4); if (opt_order > 1) bd->raw_samples[1] = decode_rice(gb, FFMIN(s[0] + 3, ctx->s_max)); if (opt_order > 2) bd->raw_samples[2] = decode_rice(gb, FFMIN(s[0] + 1, ctx->s_max)); start = FFMIN(opt_order, 3); // read all residuals if (sconf->bgmc) { int delta[8]; unsigned int k [8]; unsigned int b = av_clip((av_ceil_log2(bd->block_length) - 3) >> 1, 0, 5); unsigned int i = start; // read most significant bits unsigned int high; unsigned int low; unsigned int value; ff_bgmc_decode_init(gb, &high, &low, &value); current_res = bd->raw_samples + start; for (sb = 0; sb < sub_blocks; sb++, i = 0) { k [sb] = s[sb] > b ? s[sb] - b : 0; delta[sb] = 5 - s[sb] + k[sb]; ff_bgmc_decode(gb, sb_length, current_res, delta[sb], sx[sb], &high, &low, &value, ctx->bgmc_lut, ctx->bgmc_lut_status); current_res += sb_length; ff_bgmc_decode_end(gb); // read least significant bits and tails i = start; current_res = bd->raw_samples + start; for (sb = 0; sb < sub_blocks; sb++, i = 0) { unsigned int cur_tail_code = tail_code[sx[sb]][delta[sb]]; unsigned int cur_k = k[sb]; unsigned int cur_s = s[sb]; for (; i < sb_length; i++) { int32_t res = *current_res; if (res == cur_tail_code) { unsigned int max_msb = (2 + (sx[sb] > 2) + (sx[sb] > 10)) << (5 - delta[sb]); res = decode_rice(gb, cur_s); if (res >= 0) { res += (max_msb ) << cur_k; } else { res -= (max_msb - 1) << cur_k; } else { if (res > cur_tail_code) res--; if (res & 1) res = -res; res >>= 1; if (cur_k) { res <<= cur_k; res |= get_bits_long(gb, cur_k); *current_res++ = res; } else { current_res = bd->raw_samples + start; for (sb = 0; sb < sub_blocks; sb++, start = 0) for (; start < sb_length; start++) *current_res++ = decode_rice(gb, s[sb]); if (!sconf->mc_coding || ctx->js_switch) align_get_bits(gb); return 0;


void select_soundhw(const char *optarg) { }


static void cpu_exec_nocache(CPUState *cpu, int max_cycles, TranslationBlock *orig_tb) { TranslationBlock *tb; /* Should never happen. We only end up here when an existing TB is too long. */ if (max_cycles > CF_COUNT_MASK) max_cycles = CF_COUNT_MASK; tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags, max_cycles | CF_NOCACHE); tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb; cpu->current_tb = tb; /* execute the generated code */ trace_exec_tb_nocache(tb, tb->pc); cpu_tb_exec(cpu, tb->tc_ptr); cpu->current_tb = NULL; tb_phys_invalidate(tb, -1); tb_free(tb); }


static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) { uint64_t mfindex; DPRINTF("xhci_submit(slotid=%d,epid=%d)\n", xfer->slotid, xfer->epid); xfer->in_xfer = epctx->type>>2; switch(epctx->type) { case ET_INTR_OUT: case ET_INTR_IN: xfer->pkts = 0; xfer->iso_xfer = false; xfer->timed_xfer = true; mfindex = xhci_mfindex_get(xhci); xhci_calc_intr_kick(xhci, xfer, epctx, mfindex); xhci_check_intr_iso_kick(xhci, xfer, epctx, mfindex); if (xfer->running_retry) { return -1; } break; case ET_BULK_OUT: case ET_BULK_IN: xfer->pkts = 0; xfer->iso_xfer = false; xfer->timed_xfer = false; break; case ET_ISO_OUT: case ET_ISO_IN: xfer->pkts = 1; xfer->iso_xfer = true; xfer->timed_xfer = true; mfindex = xhci_mfindex_get(xhci); xhci_calc_iso_kick(xhci, xfer, epctx, mfindex); xhci_check_intr_iso_kick(xhci, xfer, epctx, mfindex); if (xfer->running_retry) { return -1; } break; default: trace_usb_xhci_unimplemented("endpoint type", epctx->type); return -1; } if (xhci_setup_packet(xfer) < 0) { return -1; } usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); xhci_try_complete_packet(xfer); if (!xfer->running_async && !xfer->running_retry) { xhci_kick_epctx(xfer->epctx, xfer->streamid); } return 0; }


static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t value) { M48t59State *NVRAM = opaque; m48t59_write(NVRAM, addr, (value >> 24) & 0xff); m48t59_write(NVRAM, addr + 1, (value >> 16) & 0xff); m48t59_write(NVRAM, addr + 2, (value >> 8) & 0xff); m48t59_write(NVRAM, addr + 3, value & 0xff); }


static QIOChannelSocket *nbd_establish_connection(SocketAddress *saddr, Error **errp) { QIOChannelSocket *sioc; Error *local_err = NULL; sioc = qio_channel_socket_new(); qio_channel_set_name(QIO_CHANNEL(sioc), "nbd-client"); qio_channel_socket_connect_sync(sioc, saddr, &local_err); if (local_err) { error_propagate(errp, local_err); return NULL; } qio_channel_set_delay(QIO_CHANNEL(sioc), false); return sioc; }


static int write_abst(AVFormatContext *s, OutputStream *os, int final) { HDSContext *c = s->priv_data; AVIOContext *out; char filename[1024], temp_filename[1024]; int i, ret; int64_t asrt_pos, afrt_pos; int start = 0, fragments; int index = s->streams[os->first_stream]->id; int64_t cur_media_time = 0; if (c->window_size) start = FFMAX(os->nb_fragments - c->window_size, 0); fragments = os->nb_fragments - start; if (final) cur_media_time = os->last_ts; else if (os->nb_fragments) cur_media_time = os->fragments[os->nb_fragments - 1]->start_time; snprintf(filename, sizeof(filename), "%s/stream%d.abst", s->filename, index); snprintf(temp_filename, sizeof(temp_filename), "%s/stream%d.abst.tmp", s->filename, index); ret = avio_open2(&out, temp_filename, AVIO_FLAG_WRITE, &s->interrupt_callback, NULL); if (ret < 0) { av_log(s, AV_LOG_ERROR, "Unable to open %s for writing\n", temp_filename); return ret; } avio_wb32(out, 0); // abst size avio_wl32(out, MKTAG('a','b','s','t')); avio_wb32(out, 0); // version + flags avio_wb32(out, os->fragment_index - 1); // BootstrapinfoVersion avio_w8(out, final ? 0 : 0x20); // profile, live, update avio_wb32(out, 1000); // timescale avio_wb64(out, cur_media_time); avio_wb64(out, 0); // SmpteTimeCodeOffset avio_w8(out, 0); // MovieIdentifer (null string) avio_w8(out, 0); // ServerEntryCount avio_w8(out, 0); // QualityEntryCount avio_w8(out, 0); // DrmData (null string) avio_w8(out, 0); // MetaData (null string) avio_w8(out, 1); // SegmentRunTableCount asrt_pos = avio_tell(out); avio_wb32(out, 0); // asrt size avio_wl32(out, MKTAG('a','s','r','t')); avio_wb32(out, 0); // version + flags avio_w8(out, 0); // QualityEntryCount avio_wb32(out, 1); // SegmentRunEntryCount avio_wb32(out, 1); // FirstSegment avio_wb32(out, final ? (os->fragment_index - 1) : 0xffffffff); // FragmentsPerSegment update_size(out, asrt_pos); avio_w8(out, 1); // FragmentRunTableCount afrt_pos = avio_tell(out); avio_wb32(out, 0); // afrt size avio_wl32(out, MKTAG('a','f','r','t')); avio_wb32(out, 0); // version + flags avio_wb32(out, 1000); // timescale avio_w8(out, 0); // QualityEntryCount avio_wb32(out, fragments); // FragmentRunEntryCount for (i = start; i < os->nb_fragments; i++) { avio_wb32(out, os->fragments[i]->n); avio_wb64(out, os->fragments[i]->start_time); avio_wb32(out, os->fragments[i]->duration); } update_size(out, afrt_pos); update_size(out, 0); avio_close(out); return ff_rename(temp_filename, filename); }


static int mptsas_process_scsi_io_request(MPTSASState *s, MPIMsgSCSIIORequest *scsi_io, hwaddr addr) { MPTSASRequest *req; MPIMsgSCSIIOReply reply; SCSIDevice *sdev; int status; mptsas_fix_scsi_io_endianness(scsi_io); trace_mptsas_process_scsi_io_request(s, scsi_io->Bus, scsi_io->TargetID, scsi_io->LUN[1], scsi_io->DataLength); status = mptsas_scsi_device_find(s, scsi_io->Bus, scsi_io->TargetID, scsi_io->LUN, &sdev); if (status) { goto bad; } req = g_new(MPTSASRequest, 1); QTAILQ_INSERT_TAIL(&s->pending, req, next); req->scsi_io = *scsi_io; req->dev = s; status = mptsas_build_sgl(s, req, addr); if (status) { goto free_bad; } if (req->qsg.size < scsi_io->DataLength) { trace_mptsas_sgl_overflow(s, scsi_io->MsgContext, scsi_io->DataLength, req->qsg.size); status = MPI_IOCSTATUS_INVALID_SGL; goto free_bad; } req->sreq = scsi_req_new(sdev, scsi_io->MsgContext, scsi_io->LUN[1], scsi_io->CDB, req); if (req->sreq->cmd.xfer > scsi_io->DataLength) { goto overrun; } switch (scsi_io->Control & MPI_SCSIIO_CONTROL_DATADIRECTION_MASK) { case MPI_SCSIIO_CONTROL_NODATATRANSFER: if (req->sreq->cmd.mode != SCSI_XFER_NONE) { goto overrun; } break; case MPI_SCSIIO_CONTROL_WRITE: if (req->sreq->cmd.mode != SCSI_XFER_TO_DEV) { goto overrun; } break; case MPI_SCSIIO_CONTROL_READ: if (req->sreq->cmd.mode != SCSI_XFER_FROM_DEV) { goto overrun; } break; } if (scsi_req_enqueue(req->sreq)) { scsi_req_continue(req->sreq); } return 0; overrun: trace_mptsas_scsi_overflow(s, scsi_io->MsgContext, req->sreq->cmd.xfer, scsi_io->DataLength); status = MPI_IOCSTATUS_SCSI_DATA_OVERRUN; free_bad: mptsas_free_request(req); bad: memset(&reply, 0, sizeof(reply)); reply.TargetID = scsi_io->TargetID; reply.Bus = scsi_io->Bus; reply.MsgLength = sizeof(reply) / 4; reply.Function = scsi_io->Function; reply.CDBLength = scsi_io->CDBLength; reply.SenseBufferLength = scsi_io->SenseBufferLength; reply.MsgContext = scsi_io->MsgContext; reply.SCSIState = MPI_SCSI_STATE_NO_SCSI_STATUS; reply.IOCStatus = status; mptsas_fix_scsi_io_reply_endianness(&reply); mptsas_reply(s, (MPIDefaultReply *)&reply); return 0; }


bool s390_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { if (interrupt_request & CPU_INTERRUPT_HARD) { S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; if (env->ex_value) { /* Execution of the target insn is indivisible from the parent EXECUTE insn. */ return false; } if (env->psw.mask & PSW_MASK_EXT) { s390_cpu_do_interrupt(cs); return true; } } return false; }


ioapic_mem_read(void *opaque, target_phys_addr_t addr, unsigned int size) { IOAPICCommonState *s = opaque; int index; uint32_t val = 0; switch (addr & 0xff) { case IOAPIC_IOREGSEL: val = s->ioregsel; break; case IOAPIC_IOWIN: if (size != 4) { break; } switch (s->ioregsel) { case IOAPIC_REG_ID: val = s->id << IOAPIC_ID_SHIFT; break; case IOAPIC_REG_VER: val = IOAPIC_VERSION | ((IOAPIC_NUM_PINS - 1) << IOAPIC_VER_ENTRIES_SHIFT); break; case IOAPIC_REG_ARB: val = 0; break; default: index = (s->ioregsel - IOAPIC_REG_REDTBL_BASE) >> 1; if (index >= 0 && index < IOAPIC_NUM_PINS) { if (s->ioregsel & 1) { val = s->ioredtbl[index] >> 32; } else { val = s->ioredtbl[index] & 0xffffffff; } } } DPRINTF("read: %08x = %08x\n", s->ioregsel, val); break; } return val; }


static void piix4_pm_machine_ready(Notifier *n, void *opaque) { PIIX4PMState *s = container_of(n, PIIX4PMState, machine_ready); PCIDevice *d = PCI_DEVICE(s); MemoryRegion *io_as = pci_address_space_io(d); uint8_t *pci_conf; pci_conf = d->config; pci_conf[0x5f] = 0x10 | (memory_region_present(io_as, 0x378) ? 0x80 : 0); pci_conf[0x63] = 0x60; pci_conf[0x67] = (memory_region_present(io_as, 0x3f8) ? 0x08 : 0) | (memory_region_present(io_as, 0x2f8) ? 0x90 : 0); if (s->use_acpi_pci_hotplug) { pci_for_each_bus(d->bus, piix4_update_bus_hotplug, s); } else { piix4_update_bus_hotplug(d->bus, s); } }


static void vnc_dpy_resize(DisplayState *ds) { int size_changed; VncDisplay *vd = ds->opaque; VncState *vs; /* server surface */ if (!vd->server) vd->server = qemu_mallocz(sizeof(*vd->server)); if (vd->server->data) qemu_free(vd->server->data); *(vd->server) = *(ds->surface); vd->server->data = qemu_mallocz(vd->server->linesize * vd->server->height); /* guest surface */ if (!vd->guest.ds) vd->guest.ds = qemu_mallocz(sizeof(*vd->guest.ds)); if (ds_get_bytes_per_pixel(ds) != vd->guest.ds->pf.bytes_per_pixel) console_color_init(ds); size_changed = ds_get_width(ds) != vd->guest.ds->width || ds_get_height(ds) != vd->guest.ds->height; *(vd->guest.ds) = *(ds->surface); memset(vd->guest.dirty, 0xFF, sizeof(vd->guest.dirty)); QTAILQ_FOREACH(vs, &vd->clients, next) { vnc_colordepth(vs); if (size_changed) { vnc_desktop_resize(vs); } if (vs->vd->cursor) { vnc_cursor_define(vs); } memset(vs->dirty, 0xFF, sizeof(vs->dirty)); } }


bool hpet_find(void) { return object_resolve_path_type("", TYPE_HPET, NULL); }


static void gen_load_exclusive(DisasContext *s, int rt, int rt2, TCGv_i32 addr, int size) { TCGv_i32 tmp = tcg_temp_new_i32(); s->is_ldex = true; switch (size) { case 0: gen_aa32_ld8u(tmp, addr, get_mem_index(s)); break; case 1: gen_aa32_ld16u(tmp, addr, get_mem_index(s)); break; case 2: case 3: gen_aa32_ld32u(tmp, addr, get_mem_index(s)); break; default: abort(); } if (size == 3) { TCGv_i32 tmp2 = tcg_temp_new_i32(); TCGv_i32 tmp3 = tcg_temp_new_i32(); tcg_gen_addi_i32(tmp2, addr, 4); gen_aa32_ld32u(tmp3, tmp2, get_mem_index(s)); tcg_temp_free_i32(tmp2); tcg_gen_concat_i32_i64(cpu_exclusive_val, tmp, tmp3); store_reg(s, rt2, tmp3); } else { tcg_gen_extu_i32_i64(cpu_exclusive_val, tmp); } store_reg(s, rt, tmp); tcg_gen_extu_i32_i64(cpu_exclusive_addr, addr); }


static inline void RENAME(bgr24ToUV)(uint8_t *dstU, uint8_t *dstV, const uint8_t *src1, const uint8_t *src2, long width, uint32_t *unused) { #if COMPILE_TEMPLATE_MMX RENAME(bgr24ToUV_mmx)(dstU, dstV, src1, width, PIX_FMT_BGR24); #else int i; for (i=0; i<width; i++) { int b= src1[3*i + 0]; int g= src1[3*i + 1]; int r= src1[3*i + 2]; dstU[i]= (RU*r + GU*g + BU*b + (257<<(RGB2YUV_SHIFT-1)))>>RGB2YUV_SHIFT; dstV[i]= (RV*r + GV*g + BV*b + (257<<(RGB2YUV_SHIFT-1)))>>RGB2YUV_SHIFT; } #endif /* COMPILE_TEMPLATE_MMX */ assert(src1 == src2); }


static void sigp_stop_and_store_status(CPUState *cs, run_on_cpu_data arg) { S390CPU *cpu = S390_CPU(cs); SigpInfo *si = arg.host_ptr; struct kvm_s390_irq irq = { .type = KVM_S390_SIGP_STOP, }; /* disabled wait - sleeping in user space */ if (s390_cpu_get_state(cpu) == CPU_STATE_OPERATING && cs->halted) { s390_cpu_set_state(CPU_STATE_STOPPED, cpu); } switch (s390_cpu_get_state(cpu)) { case CPU_STATE_OPERATING: cpu->env.sigp_order = SIGP_STOP_STORE_STATUS; kvm_s390_vcpu_interrupt(cpu, &irq); /* store will be performed when handling the stop intercept */ break; case CPU_STATE_STOPPED: /* already stopped, just store the status */ cpu_synchronize_state(cs); kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR, true); break; } si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; }


static int xen_remove_from_physmap(XenIOState *state, hwaddr start_addr, ram_addr_t size) { unsigned long i = 0; int rc = 0; XenPhysmap *physmap = NULL; hwaddr phys_offset = 0; physmap = get_physmapping(state, start_addr, size); if (physmap == NULL) { return -1; } phys_offset = physmap->phys_offset; size = physmap->size; DPRINTF("unmapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx", at " "%"HWADDR_PRIx"\n", start_addr, start_addr + size, phys_offset); size >>= TARGET_PAGE_BITS; start_addr >>= TARGET_PAGE_BITS; phys_offset >>= TARGET_PAGE_BITS; for (i = 0; i < size; i++) { unsigned long idx = start_addr + i; xen_pfn_t gpfn = phys_offset + i; rc = xc_domain_add_to_physmap(xen_xc, xen_domid, XENMAPSPACE_gmfn, idx, gpfn); if (rc) { fprintf(stderr, "add_to_physmap MFN %"PRI_xen_pfn" to PFN %" PRI_xen_pfn" failed: %d\n", idx, gpfn, rc); return -rc; } } QLIST_REMOVE(physmap, list); if (state->log_for_dirtybit == physmap) { state->log_for_dirtybit = NULL; } g_free(physmap); return 0; }


int json_lexer_flush(JSONLexer *lexer) { return lexer->state == IN_START ? 0 : json_lexer_feed_char(lexer, 0); }


float64 helper_fxtod(CPUSPARCState *env, int64_t src) { float64 ret; clear_float_exceptions(env); ret = int64_to_float64(src, &env->fp_status); check_ieee_exceptions(env); return ret; }


static void test_visitor_out_list(TestOutputVisitorData *data, const void *unused) { const char *value_str = "list value"; TestStructList *p, *head = NULL; const int max_items = 10; bool value_bool = true; int value_int = 10; Error *err = NULL; QListEntry *entry; QObject *obj; QList *qlist; int i; /* Build the list in reverse order... */ for (i = 0; i < max_items; i++) { p = g_malloc0(sizeof(*p)); p->value = g_malloc0(sizeof(*p->value)); p->value->integer = value_int + (max_items - i - 1); p->value->boolean = value_bool; p->value->string = g_strdup(value_str); p->next = head; head = p; } visit_type_TestStructList(data->ov, &head, NULL, &err); g_assert(!err); obj = qmp_output_get_qobject(data->qov); g_assert(obj != NULL); g_assert(qobject_type(obj) == QTYPE_QLIST); qlist = qobject_to_qlist(obj); g_assert(!qlist_empty(qlist)); /* ...and ensure that the visitor sees it in order */ i = 0; QLIST_FOREACH_ENTRY(qlist, entry) { QDict *qdict; g_assert(qobject_type(entry->value) == QTYPE_QDICT); qdict = qobject_to_qdict(entry->value); g_assert_cmpint(qdict_size(qdict), ==, 3); g_assert_cmpint(qdict_get_int(qdict, "integer"), ==, value_int + i); g_assert_cmpint(qdict_get_bool(qdict, "boolean"), ==, value_bool); g_assert_cmpstr(qdict_get_str(qdict, "string"), ==, value_str); i++; } g_assert_cmpint(i, ==, max_items); QDECREF(qlist); qapi_free_TestStructList(head); }


static uint64_t qemu_opt_get_size_helper(QemuOpts *opts, const char *name, uint64_t defval, bool del) { QemuOpt *opt = qemu_opt_find(opts, name); uint64_t ret = defval; if (opt == NULL) { const QemuOptDesc *desc = find_desc_by_name(opts->list->desc, name); if (desc && desc->def_value_str) { parse_option_size(name, desc->def_value_str, &ret, &error_abort); } return ret; } assert(opt->desc && opt->desc->type == QEMU_OPT_SIZE); ret = opt->value.uint; if (del) { qemu_opt_del_all(opts, name); } return ret; }


static int foreach_device_config(int type, int (*func)(const char *cmdline)) { struct device_config *conf; int rc; TAILQ_FOREACH(conf, &device_configs, next) { if (conf->type != type) continue; rc = func(conf->cmdline); if (0 != rc) return rc; } return 0; }


static BlockDriverState *bdrv_append_temp_snapshot(BlockDriverState *bs, int flags, QDict *snapshot_options, Error **errp) { /* TODO: extra byte is a hack to ensure MAX_PATH space on Windows. */ char *tmp_filename = g_malloc0(PATH_MAX + 1); int64_t total_size; QemuOpts *opts = NULL; BlockDriverState *bs_snapshot; Error *local_err = NULL; int ret; /* if snapshot, we create a temporary backing file and open it instead of opening 'filename' directly */ /* Get the required size from the image */ total_size = bdrv_getlength(bs); if (total_size < 0) { error_setg_errno(errp, -total_size, "Could not get image size"); goto out; } /* Create the temporary image */ ret = get_tmp_filename(tmp_filename, PATH_MAX + 1); if (ret < 0) { error_setg_errno(errp, -ret, "Could not get temporary filename"); goto out; } opts = qemu_opts_create(bdrv_qcow2.create_opts, NULL, 0, &error_abort); qemu_opt_set_number(opts, BLOCK_OPT_SIZE, total_size, &error_abort); ret = bdrv_create(&bdrv_qcow2, tmp_filename, opts, errp); qemu_opts_del(opts); if (ret < 0) { error_prepend(errp, "Could not create temporary overlay '%s': ", tmp_filename); goto out; } /* Prepare options QDict for the temporary file */ qdict_put_str(snapshot_options, "file.driver", "file"); qdict_put_str(snapshot_options, "file.filename", tmp_filename); qdict_put_str(snapshot_options, "driver", "qcow2"); bs_snapshot = bdrv_open(NULL, NULL, snapshot_options, flags, errp); snapshot_options = NULL; if (!bs_snapshot) { ret = -EINVAL; goto out; } /* bdrv_append() consumes a strong reference to bs_snapshot (i.e. it will * call bdrv_unref() on it), so in order to be able to return one, we have * to increase bs_snapshot's refcount here */ bdrv_ref(bs_snapshot); bdrv_append(bs_snapshot, bs, &local_err); if (local_err) { error_propagate(errp, local_err); ret = -EINVAL; goto out; } g_free(tmp_filename); return bs_snapshot; out: QDECREF(snapshot_options); g_free(tmp_filename); return NULL; }


int qdev_prop_set_drive(DeviceState *dev, const char *name, BlockDriverState *value) { int res; res = bdrv_attach(value, dev); if (res < 0) { error_report("Can't attach drive %s to %s.%s: %s", bdrv_get_device_name(value), dev->id ? dev->id : dev->info->name, name, strerror(-res)); return -1; } qdev_prop_set(dev, name, &value, PROP_TYPE_DRIVE); return 0; }


static inline int cris_lz(int x) { int r; asm ("lz\t%1, %0\n" : "=r" (r) : "r" (x)); return r; }


static void amdvi_class_init(ObjectClass *klass, void* data) { DeviceClass *dc = DEVICE_CLASS(klass); X86IOMMUClass *dc_class = X86_IOMMU_CLASS(klass); dc->reset = amdvi_reset; dc->vmsd = &vmstate_amdvi; dc->hotpluggable = false; dc_class->realize = amdvi_realize; }


static void pci_ehci_config(void) { /* hands over all ports from companion uhci to ehci */ qpci_io_writew(ehci1.dev, ehci1.base + 0x60, 1); }


static int v9fs_synth_renameat(FsContext *ctx, V9fsPath *olddir, const char *old_name, V9fsPath *newdir, const char *new_name) { errno = EPERM; return -1; }


static int vmdk_write_cid(BlockDriverState *bs, uint32_t cid) { char desc[DESC_SIZE], tmp_desc[DESC_SIZE]; char *p_name, *tmp_str; BDRVVmdkState *s = bs->opaque; memset(desc, 0, sizeof(desc)); if (bdrv_pread(bs->file, s->desc_offset, desc, DESC_SIZE) != DESC_SIZE) { return -EIO; } tmp_str = strstr(desc,"parentCID"); pstrcpy(tmp_desc, sizeof(tmp_desc), tmp_str); if ((p_name = strstr(desc,"CID")) != NULL) { p_name += sizeof("CID"); snprintf(p_name, sizeof(desc) - (p_name - desc), "%x\n", cid); pstrcat(desc, sizeof(desc), tmp_desc); } if (bdrv_pwrite_sync(bs->file, s->desc_offset, desc, DESC_SIZE) < 0) { return -EIO; } return 0; }


static void qemu_signal_lock(unsigned int msecs) { qemu_mutex_lock(&qemu_fair_mutex); while (qemu_mutex_trylock(&qemu_global_mutex)) { qemu_thread_signal(tcg_cpu_thread, SIGUSR1); if (!qemu_mutex_timedlock(&qemu_global_mutex, msecs)) break; } qemu_mutex_unlock(&qemu_fair_mutex); }


static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt, int u, int sel, int h) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); TCGv t0 = tcg_temp_local_new(); gen_load_gpr(t0, rt); if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 && ((env->tcs[other_tc].CP0_TCBind & (0xf << CP0TCBd_CurVPE)) != (env->active_tc.CP0_TCBind & (0xf << CP0TCBd_CurVPE)))) /* NOP */ ; else if ((env->CP0_VPEControl & (0xff << CP0VPECo_TargTC)) > (env->mvp->CP0_MVPConf0 & (0xff << CP0MVPC0_PTC))) /* NOP */ ; else if (u == 0) { switch (rd) { case 1: switch (sel) { case 1: gen_helper_mttc0_vpecontrol(cpu_env, t0); break; case 2: gen_helper_mttc0_vpeconf0(cpu_env, t0); break; default: goto die; break; } break; case 2: switch (sel) { case 1: gen_helper_mttc0_tcstatus(cpu_env, t0); break; case 2: gen_helper_mttc0_tcbind(cpu_env, t0); break; case 3: gen_helper_mttc0_tcrestart(cpu_env, t0); break; case 4: gen_helper_mttc0_tchalt(cpu_env, t0); break; case 5: gen_helper_mttc0_tccontext(cpu_env, t0); break; case 6: gen_helper_mttc0_tcschedule(cpu_env, t0); break; case 7: gen_helper_mttc0_tcschefback(cpu_env, t0); break; default: gen_mtc0(ctx, t0, rd, sel); break; } break; case 10: switch (sel) { case 0: gen_helper_mttc0_entryhi(cpu_env, t0); break; default: gen_mtc0(ctx, t0, rd, sel); break; } case 12: switch (sel) { case 0: gen_helper_mttc0_status(cpu_env, t0); break; default: gen_mtc0(ctx, t0, rd, sel); break; } case 13: switch (sel) { case 0: gen_helper_mttc0_cause(cpu_env, t0); break; default: goto die; break; } break; case 15: switch (sel) { case 1: gen_helper_mttc0_ebase(cpu_env, t0); break; default: goto die; break; } break; case 23: switch (sel) { case 0: gen_helper_mttc0_debug(cpu_env, t0); break; default: gen_mtc0(ctx, t0, rd, sel); break; } break; default: gen_mtc0(ctx, t0, rd, sel); } } else switch (sel) { /* GPR registers. */ case 0: gen_helper_0e1i(mttgpr, t0, rd); break; /* Auxiliary CPU registers */ case 1: switch (rd) { case 0: gen_helper_0e1i(mttlo, t0, 0); break; case 1: gen_helper_0e1i(mtthi, t0, 0); break; case 2: gen_helper_0e1i(mttacx, t0, 0); break; case 4: gen_helper_0e1i(mttlo, t0, 1); break; case 5: gen_helper_0e1i(mtthi, t0, 1); break; case 6: gen_helper_0e1i(mttacx, t0, 1); break; case 8: gen_helper_0e1i(mttlo, t0, 2); break; case 9: gen_helper_0e1i(mtthi, t0, 2); break; case 10: gen_helper_0e1i(mttacx, t0, 2); break; case 12: gen_helper_0e1i(mttlo, t0, 3); break; case 13: gen_helper_0e1i(mtthi, t0, 3); break; case 14: gen_helper_0e1i(mttacx, t0, 3); break; case 16: gen_helper_mttdsp(cpu_env, t0); break; default: goto die; } break; /* Floating point (COP1). */ case 2: /* XXX: For now we support only a single FPU context. */ if (h == 0) { TCGv_i32 fp0 = tcg_temp_new_i32(); tcg_gen_trunc_tl_i32(fp0, t0); gen_store_fpr32(fp0, rd); tcg_temp_free_i32(fp0); } else { TCGv_i32 fp0 = tcg_temp_new_i32(); tcg_gen_trunc_tl_i32(fp0, t0); gen_store_fpr32h(fp0, rd); tcg_temp_free_i32(fp0); } break; case 3: /* XXX: For now we support only a single FPU context. */ { TCGv_i32 fs_tmp = tcg_const_i32(rd); gen_helper_0e2i(ctc1, t0, fs_tmp, rt); tcg_temp_free_i32(fs_tmp); } break; /* COP2: Not implemented. */ case 4: case 5: /* fall through */ default: goto die; } LOG_DISAS("mttr (reg %d u %d sel %d h %d)\n", rd, u, sel, h); tcg_temp_free(t0); return; die: tcg_temp_free(t0); LOG_DISAS("mttr (reg %d u %d sel %d h %d)\n", rd, u, sel, h); generate_exception(ctx, EXCP_RI); }


int net_init_slirp(const NetClientOptions *opts, const char *name, NetClientState *peer, Error **errp) { /* FIXME error_setg(errp, ...) on failure */ struct slirp_config_str *config; char *vnet; int ret; const NetdevUserOptions *user; const char **dnssearch; assert(opts->kind == NET_CLIENT_OPTIONS_KIND_USER); user = opts->user; vnet = user->has_net ? g_strdup(user->net) : user->has_ip ? g_strdup_printf("%s/24", user->ip) : NULL; dnssearch = slirp_dnssearch(user->dnssearch); /* all optional fields are initialized to "all bits zero" */ net_init_slirp_configs(user->hostfwd, SLIRP_CFG_HOSTFWD); net_init_slirp_configs(user->guestfwd, 0); ret = net_slirp_init(peer, "user", name, user->q_restrict, vnet, user->host, user->hostname, user->tftp, user->bootfile, user->dhcpstart, user->dns, user->smb, user->smbserver, dnssearch); while (slirp_configs) { config = slirp_configs; slirp_configs = config->next; g_free(config); } g_free(vnet); g_free(dnssearch); return ret; }


void bdrv_detach(BlockDriverState *bs, DeviceState *qdev) { assert(bs->peer == qdev); bs->peer = NULL; bs->change_cb = NULL; bs->change_opaque = NULL; }


static void vmsa_ttbcr_reset(CPUARMState *env, const ARMCPRegInfo *ri) { env->cp15.c2_base_mask = 0xffffc000u; env->cp15.c2_control = 0; env->cp15.c2_mask = 0; }


static inline void helper_ret_protected(int shift, int is_iret, int addend) { uint32_t sp, new_cs, new_eip, new_eflags, new_esp, new_ss; uint32_t new_es, new_ds, new_fs, new_gs; uint32_t e1, e2, ss_e1, ss_e2; int cpl, dpl, rpl, eflags_mask; uint8_t *ssp; sp = ESP; if (!(env->segs[R_SS].flags & DESC_B_MASK)) sp &= 0xffff; ssp = env->segs[R_SS].base + sp; if (shift == 1) { /* 32 bits */ if (is_iret) new_eflags = ldl_kernel(ssp + 8); new_cs = ldl_kernel(ssp + 4) & 0xffff; new_eip = ldl_kernel(ssp); if (is_iret && (new_eflags & VM_MASK)) goto return_to_vm86; } else { /* 16 bits */ if (is_iret) new_eflags = lduw_kernel(ssp + 4); new_cs = lduw_kernel(ssp + 2); new_eip = lduw_kernel(ssp); } if ((new_cs & 0xfffc) == 0) raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc); if (load_segment(&e1, &e2, new_cs) != 0) raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc); if (!(e2 & DESC_S_MASK) || !(e2 & DESC_CS_MASK)) raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc); cpl = env->hflags & HF_CPL_MASK; rpl = new_cs & 3; if (rpl < cpl) raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc); dpl = (e2 >> DESC_DPL_SHIFT) & 3; if (e2 & DESC_CS_MASK) { if (dpl > rpl) raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc); } else { if (dpl != rpl) raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc); } if (!(e2 & DESC_P_MASK)) raise_exception_err(EXCP0B_NOSEG, new_cs & 0xfffc); if (rpl == cpl) { /* return to same priledge level */ cpu_x86_load_seg_cache(env, R_CS, new_cs, get_seg_base(e1, e2), get_seg_limit(e1, e2), e2); new_esp = sp + (4 << shift) + ((2 * is_iret) << shift) + addend; } else { /* return to different priviledge level */ ssp += (4 << shift) + ((2 * is_iret) << shift) + addend; if (shift == 1) { /* 32 bits */ new_esp = ldl_kernel(ssp); new_ss = ldl_kernel(ssp + 4) & 0xffff; } else { /* 16 bits */ new_esp = lduw_kernel(ssp); new_ss = lduw_kernel(ssp + 2); } if ((new_ss & 3) != rpl) raise_exception_err(EXCP0D_GPF, new_ss & 0xfffc); if (load_segment(&ss_e1, &ss_e2, new_ss) != 0) raise_exception_err(EXCP0D_GPF, new_ss & 0xfffc); if (!(ss_e2 & DESC_S_MASK) || (ss_e2 & DESC_CS_MASK) || !(ss_e2 & DESC_W_MASK)) raise_exception_err(EXCP0D_GPF, new_ss & 0xfffc); dpl = (ss_e2 >> DESC_DPL_SHIFT) & 3; if (dpl != rpl) raise_exception_err(EXCP0D_GPF, new_ss & 0xfffc); if (!(ss_e2 & DESC_P_MASK)) raise_exception_err(EXCP0B_NOSEG, new_ss & 0xfffc); cpu_x86_load_seg_cache(env, R_CS, new_cs, get_seg_base(e1, e2), get_seg_limit(e1, e2), e2); cpu_x86_load_seg_cache(env, R_SS, new_ss, get_seg_base(ss_e1, ss_e2), get_seg_limit(ss_e1, ss_e2), ss_e2); cpu_x86_set_cpl(env, rpl); } if (env->segs[R_SS].flags & DESC_B_MASK) ESP = new_esp; else ESP = (ESP & 0xffff0000) | (new_esp & 0xffff); env->eip = new_eip; if (is_iret) { /* NOTE: 'cpl' can be different from the current CPL */ if (cpl == 0) eflags_mask = FL_UPDATE_CPL0_MASK; else eflags_mask = FL_UPDATE_MASK32; if (shift == 0) eflags_mask &= 0xffff; load_eflags(new_eflags, eflags_mask); } return; return_to_vm86: new_esp = ldl_kernel(ssp + 12); new_ss = ldl_kernel(ssp + 16); new_es = ldl_kernel(ssp + 20); new_ds = ldl_kernel(ssp + 24); new_fs = ldl_kernel(ssp + 28); new_gs = ldl_kernel(ssp + 32); /* modify processor state */ load_eflags(new_eflags, FL_UPDATE_CPL0_MASK | VM_MASK | VIF_MASK | VIP_MASK); load_seg_vm(R_CS, new_cs); cpu_x86_set_cpl(env, 3); load_seg_vm(R_SS, new_ss); load_seg_vm(R_ES, new_es); load_seg_vm(R_DS, new_ds); load_seg_vm(R_FS, new_fs); load_seg_vm(R_GS, new_gs); env->eip = new_eip; ESP = new_esp; }


static int vnc_refresh_lossy_rect(VncDisplay *vd, int x, int y) { VncState *vs; int sty = y / VNC_STAT_RECT; int stx = x / VNC_STAT_RECT; int has_dirty = 0; y = y / VNC_STAT_RECT * VNC_STAT_RECT; x = x / VNC_STAT_RECT * VNC_STAT_RECT; QTAILQ_FOREACH(vs, &vd->clients, next) { int j; /* kernel send buffers are full -> refresh later */ if (vs->output.offset) { continue; } if (!vs->lossy_rect[sty][stx]) { continue; } vs->lossy_rect[sty][stx] = 0; for (j = 0; j < VNC_STAT_RECT; ++j) { vnc_set_bits(vs->dirty[y + j], x / 16, VNC_STAT_RECT / 16); } has_dirty++; } return has_dirty; }


void cpu_exec_step_atomic(CPUState *cpu) { start_exclusive(); /* Since we got here, we know that parallel_cpus must be true. */ parallel_cpus = false; cpu_exec_step(cpu); parallel_cpus = true; end_exclusive(); }


void acpi_build(AcpiBuildTables *tables) { PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); GArray *table_offsets; unsigned facs, dsdt, rsdt, fadt; AcpiCpuInfo cpu; AcpiPmInfo pm; AcpiMiscInfo misc; AcpiMcfgInfo mcfg; PcPciInfo pci; uint8_t *u; size_t aml_len = 0; GArray *tables_blob = tables->table_data; AcpiSlicOem slic_oem = { .id = NULL, .table_id = NULL }; acpi_get_cpu_info(&cpu); acpi_get_pm_info(&pm); acpi_get_misc_info(&misc); acpi_get_pci_info(&pci); acpi_get_slic_oem(&slic_oem); table_offsets = g_array_new(false, true /* clear */, sizeof(uint32_t)); ACPI_BUILD_DPRINTF("init ACPI tables\n"); bios_linker_loader_alloc(tables->linker, ACPI_BUILD_TABLE_FILE, 64 /* Ensure FACS is aligned */, false /* high memory */); /* * FACS is pointed to by FADT. * We place it first since it's the only table that has alignment * requirements. */ facs = tables_blob->len; build_facs(tables_blob, tables->linker); /* DSDT is pointed to by FADT */ dsdt = tables_blob->len; build_dsdt(tables_blob, tables->linker, &cpu, &pm, &misc, &pci); /* Count the size of the DSDT and SSDT, we will need it for legacy * sizing of ACPI tables. */ aml_len += tables_blob->len - dsdt; /* ACPI tables pointed to by RSDT */ fadt = tables_blob->len; acpi_add_table(table_offsets, tables_blob); build_fadt(tables_blob, tables->linker, &pm, facs, dsdt, slic_oem.id, slic_oem.table_id); aml_len += tables_blob->len - fadt; acpi_add_table(table_offsets, tables_blob); build_madt(tables_blob, tables->linker, &cpu); if (misc.has_hpet) { acpi_add_table(table_offsets, tables_blob); build_hpet(tables_blob, tables->linker); } if (misc.tpm_version != TPM_VERSION_UNSPEC) { acpi_add_table(table_offsets, tables_blob); build_tpm_tcpa(tables_blob, tables->linker, tables->tcpalog); if (misc.tpm_version == TPM_VERSION_2_0) { acpi_add_table(table_offsets, tables_blob); build_tpm2(tables_blob, tables->linker); } } if (pcms->numa_nodes) { acpi_add_table(table_offsets, tables_blob); build_srat(tables_blob, tables->linker); } if (acpi_get_mcfg(&mcfg)) { acpi_add_table(table_offsets, tables_blob); build_mcfg_q35(tables_blob, tables->linker, &mcfg); } if (acpi_has_iommu()) { acpi_add_table(table_offsets, tables_blob); build_dmar_q35(tables_blob, tables->linker); } if (acpi_has_nvdimm()) { nvdimm_build_acpi(table_offsets, tables_blob, tables->linker); } /* Add tables supplied by user (if any) */ for (u = acpi_table_first(); u; u = acpi_table_next(u)) { unsigned len = acpi_table_len(u); acpi_add_table(table_offsets, tables_blob); g_array_append_vals(tables_blob, u, len); } /* RSDT is pointed to by RSDP */ rsdt = tables_blob->len; build_rsdt(tables_blob, tables->linker, table_offsets, slic_oem.id, slic_oem.table_id); /* RSDP is in FSEG memory, so allocate it separately */ build_rsdp(tables->rsdp, tables->linker, rsdt); /* We'll expose it all to Guest so we want to reduce * chance of size changes. * * We used to align the tables to 4k, but of course this would * too simple to be enough. 4k turned out to be too small an * alignment very soon, and in fact it is almost impossible to * keep the table size stable for all (max_cpus, max_memory_slots) * combinations. So the table size is always 64k for pc-i440fx-2.1 * and we give an error if the table grows beyond that limit. * * We still have the problem of migrating from "-M pc-i440fx-2.0". For * that, we exploit the fact that QEMU 2.1 generates _smaller_ tables * than 2.0 and we can always pad the smaller tables with zeros. We can * then use the exact size of the 2.0 tables. * * All this is for PIIX4, since QEMU 2.0 didn't support Q35 migration. */ if (pcmc->legacy_acpi_table_size) { /* Subtracting aml_len gives the size of fixed tables. Then add the * size of the PIIX4 DSDT/SSDT in QEMU 2.0. */ int legacy_aml_len = pcmc->legacy_acpi_table_size + ACPI_BUILD_LEGACY_CPU_AML_SIZE * max_cpus; int legacy_table_size = ROUND_UP(tables_blob->len - aml_len + legacy_aml_len, ACPI_BUILD_ALIGN_SIZE); if (tables_blob->len > legacy_table_size) { /* Should happen only with PCI bridges and -M pc-i440fx-2.0. */ error_report("Warning: migration may not work."); } g_array_set_size(tables_blob, legacy_table_size); } else { /* Make sure we have a buffer in case we need to resize the tables. */ if (tables_blob->len > ACPI_BUILD_TABLE_SIZE / 2) { /* As of QEMU 2.1, this fires with 160 VCPUs and 255 memory slots. */ error_report("Warning: ACPI tables are larger than 64k."); error_report("Warning: migration may not work."); error_report("Warning: please remove CPUs, NUMA nodes, " "memory slots or PCI bridges."); } acpi_align_size(tables_blob, ACPI_BUILD_TABLE_SIZE); } acpi_align_size(tables->linker, ACPI_BUILD_ALIGN_SIZE); /* Cleanup memory that's no longer used. */ g_array_free(table_offsets, true); }


static void qnull_destroy_obj(QObject *obj) { assert(0); }


void hmp_info_snapshots(Monitor *mon, const QDict *qdict) { BlockDriverState *bs, *bs1; QEMUSnapshotInfo *sn_tab, *sn, s, *sn_info = &s; int nb_sns, i, ret, available; int total; int *available_snapshots; bs = find_vmstate_bs(); if (!bs) { monitor_printf(mon, "No available block device supports snapshots\n"); return; } nb_sns = bdrv_snapshot_list(bs, &sn_tab); if (nb_sns < 0) { monitor_printf(mon, "bdrv_snapshot_list: error %d\n", nb_sns); return; } if (nb_sns == 0) { monitor_printf(mon, "There is no snapshot available.\n"); return; } available_snapshots = g_new0(int, nb_sns); total = 0; for (i = 0; i < nb_sns; i++) { sn = &sn_tab[i]; available = 1; bs1 = NULL; while ((bs1 = bdrv_next(bs1))) { if (bdrv_can_snapshot(bs1) && bs1 != bs) { ret = bdrv_snapshot_find(bs1, sn_info, sn->id_str); if (ret < 0) { available = 0; break; } } } if (available) { available_snapshots[total] = i; total++; } } if (total > 0) { bdrv_snapshot_dump((fprintf_function)monitor_printf, mon, NULL); monitor_printf(mon, "\n"); for (i = 0; i < total; i++) { sn = &sn_tab[available_snapshots[i]]; bdrv_snapshot_dump((fprintf_function)monitor_printf, mon, sn); monitor_printf(mon, "\n"); } } else { monitor_printf(mon, "There is no suitable snapshot available\n"); } g_free(sn_tab); g_free(available_snapshots); }


static void set_fifodepth(MSSSpiState *s) { unsigned int size = s->regs[R_SPI_DFSIZE] & FRAMESZ_MASK; if (size <= 8) { s->fifo_depth = 32; } else if (size <= 16) { s->fifo_depth = 16; } else if (size <= 32) { s->fifo_depth = 8; } else { s->fifo_depth = 4; } }


void qdev_unplug(DeviceState *dev, Error **errp) { DeviceClass *dc = DEVICE_GET_CLASS(dev); if (!dev->parent_bus->allow_hotplug) { error_set(errp, QERR_BUS_NO_HOTPLUG, dev->parent_bus->name); return; } assert(dc->unplug != NULL); qdev_hot_removed = true; if (dc->unplug(dev) < 0) { error_set(errp, QERR_UNDEFINED_ERROR); return; } }


int rom_add_file(const char *file, const char *fw_dir, const char *fw_file, target_phys_addr_t addr) { Rom *rom; int rc, fd = -1; rom = qemu_mallocz(sizeof(*rom)); rom->name = qemu_strdup(file); rom->path = qemu_find_file(QEMU_FILE_TYPE_BIOS, rom->name); if (rom->path == NULL) { rom->path = qemu_strdup(file); } fd = open(rom->path, O_RDONLY | O_BINARY); if (fd == -1) { fprintf(stderr, "Could not open option rom '%s': %s\n", rom->path, strerror(errno)); goto err; } rom->fw_dir = fw_dir ? qemu_strdup(fw_dir) : NULL; rom->fw_file = fw_file ? qemu_strdup(fw_file) : NULL; rom->addr = addr; rom->romsize = lseek(fd, 0, SEEK_END); rom->data = qemu_mallocz(rom->romsize); lseek(fd, 0, SEEK_SET); rc = read(fd, rom->data, rom->romsize); if (rc != rom->romsize) { fprintf(stderr, "rom: file %-20s: read error: rc=%d (expected %zd)\n", rom->name, rc, rom->romsize); goto err; } close(fd); rom_insert(rom); return 0; err: if (fd != -1) close(fd); qemu_free(rom->data); qemu_free(rom->path); qemu_free(rom->name); qemu_free(rom); return -1; }


static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val) { IDEState *ide_if = opaque; IDEState *s; int unit, n; int lba48 = 0; #ifdef DEBUG_IDE printf("IDE: write addr=0x%x val=0x%02x\n", addr, val); #endif addr &= 7; /* ignore writes to command block while busy with previous command */ if (addr != 7 && (ide_if->cur_drive->status & (BUSY_STAT|DRQ_STAT))) return; switch(addr) { case 0: break; case 1: ide_clear_hob(ide_if); /* NOTE: data is written to the two drives */ ide_if[0].hob_feature = ide_if[0].feature; ide_if[1].hob_feature = ide_if[1].feature; ide_if[0].feature = val; ide_if[1].feature = val; break; case 2: ide_clear_hob(ide_if); ide_if[0].hob_nsector = ide_if[0].nsector; ide_if[1].hob_nsector = ide_if[1].nsector; ide_if[0].nsector = val; ide_if[1].nsector = val; break; case 3: ide_clear_hob(ide_if); ide_if[0].hob_sector = ide_if[0].sector; ide_if[1].hob_sector = ide_if[1].sector; ide_if[0].sector = val; ide_if[1].sector = val; break; case 4: ide_clear_hob(ide_if); ide_if[0].hob_lcyl = ide_if[0].lcyl; ide_if[1].hob_lcyl = ide_if[1].lcyl; ide_if[0].lcyl = val; ide_if[1].lcyl = val; break; case 5: ide_clear_hob(ide_if); ide_if[0].hob_hcyl = ide_if[0].hcyl; ide_if[1].hob_hcyl = ide_if[1].hcyl; ide_if[0].hcyl = val; ide_if[1].hcyl = val; break; case 6: /* FIXME: HOB readback uses bit 7 */ ide_if[0].select = (val & ~0x10) | 0xa0; ide_if[1].select = (val | 0x10) | 0xa0; /* select drive */ unit = (val >> 4) & 1; s = ide_if + unit; ide_if->cur_drive = s; break; default: case 7: /* command */ #if defined(DEBUG_IDE) printf("ide: CMD=%02x\n", val); #endif s = ide_if->cur_drive; /* ignore commands to non existant slave */ if (s != ide_if && !s->bs) break; /* Only DEVICE RESET is allowed while BSY or/and DRQ are set */ if ((s->status & (BUSY_STAT|DRQ_STAT)) && val != WIN_DEVICE_RESET) break; switch(val) { case WIN_IDENTIFY: if (s->bs && !s->is_cdrom) { if (!s->is_cf) ide_identify(s); else ide_cfata_identify(s); s->status = READY_STAT | SEEK_STAT; ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop); } else { if (s->is_cdrom) { ide_set_signature(s); } ide_abort_command(s); } ide_set_irq(s); break; case WIN_SPECIFY: case WIN_RECAL: s->error = 0; s->status = READY_STAT | SEEK_STAT; ide_set_irq(s); break; case WIN_SETMULT: if (s->is_cf && s->nsector == 0) { /* Disable Read and Write Multiple */ s->mult_sectors = 0; s->status = READY_STAT | SEEK_STAT; } else if ((s->nsector & 0xff) != 0 && ((s->nsector & 0xff) > MAX_MULT_SECTORS || (s->nsector & (s->nsector - 1)) != 0)) { ide_abort_command(s); } else { s->mult_sectors = s->nsector & 0xff; s->status = READY_STAT | SEEK_STAT; } ide_set_irq(s); break; case WIN_VERIFY_EXT: lba48 = 1; case WIN_VERIFY: case WIN_VERIFY_ONCE: /* do sector number check ? */ ide_cmd_lba48_transform(s, lba48); s->status = READY_STAT | SEEK_STAT; ide_set_irq(s); break; case WIN_READ_EXT: lba48 = 1; case WIN_READ: case WIN_READ_ONCE: if (!s->bs) goto abort_cmd; ide_cmd_lba48_transform(s, lba48); s->req_nb_sectors = 1; ide_sector_read(s); break; case WIN_WRITE_EXT: lba48 = 1; case WIN_WRITE: case WIN_WRITE_ONCE: case CFA_WRITE_SECT_WO_ERASE: case WIN_WRITE_VERIFY: ide_cmd_lba48_transform(s, lba48); s->error = 0; s->status = SEEK_STAT | READY_STAT; s->req_nb_sectors = 1; ide_transfer_start(s, s->io_buffer, 512, ide_sector_write); s->media_changed = 1; break; case WIN_MULTREAD_EXT: lba48 = 1; case WIN_MULTREAD: if (!s->mult_sectors) goto abort_cmd; ide_cmd_lba48_transform(s, lba48); s->req_nb_sectors = s->mult_sectors; ide_sector_read(s); break; case WIN_MULTWRITE_EXT: lba48 = 1; case WIN_MULTWRITE: case CFA_WRITE_MULTI_WO_ERASE: if (!s->mult_sectors) goto abort_cmd; ide_cmd_lba48_transform(s, lba48); s->error = 0; s->status = SEEK_STAT | READY_STAT; s->req_nb_sectors = s->mult_sectors; n = s->nsector; if (n > s->req_nb_sectors) n = s->req_nb_sectors; ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write); s->media_changed = 1; break; case WIN_READDMA_EXT: lba48 = 1; case WIN_READDMA: case WIN_READDMA_ONCE: if (!s->bs) goto abort_cmd; ide_cmd_lba48_transform(s, lba48); ide_sector_read_dma(s); break; case WIN_WRITEDMA_EXT: lba48 = 1; case WIN_WRITEDMA: case WIN_WRITEDMA_ONCE: if (!s->bs) goto abort_cmd; ide_cmd_lba48_transform(s, lba48); ide_sector_write_dma(s); s->media_changed = 1; break; case WIN_READ_NATIVE_MAX_EXT: lba48 = 1; case WIN_READ_NATIVE_MAX: ide_cmd_lba48_transform(s, lba48); ide_set_sector(s, s->nb_sectors - 1); s->status = READY_STAT | SEEK_STAT; ide_set_irq(s); break; case WIN_CHECKPOWERMODE1: case WIN_CHECKPOWERMODE2: s->nsector = 0xff; /* device active or idle */ s->status = READY_STAT | SEEK_STAT; ide_set_irq(s); break; case WIN_SETFEATURES: if (!s->bs) goto abort_cmd; /* XXX: valid for CDROM ? */ switch(s->feature) { case 0xcc: /* reverting to power-on defaults enable */ case 0x66: /* reverting to power-on defaults disable */ case 0x02: /* write cache enable */ case 0x82: /* write cache disable */ case 0xaa: /* read look-ahead enable */ case 0x55: /* read look-ahead disable */ case 0x05: /* set advanced power management mode */ case 0x85: /* disable advanced power management mode */ case 0x69: /* NOP */ case 0x67: /* NOP */ case 0x96: /* NOP */ case 0x9a: /* NOP */ case 0x42: /* enable Automatic Acoustic Mode */ case 0xc2: /* disable Automatic Acoustic Mode */ s->status = READY_STAT | SEEK_STAT; ide_set_irq(s); break; case 0x03: { /* set transfer mode */ uint8_t val = s->nsector & 0x07; switch (s->nsector >> 3) { case 0x00: /* pio default */ case 0x01: /* pio mode */ put_le16(s->identify_data + 62,0x07); put_le16(s->identify_data + 63,0x07); put_le16(s->identify_data + 88,0x3f); break; case 0x02: /* sigle word dma mode*/ put_le16(s->identify_data + 62,0x07 | (1 << (val + 8))); put_le16(s->identify_data + 63,0x07); put_le16(s->identify_data + 88,0x3f); break; case 0x04: /* mdma mode */ put_le16(s->identify_data + 62,0x07); put_le16(s->identify_data + 63,0x07 | (1 << (val + 8))); put_le16(s->identify_data + 88,0x3f); break; case 0x08: /* udma mode */ put_le16(s->identify_data + 62,0x07); put_le16(s->identify_data + 63,0x07); put_le16(s->identify_data + 88,0x3f | (1 << (val + 8))); break; default: goto abort_cmd; } s->status = READY_STAT | SEEK_STAT; ide_set_irq(s); break; } default: goto abort_cmd; } break; case WIN_FLUSH_CACHE: case WIN_FLUSH_CACHE_EXT: if (s->bs) bdrv_flush(s->bs); s->status = READY_STAT | SEEK_STAT; ide_set_irq(s); break; case WIN_STANDBY: case WIN_STANDBY2: case WIN_STANDBYNOW1: case WIN_STANDBYNOW2: case WIN_IDLEIMMEDIATE: case CFA_IDLEIMMEDIATE: case WIN_SETIDLE1: case WIN_SETIDLE2: case WIN_SLEEPNOW1: case WIN_SLEEPNOW2: s->status = READY_STAT; ide_set_irq(s); break; /* ATAPI commands */ case WIN_PIDENTIFY: if (s->is_cdrom) { ide_atapi_identify(s); s->status = READY_STAT | SEEK_STAT; ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop); } else { ide_abort_command(s); } ide_set_irq(s); break; case WIN_DIAGNOSE: ide_set_signature(s); s->status = READY_STAT | SEEK_STAT; s->error = 0x01; ide_set_irq(s); break; case WIN_SRST: if (!s->is_cdrom) goto abort_cmd; ide_set_signature(s); s->status = 0x00; /* NOTE: READY is _not_ set */ s->error = 0x01; break; case WIN_PACKETCMD: if (!s->is_cdrom) goto abort_cmd; /* overlapping commands not supported */ if (s->feature & 0x02) goto abort_cmd; s->status = READY_STAT | SEEK_STAT; s->atapi_dma = s->feature & 1; s->nsector = 1; ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE, ide_atapi_cmd); break; /* CF-ATA commands */ case CFA_REQ_EXT_ERROR_CODE: if (!s->is_cf) goto abort_cmd; s->error = 0x09; /* miscellaneous error */ s->status = READY_STAT | SEEK_STAT; ide_set_irq(s); break; case CFA_ERASE_SECTORS: case CFA_WEAR_LEVEL: if (!s->is_cf) goto abort_cmd; if (val == CFA_WEAR_LEVEL) s->nsector = 0; if (val == CFA_ERASE_SECTORS) s->media_changed = 1; s->error = 0x00; s->status = READY_STAT | SEEK_STAT; ide_set_irq(s); break; case CFA_TRANSLATE_SECTOR: if (!s->is_cf) goto abort_cmd; s->error = 0x00; s->status = READY_STAT | SEEK_STAT; memset(s->io_buffer, 0, 0x200); s->io_buffer[0x00] = s->hcyl; /* Cyl MSB */ s->io_buffer[0x01] = s->lcyl; /* Cyl LSB */ s->io_buffer[0x02] = s->select; /* Head */ s->io_buffer[0x03] = s->sector; /* Sector */ s->io_buffer[0x04] = ide_get_sector(s) >> 16; /* LBA MSB */ s->io_buffer[0x05] = ide_get_sector(s) >> 8; /* LBA */ s->io_buffer[0x06] = ide_get_sector(s) >> 0; /* LBA LSB */ s->io_buffer[0x13] = 0x00; /* Erase flag */ s->io_buffer[0x18] = 0x00; /* Hot count */ s->io_buffer[0x19] = 0x00; /* Hot count */ s->io_buffer[0x1a] = 0x01; /* Hot count */ ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop); ide_set_irq(s); break; case CFA_ACCESS_METADATA_STORAGE: if (!s->is_cf) goto abort_cmd; switch (s->feature) { case 0x02: /* Inquiry Metadata Storage */ ide_cfata_metadata_inquiry(s); break; case 0x03: /* Read Metadata Storage */ ide_cfata_metadata_read(s); break; case 0x04: /* Write Metadata Storage */ ide_cfata_metadata_write(s); break; default: goto abort_cmd; } ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop); s->status = 0x00; /* NOTE: READY is _not_ set */ ide_set_irq(s); break; case IBM_SENSE_CONDITION: if (!s->is_cf) goto abort_cmd; switch (s->feature) { case 0x01: /* sense temperature in device */ s->nsector = 0x50; /* +20 C */ break; default: goto abort_cmd; } s->status = READY_STAT | SEEK_STAT; ide_set_irq(s); break; default: abort_cmd: ide_abort_command(s); ide_set_irq(s); break; } } }


_syscall3(int,sys_faccessat,int,dirfd,const char *,pathname,int,mode) #endif #if defined(TARGET_NR_fchmodat) && defined(__NR_fchmodat) _syscall3(int,sys_fchmodat,int,dirfd,const char *,pathname, mode_t,mode) #endif #if defined(TARGET_NR_fchownat) && defined(__NR_fchownat) && defined(USE_UID16) _syscall5(int,sys_fchownat,int,dirfd,const char *,pathname, uid_t,owner,gid_t,group,int,flags) #endif #if (defined(TARGET_NR_fstatat64) || defined(TARGET_NR_newfstatat)) && \ defined(__NR_fstatat64) _syscall4(int,sys_fstatat64,int,dirfd,const char *,pathname, struct stat *,buf,int,flags) #endif #if defined(TARGET_NR_futimesat) && defined(__NR_futimesat) _syscall3(int,sys_futimesat,int,dirfd,const char *,pathname, const struct timeval *,times) #endif #if (defined(TARGET_NR_newfstatat) || defined(TARGET_NR_fstatat64) ) && \ defined(__NR_newfstatat) _syscall4(int,sys_newfstatat,int,dirfd,const char *,pathname, struct stat *,buf,int,flags) #endif #if defined(TARGET_NR_linkat) && defined(__NR_linkat) _syscall5(int,sys_linkat,int,olddirfd,const char *,oldpath, int,newdirfd,const char *,newpath,int,flags) #endif #if defined(TARGET_NR_mkdirat) && defined(__NR_mkdirat) _syscall3(int,sys_mkdirat,int,dirfd,const char *,pathname,mode_t,mode) #endif #if defined(TARGET_NR_mknodat) && defined(__NR_mknodat) _syscall4(int,sys_mknodat,int,dirfd,const char *,pathname, mode_t,mode,dev_t,dev) #endif #if defined(TARGET_NR_openat) && defined(__NR_openat) _syscall4(int,sys_openat,int,dirfd,const char *,pathname,int,flags,mode_t,mode) #endif #if defined(TARGET_NR_readlinkat) && defined(__NR_readlinkat) _syscall4(int,sys_readlinkat,int,dirfd,const char *,pathname, char *,buf,size_t,bufsize) #endif #if defined(TARGET_NR_renameat) && defined(__NR_renameat) _syscall4(int,sys_renameat,int,olddirfd,const char *,oldpath, int,newdirfd,const char *,newpath) #endif #if defined(TARGET_NR_symlinkat) && defined(__NR_symlinkat) _syscall3(int,sys_symlinkat,const char *,oldpath, int,newdirfd,const char *,newpath) #endif #if defined(TARGET_NR_unlinkat) && defined(__NR_unlinkat) _syscall3(int,sys_unlinkat,int,dirfd,const char *,pathname,int,flags) #endif #if defined(TARGET_NR_utimensat) && defined(__NR_utimensat) _syscall4(int,sys_utimensat,int,dirfd,const char *,pathname, const struct timespec *,tsp,int,flags) #endif #endif /* CONFIG_ATFILE */ #ifdef CONFIG_INOTIFY #include <sys/inotify.h> #if defined(TARGET_NR_inotify_init) && defined(__NR_inotify_init) static int sys_inotify_init(void) { return (inotify_init()); }


static SocketAddress *sd_socket_address(const char *path, const char *host, const char *port) { SocketAddress *addr = g_new0(SocketAddress, 1); if (path) { addr->type = SOCKET_ADDRESS_KIND_UNIX; addr->u.q_unix.data = g_new0(UnixSocketAddress, 1); addr->u.q_unix.data->path = g_strdup(path); } else { addr->type = SOCKET_ADDRESS_KIND_INET; addr->u.inet.data = g_new0(InetSocketAddress, 1); addr->u.inet.data->host = g_strdup(host ?: SD_DEFAULT_ADDR); addr->u.inet.data->port = g_strdup(port ?: stringify(SD_DEFAULT_PORT)); } return addr; }


static void configure_alarms(char const *opt) { int i; int cur = 0; int count = (sizeof(alarm_timers) / sizeof(*alarm_timers)) - 1; char *arg; char *name; if (!strcmp(opt, "help")) { show_available_alarms(); exit(0); } arg = strdup(opt); /* Reorder the array */ name = strtok(arg, ","); while (name) { struct qemu_alarm_timer tmp; for (i = 0; i < count; i++) { if (!strcmp(alarm_timers[i].name, name)) break; } if (i == count) { fprintf(stderr, "Unknown clock %s\n", name); goto next; } if (i < cur) /* Ignore */ goto next; /* Swap */ tmp = alarm_timers[i]; alarm_timers[i] = alarm_timers[cur]; alarm_timers[cur] = tmp; cur++; next: name = strtok(NULL, ","); } free(arg); if (cur) { /* Disable remaining timers */ for (i = cur; i < count; i++) alarm_timers[i].name = NULL; } /* debug */ show_available_alarms(); }


static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, sPAPRMachineState *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { target_ulong parameter = rtas_ld(args, 0); target_ulong buffer = rtas_ld(args, 1); target_ulong length = rtas_ld(args, 2); target_ulong ret; switch (parameter) { case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: { char *param_val = g_strdup_printf("MaxEntCap=%d," "DesMem=%llu," "DesProcs=%d," "MaxPlatProcs=%d", max_cpus, current_machine->ram_size / M_BYTE, smp_cpus, max_cpus); ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1); g_free(param_val); break; } case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: { uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED; ret = sysparm_st(buffer, length, &param_val, sizeof(param_val)); break; } case RTAS_SYSPARM_UUID: ret = sysparm_st(buffer, length, qemu_uuid, (qemu_uuid_set ? 16 : 0)); break; default: ret = RTAS_OUT_NOT_SUPPORTED; } rtas_st(rets, 0, ret); }


static void test_qemu_strtoull_trailing(void) { const char *str = "123xxx"; char f = 'X'; const char *endptr = &f; uint64_t res = 999; int err; err = qemu_strtoull(str, &endptr, 0, &res); g_assert_cmpint(err, ==, 0); g_assert_cmpint(res, ==, 123); g_assert(endptr == str + 3); }


void bdrv_set_dirty_bitmap(BdrvDirtyBitmap *bitmap, int64_t cur_sector, int64_t nr_sectors) { assert(bdrv_dirty_bitmap_enabled(bitmap)); hbitmap_set(bitmap->bitmap, cur_sector, nr_sectors); }


int kvm_has_xsave(void) { return kvm_state->xsave; }


static BlockDriverAIOCB *curl_aio_readv(BlockDriverState *bs, int64_t sector_num, QEMUIOVector *qiov, int nb_sectors, BlockDriverCompletionFunc *cb, void *opaque) { CURLAIOCB *acb; acb = qemu_aio_get(&curl_aiocb_info, bs, cb, opaque); acb->qiov = qiov; acb->sector_num = sector_num; acb->nb_sectors = nb_sectors; acb->bh = qemu_bh_new(curl_readv_bh_cb, acb); qemu_bh_schedule(acb->bh); return &acb->common; }


static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, target_ulong *pages, bool is_write) { bool lowprot = is_write && lowprot_enabled(&cpu->env); uint64_t asc = cpu->env.psw.mask & PSW_MASK_ASC; CPUS390XState *env = &cpu->env; int ret, i, pflags; for (i = 0; i < nr_pages; i++) { /* Low-address protection? */ if (lowprot && (addr < 512 || (addr >= 4096 && addr < 4096 + 512))) { trigger_access_exception(env, PGM_PROTECTION, ILEN_AUTO, 0); return -EACCES; } ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, true); if (ret) { return ret; } if (!address_space_access_valid(&address_space_memory, pages[i], TARGET_PAGE_SIZE, is_write)) { program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO); return -EFAULT; } addr += TARGET_PAGE_SIZE; } return 0; }


static unsigned int dec_move_sr(DisasContext *dc) { DIS(fprintf (logfile, "move $s%u, $r%u\n", dc->op2, dc->op1)); cris_cc_mask(dc, 0); tcg_gen_helper_0_2(helper_movl_reg_sreg, tcg_const_tl(dc->op1), tcg_const_tl(dc->op2)); return 2; }


static int xen_pt_msixctrl_reg_init(XenPCIPassthroughState *s, XenPTRegInfo *reg, uint32_t real_offset, uint32_t *data) { PCIDevice *d = &s->dev; uint16_t reg_field = 0; /* use I/O device register's value as initial value */ reg_field = pci_get_word(d->config + real_offset); if (reg_field & PCI_MSIX_FLAGS_ENABLE) { XEN_PT_LOG(d, "MSIX already enabled, disabling it first\n"); xen_host_pci_set_word(&s->real_device, real_offset, reg_field & ~PCI_MSIX_FLAGS_ENABLE); } s->msix->ctrl_offset = real_offset; *data = reg->init_val; return 0; }


static ssize_t v9fs_synth_readlink(FsContext *fs_ctx, V9fsPath *path, char *buf, size_t bufsz) { errno = ENOSYS; return -1; }


static bool cmd_read_dma(IDEState *s, uint8_t cmd) { bool lba48 = (cmd == WIN_READDMA_EXT); if (!s->bs) { ide_abort_command(s); return true; } ide_cmd_lba48_transform(s, lba48); ide_sector_start_dma(s, IDE_DMA_READ); return false; }


static void timer_start(SpiceTimer *timer, uint32_t ms) { qemu_mod_timer(timer->timer, qemu_get_clock(rt_clock) + ms); }


static int pci_pbm_init_device(SysBusDevice *dev) { APBState *s; int pci_mem_config, pci_mem_data, apb_config, pci_ioport; s = FROM_SYSBUS(APBState, dev); /* apb_config */ apb_config = cpu_register_io_memory(apb_config_read, apb_config_write, s); sysbus_init_mmio(dev, 0x40ULL, apb_config); /* pci_ioport */ pci_ioport = cpu_register_io_memory(pci_apb_ioread, pci_apb_iowrite, s); sysbus_init_mmio(dev, 0x10000ULL, pci_ioport); /* mem_config */ pci_mem_config = cpu_register_io_memory(pci_apb_config_read, pci_apb_config_write, s); sysbus_init_mmio(dev, 0x10ULL, pci_mem_config); /* mem_data */ pci_mem_data = cpu_register_io_memory(pci_apb_read, pci_apb_write, &s->host_state); sysbus_init_mmio(dev, 0x10000000ULL, pci_mem_data); return 0; }


void cpu_reset (CPUMIPSState *env) { memset(env, 0, offsetof(CPUMIPSState, breakpoints)); tlb_flush(env, 1); /* Minimal init */ #if !defined(CONFIG_USER_ONLY) if (env->hflags & MIPS_HFLAG_BMASK) { /* If the exception was raised from a delay slot, * come back to the jump. */ env->CP0_ErrorEPC = env->PC - 4; env->hflags &= ~MIPS_HFLAG_BMASK; } else { env->CP0_ErrorEPC = env->PC; } env->PC = (int32_t)0xBFC00000; #if defined (MIPS_USES_R4K_TLB) env->CP0_Random = MIPS_TLB_NB - 1; env->tlb_in_use = MIPS_TLB_NB; #endif env->CP0_Wired = 0; /* SMP not implemented */ env->CP0_EBase = (int32_t)0x80000000; env->CP0_Config0 = MIPS_CONFIG0; env->CP0_Config1 = MIPS_CONFIG1; env->CP0_Config2 = MIPS_CONFIG2; env->CP0_Config3 = MIPS_CONFIG3; env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL); env->CP0_WatchLo = 0; env->hflags = MIPS_HFLAG_ERL; /* Count register increments in debug mode, EJTAG version 1 */ env->CP0_Debug = (1 << CP0DB_CNT) | (0x1 << CP0DB_VER); env->CP0_PRid = MIPS_CPU; #endif env->exception_index = EXCP_NONE; #if defined(CONFIG_USER_ONLY) env->hflags |= MIPS_HFLAG_UM; env->user_mode_only = 1; #endif #ifdef MIPS_USES_FPU env->fcr0 = MIPS_FCR0; #endif /* XXX some guesswork here, values are CPU specific */ env->SYNCI_Step = 16; env->CCRes = 2; }


static void gen_neon_unzip_u8(TCGv t0, TCGv t1) { TCGv rd, rm, tmp; rd = new_tmp(); rm = new_tmp(); tmp = new_tmp(); tcg_gen_andi_i32(rd, t0, 0xff); tcg_gen_shri_i32(tmp, t0, 8); tcg_gen_andi_i32(tmp, tmp, 0xff00); tcg_gen_or_i32(rd, rd, tmp); tcg_gen_shli_i32(tmp, t1, 16); tcg_gen_andi_i32(tmp, tmp, 0xff0000); tcg_gen_or_i32(rd, rd, tmp); tcg_gen_shli_i32(tmp, t1, 8); tcg_gen_andi_i32(tmp, tmp, 0xff000000); tcg_gen_or_i32(rd, rd, tmp); tcg_gen_shri_i32(rm, t0, 8); tcg_gen_andi_i32(rm, rm, 0xff); tcg_gen_shri_i32(tmp, t0, 16); tcg_gen_andi_i32(tmp, tmp, 0xff00); tcg_gen_or_i32(rm, rm, tmp); tcg_gen_shli_i32(tmp, t1, 8); tcg_gen_andi_i32(tmp, tmp, 0xff0000); tcg_gen_or_i32(rm, rm, tmp); tcg_gen_andi_i32(tmp, t1, 0xff000000); tcg_gen_or_i32(t1, rm, tmp); tcg_gen_mov_i32(t0, rd); dead_tmp(tmp); dead_tmp(rm); dead_tmp(rd); }


static int nic_can_receive(NetClientState *nc) { EEPRO100State *s = qemu_get_nic_opaque(nc); TRACE(RXTX, logout("%p\n", s)); return get_ru_state(s) == ru_ready; #if 0 return !eepro100_buffer_full(s); #endif }


int omap_validate_emiff_addr(struct omap_mpu_state_s *s, target_phys_addr_t addr) { return addr >= OMAP_EMIFF_BASE && addr < OMAP_EMIFF_BASE + s->sdram_size; }