void dct_unquantize_h263_altivec(MpegEncContext *s, DCTELEM *block, int n, int qscale) { POWERPC_TBL_DECLARE(altivec_dct_unquantize_h263_num, 1); int i, level, qmul, qadd; int nCoeffs; assert(s->block_last_index[n]>=0); POWERPC_TBL_START_COUNT(altivec_dct_unquantize_h263_num, 1); qadd = (qscale - 1) | 1; qmul = qscale << 1; if (s->mb_intra) { if (!s->h263_aic) { if (n < 4) block[0] = block[0] * s->y_dc_scale; else block[0] = block[0] * s->c_dc_scale; }else qadd = 0; i = 1; nCoeffs= 63; //does not allways use zigzag table } else { i = 0; nCoeffs= s->intra_scantable.raster_end[ s->block_last_index[n] ]; } #ifdef ALTIVEC_USE_REFERENCE_C_CODE for(;i<=nCoeffs;i++) { level = block[i]; if (level) { if (level < 0) { level = level * qmul - qadd; } else { level = level * qmul + qadd; } block[i] = level; } } #else /* ALTIVEC_USE_REFERENCE_C_CODE */ { register const vector short vczero = (const vector short)vec_splat_s16(0); short __attribute__ ((aligned(16))) qmul8[] = { qmul, qmul, qmul, qmul, qmul, qmul, qmul, qmul }; short __attribute__ ((aligned(16))) qadd8[] = { qadd, qadd, qadd, qadd, qadd, qadd, qadd, qadd }; short __attribute__ ((aligned(16))) nqadd8[] = { -qadd, -qadd, -qadd, -qadd, -qadd, -qadd, -qadd, -qadd }; register vector short blockv, qmulv, qaddv, nqaddv, temp1; register vector bool short blockv_null, blockv_neg; register short backup_0 = block[0]; register int j = 0; qmulv = vec_ld(0, qmul8); qaddv = vec_ld(0, qadd8); nqaddv = vec_ld(0, nqadd8); #if 0 // block *is* 16 bytes-aligned, it seems. // first make sure block[j] is 16 bytes-aligned for(j = 0; (j <= nCoeffs) && ((((unsigned long)block) + (j << 1)) & 0x0000000F) ; j++) { level = block[j]; if (level) { if (level < 0) { level = level * qmul - qadd; } else { level = level * qmul + qadd; } block[j] = level; } } #endif // vectorize all the 16 bytes-aligned blocks // of 8 elements for(; (j + 7) <= nCoeffs ; j+=8) { blockv = vec_ld(j << 1, block); blockv_neg = vec_cmplt(blockv, vczero); blockv_null = vec_cmpeq(blockv, vczero); // choose between +qadd or -qadd as the third operand temp1 = vec_sel(qaddv, nqaddv, blockv_neg); // multiply & add (block{i,i+7} * qmul [+-] qadd) temp1 = vec_mladd(blockv, qmulv, temp1); // put 0 where block[{i,i+7} used to have 0 blockv = vec_sel(temp1, blockv, blockv_null); vec_st(blockv, j << 1, block); } // if nCoeffs isn't a multiple of 8, finish the job // using good old scalar units. // (we could do it using a truncated vector, // but I'm not sure it's worth the hassle) for(; j <= nCoeffs ; j++) { level = block[j]; if (level) { if (level < 0) { level = level * qmul - qadd; } else { level = level * qmul + qadd; } block[j] = level; } } if (i == 1) { // cheat. this avoid special-casing the first iteration block[0] = backup_0; } } #endif /* ALTIVEC_USE_REFERENCE_C_CODE */ POWERPC_TBL_STOP_COUNT(altivec_dct_unquantize_h263_num, nCoeffs == 63); }


DECL_IMDCT_BLOCKS(sse,sse) DECL_IMDCT_BLOCKS(sse2,sse) DECL_IMDCT_BLOCKS(sse3,sse) DECL_IMDCT_BLOCKS(ssse3,sse) DECL_IMDCT_BLOCKS(avx,avx) #endif /* HAVE_YASM */ void ff_mpadsp_init_mmx(MPADSPContext *s) { int mm_flags = av_get_cpu_flags(); int i, j; for (j = 0; j < 4; j++) { for (i = 0; i < 40; i ++) { mdct_win_sse[0][j][4*i ] = ff_mdct_win_float[j ][i]; mdct_win_sse[0][j][4*i + 1] = ff_mdct_win_float[j + 4][i]; mdct_win_sse[0][j][4*i + 2] = ff_mdct_win_float[j ][i]; mdct_win_sse[0][j][4*i + 3] = ff_mdct_win_float[j + 4][i]; mdct_win_sse[1][j][4*i ] = ff_mdct_win_float[0 ][i]; mdct_win_sse[1][j][4*i + 1] = ff_mdct_win_float[4 ][i]; mdct_win_sse[1][j][4*i + 2] = ff_mdct_win_float[j ][i]; mdct_win_sse[1][j][4*i + 3] = ff_mdct_win_float[j + 4][i]; } } #if HAVE_SSE2_INLINE if (mm_flags & AV_CPU_FLAG_SSE2) { s->apply_window_float = apply_window_mp3; } #endif /* HAVE_SSE2_INLINE */ #if HAVE_YASM if (mm_flags & AV_CPU_FLAG_AVX && HAVE_AVX) { s->imdct36_blocks_float = imdct36_blocks_avx; #if HAVE_SSE } else if (mm_flags & AV_CPU_FLAG_SSSE3) { s->imdct36_blocks_float = imdct36_blocks_ssse3; } else if (mm_flags & AV_CPU_FLAG_SSE3) { s->imdct36_blocks_float = imdct36_blocks_sse3; } else if (mm_flags & AV_CPU_FLAG_SSE2) { s->imdct36_blocks_float = imdct36_blocks_sse2; } else if (mm_flags & AV_CPU_FLAG_SSE) { s->imdct36_blocks_float = imdct36_blocks_sse; #endif /* HAVE_SSE */ } #endif /* HAVE_YASM */ }


static inline int sub_left_prediction(HYuvContext *s, uint8_t *dst, const uint8_t *src, int w, int left) { int i; if (s->bps <= 8) { if (w < 32) { for (i = 0; i < w; i++) { const int temp = src[i]; dst[i] = temp - left; left = temp; } return left; } else { for (i = 0; i < 32; i++) { const int temp = src[i]; dst[i] = temp - left; left = temp; } s->llvidencdsp.diff_bytes(dst + 32, src + 32, src + 31, w - 32); return src[w-1]; } } else { const uint16_t *src16 = (const uint16_t *)src; uint16_t *dst16 = ( uint16_t *)dst; if (w < 32) { for (i = 0; i < w; i++) { const int temp = src16[i]; dst16[i] = temp - left; left = temp; } return left; } else { for (i = 0; i < 16; i++) { const int temp = src16[i]; dst16[i] = temp - left; left = temp; } s->hencdsp.diff_int16(dst16 + 16, src16 + 16, src16 + 15, s->n - 1, w - 16); return src16[w-1]; } } }


void kvm_arm_reset_vcpu(ARMCPU *cpu) { /* Re-init VCPU so that all registers are set to * their respective reset values. */ kvm_arm_vcpu_init(CPU(cpu)); write_kvmstate_to_list(cpu); }


static uint32_t icp_accept(struct icp_server_state *ss) { uint32_t xirr = ss->xirr; qemu_irq_lower(ss->output); ss->xirr = ss->pending_priority << 24; trace_xics_icp_accept(xirr, ss->xirr); return xirr; }


VIOsPAPRBus *spapr_vio_bus_init(void) { VIOsPAPRBus *bus; BusState *qbus; DeviceState *dev; /* Create bridge device */ dev = qdev_create(NULL, "spapr-vio-bridge"); qdev_init_nofail(dev); /* Create bus on bridge device */ qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); bus = DO_UPCAST(VIOsPAPRBus, bus, qbus); bus->next_reg = 0x1000; /* hcall-vio */ spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal); /* hcall-tce */ spapr_register_hypercall(H_PUT_TCE, h_put_tce); /* hcall-crq */ spapr_register_hypercall(H_REG_CRQ, h_reg_crq); spapr_register_hypercall(H_FREE_CRQ, h_free_crq); spapr_register_hypercall(H_SEND_CRQ, h_send_crq); spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq); /* RTAS calls */ spapr_rtas_register("ibm,set-tce-bypass", rtas_set_tce_bypass); spapr_rtas_register("quiesce", rtas_quiesce); return bus; }


int ffurl_register_protocol(URLProtocol *protocol, int size) { URLProtocol **p; if (size < sizeof(URLProtocol)) { URLProtocol *temp = av_mallocz(sizeof(URLProtocol)); memcpy(temp, protocol, size); protocol = temp; } p = &first_protocol; while (*p != NULL) p = &(*p)->next; *p = protocol; protocol->next = NULL; return 0; }


static void vmsvga_update_display(void *opaque) { struct vmsvga_state_s *s = opaque; DisplaySurface *surface; bool dirty = false; if (!s->enable) { s->vga.update(&s->vga); return; } vmsvga_check_size(s); surface = qemu_console_surface(s->vga.con); vmsvga_fifo_run(s); vmsvga_update_rect_flush(s); /* * Is it more efficient to look at vram VGA-dirty bits or wait * for the driver to issue SVGA_CMD_UPDATE? */ if (memory_region_is_logging(&s->vga.vram)) { vga_sync_dirty_bitmap(&s->vga); dirty = memory_region_get_dirty(&s->vga.vram, 0, surface_stride(surface) * surface_height(surface), DIRTY_MEMORY_VGA); } if (s->invalidated || dirty) { s->invalidated = 0; memcpy(surface_data(surface), s->vga.vram_ptr, surface_stride(surface) * surface_height(surface)); dpy_gfx_update(s->vga.con, 0, 0, surface_width(surface), surface_height(surface)); } if (dirty) { memory_region_reset_dirty(&s->vga.vram, 0, surface_stride(surface) * surface_height(surface), DIRTY_MEMORY_VGA); } }


static void rv34_idct_add_c(uint8_t *dst, int stride, DCTELEM *block){ int temp[16]; uint8_t *cm = ff_cropTbl + MAX_NEG_CROP; int i; rv34_row_transform(temp, block); memset(block, 0, 16*sizeof(DCTELEM)); for(i = 0; i < 4; i++){ const int z0 = 13*(temp[4*0+i] + temp[4*2+i]) + 0x200; const int z1 = 13*(temp[4*0+i] - temp[4*2+i]) + 0x200; const int z2 = 7* temp[4*1+i] - 17*temp[4*3+i]; const int z3 = 17* temp[4*1+i] + 7*temp[4*3+i]; dst[0] = cm[ dst[0] + ( (z0 + z3) >> 10 ) ]; dst[1] = cm[ dst[1] + ( (z1 + z2) >> 10 ) ]; dst[2] = cm[ dst[2] + ( (z1 - z2) >> 10 ) ]; dst[3] = cm[ dst[3] + ( (z0 - z3) >> 10 ) ]; dst += stride; } }


static void vfio_msi_interrupt(void *opaque) { VFIOMSIVector *vector = opaque; VFIODevice *vdev = vector->vdev; int nr = vector - vdev->msi_vectors; if (!event_notifier_test_and_clear(&vector->interrupt)) { return; } DPRINTF("%s(%04x:%02x:%02x.%x) vector %d\n", __func__, vdev->host.domain, vdev->host.bus, vdev->host.slot, vdev->host.function, nr); if (vdev->interrupt == VFIO_INT_MSIX) { msix_notify(&vdev->pdev, nr); } else if (vdev->interrupt == VFIO_INT_MSI) { msi_notify(&vdev->pdev, nr); } else { error_report("vfio: MSI interrupt receieved, but not enabled?"); } }


int av_reallocp(void *ptr, size_t size) { void **ptrptr = ptr; void *ret; ret = av_realloc(*ptrptr, size); if (!ret) { return AVERROR(ENOMEM); *ptrptr = ret;


static int alac_decode_frame(AVCodecContext *avctx, void *data, int *got_frame_ptr, AVPacket *avpkt) { const uint8_t *inbuffer = avpkt->data; int input_buffer_size = avpkt->size; ALACContext *alac = avctx->priv_data; int channels; unsigned int outputsamples; int hassize; unsigned int readsamplesize; int isnotcompressed; uint8_t interlacing_shift; uint8_t interlacing_leftweight; int i, ch, ret; init_get_bits(&alac->gb, inbuffer, input_buffer_size * 8); channels = get_bits(&alac->gb, 3) + 1; if (channels != avctx->channels) { av_log(avctx, AV_LOG_ERROR, "frame header channel count mismatch\n"); return AVERROR_INVALIDDATA; } /* 2^result = something to do with output waiting. * perhaps matters if we read > 1 frame in a pass? */ skip_bits(&alac->gb, 4); skip_bits(&alac->gb, 12); /* unknown, skip 12 bits */ /* the output sample size is stored soon */ hassize = get_bits1(&alac->gb); alac->extra_bits = get_bits(&alac->gb, 2) << 3; /* whether the frame is compressed */ isnotcompressed = get_bits1(&alac->gb); if (hassize) { /* now read the number of samples as a 32bit integer */ outputsamples = get_bits_long(&alac->gb, 32); if(outputsamples > alac->setinfo_max_samples_per_frame){ av_log(avctx, AV_LOG_ERROR, "outputsamples %d > %d\n", outputsamples, alac->setinfo_max_samples_per_frame); return -1; } } else outputsamples = alac->setinfo_max_samples_per_frame; /* get output buffer */ if (outputsamples > INT32_MAX) { av_log(avctx, AV_LOG_ERROR, "unsupported block size: %u\n", outputsamples); return AVERROR_INVALIDDATA; } alac->frame.nb_samples = outputsamples; if ((ret = avctx->get_buffer(avctx, &alac->frame)) < 0) { av_log(avctx, AV_LOG_ERROR, "get_buffer() failed\n"); return ret; } readsamplesize = alac->setinfo_sample_size - alac->extra_bits + channels - 1; if (readsamplesize > MIN_CACHE_BITS) { av_log(avctx, AV_LOG_ERROR, "readsamplesize too big (%d)\n", readsamplesize); return -1; } if (!isnotcompressed) { /* so it is compressed */ int16_t predictor_coef_table[MAX_CHANNELS][32]; int predictor_coef_num[MAX_CHANNELS]; int prediction_type[MAX_CHANNELS]; int prediction_quantitization[MAX_CHANNELS]; int ricemodifier[MAX_CHANNELS]; interlacing_shift = get_bits(&alac->gb, 8); interlacing_leftweight = get_bits(&alac->gb, 8); for (ch = 0; ch < channels; ch++) { prediction_type[ch] = get_bits(&alac->gb, 4); prediction_quantitization[ch] = get_bits(&alac->gb, 4); ricemodifier[ch] = get_bits(&alac->gb, 3); predictor_coef_num[ch] = get_bits(&alac->gb, 5); /* read the predictor table */ for (i = 0; i < predictor_coef_num[ch]; i++) predictor_coef_table[ch][i] = (int16_t)get_bits(&alac->gb, 16); } if (alac->extra_bits) { for (i = 0; i < outputsamples; i++) { for (ch = 0; ch < channels; ch++) alac->extra_bits_buffer[ch][i] = get_bits(&alac->gb, alac->extra_bits); } } for (ch = 0; ch < channels; ch++) { bastardized_rice_decompress(alac, alac->predicterror_buffer[ch], outputsamples, readsamplesize, alac->setinfo_rice_initialhistory, alac->setinfo_rice_kmodifier, ricemodifier[ch] * alac->setinfo_rice_historymult / 4, (1 << alac->setinfo_rice_kmodifier) - 1); if (prediction_type[ch] == 0) { /* adaptive fir */ predictor_decompress_fir_adapt(alac->predicterror_buffer[ch], alac->outputsamples_buffer[ch], outputsamples, readsamplesize, predictor_coef_table[ch], predictor_coef_num[ch], prediction_quantitization[ch]); } else { av_log(avctx, AV_LOG_ERROR, "FIXME: unhandled prediction type: %i\n", prediction_type[ch]); /* I think the only other prediction type (or perhaps this is * just a boolean?) runs adaptive fir twice.. like: * predictor_decompress_fir_adapt(predictor_error, tempout, ...) * predictor_decompress_fir_adapt(predictor_error, outputsamples ...) * little strange.. */ } } } else { /* not compressed, easy case */ for (i = 0; i < outputsamples; i++) { for (ch = 0; ch < channels; ch++) { alac->outputsamples_buffer[ch][i] = get_sbits_long(&alac->gb, alac->setinfo_sample_size); } } alac->extra_bits = 0; interlacing_shift = 0; interlacing_leftweight = 0; } if (get_bits(&alac->gb, 3) != 7) av_log(avctx, AV_LOG_ERROR, "Error : Wrong End Of Frame\n"); if (channels == 2 && interlacing_leftweight) { decorrelate_stereo(alac->outputsamples_buffer, outputsamples, interlacing_shift, interlacing_leftweight); } if (alac->extra_bits) { append_extra_bits(alac->outputsamples_buffer, alac->extra_bits_buffer, alac->extra_bits, alac->numchannels, outputsamples); } switch(alac->setinfo_sample_size) { case 16: if (channels == 2) { interleave_stereo_16(alac->outputsamples_buffer, (int16_t *)alac->frame.data[0], outputsamples); } else { int16_t *outbuffer = (int16_t *)alac->frame.data[0]; for (i = 0; i < outputsamples; i++) { outbuffer[i] = alac->outputsamples_buffer[0][i]; } } break; case 24: if (channels == 2) { interleave_stereo_24(alac->outputsamples_buffer, (int32_t *)alac->frame.data[0], outputsamples); } else { int32_t *outbuffer = (int32_t *)alac->frame.data[0]; for (i = 0; i < outputsamples; i++) outbuffer[i] = alac->outputsamples_buffer[0][i] << 8; } break; } if (input_buffer_size * 8 - get_bits_count(&alac->gb) > 8) av_log(avctx, AV_LOG_ERROR, "Error : %d bits left\n", input_buffer_size * 8 - get_bits_count(&alac->gb)); *got_frame_ptr = 1; *(AVFrame *)data = alac->frame; return input_buffer_size; }


static int avi_probe(AVProbeData *p) { /* check file header */ if (p->buf_size <= 32) return 0; if (p->buf[0] == 'R' && p->buf[1] == 'I' && p->buf[2] == 'F' && p->buf[3] == 'F' && p->buf[8] == 'A' && p->buf[9] == 'V' && p->buf[10] == 'I' && (p->buf[11] == ' ' || p->buf[11] == 0x19)) return AVPROBE_SCORE_MAX; else return 0; }


static int decode_user_data(MpegEncContext *s, GetBitContext *gb){ char buf[256]; int i; int e; int ver = 0, build = 0, ver2 = 0, ver3 = 0; char last; for(i=0; i<255 && get_bits_count(gb) < gb->size_in_bits; i++){ if(show_bits(gb, 23) == 0) break; buf[i]= get_bits(gb, 8); } buf[i]=0; /* divx detection */ e=sscanf(buf, "DivX%dBuild%d%c", &ver, &build, &last); if(e<2) e=sscanf(buf, "DivX%db%d%c", &ver, &build, &last); if(e>=2){ s->divx_version= ver; s->divx_build= build; s->divx_packed= e==3 && last=='p'; if(s->divx_packed) av_log(s->avctx, AV_LOG_WARNING, "Invalid and inefficient vfw-avi packed B frames detected\n"); } /* ffmpeg detection */ e=sscanf(buf, "FFmpe%*[^b]b%d", &build)+3; if(e!=4) e=sscanf(buf, "FFmpeg v%d.%d.%d / libavcodec build: %d", &ver, &ver2, &ver3, &build); if(e!=4){ e=sscanf(buf, "Lavc%d.%d.%d", &ver, &ver2, &ver3)+1; if (e>1) build= (ver<<16) + (ver2<<8) + ver3; } if(e!=4){ if(strcmp(buf, "ffmpeg")==0){ s->lavc_build= 4600; } } if(e==4){ s->lavc_build= build; } /* Xvid detection */ e=sscanf(buf, "XviD%d", &build); if(e==1){ s->xvid_build= build; } //printf("User Data: %s\n", buf); return 0; }


static void RENAME(yuv2yuv1_ar)(SwsContext *c, const int16_t *lumSrc, const int16_t *chrUSrc, const int16_t *chrVSrc, const int16_t *alpSrc, uint8_t *dest, uint8_t *uDest, uint8_t *vDest, uint8_t *aDest, int dstW, int chrDstW) { int p= 4; const int16_t *src[4]= { alpSrc + dstW, lumSrc + dstW, chrUSrc + chrDstW, chrVSrc + chrDstW }; uint8_t *dst[4]= { aDest, dest, uDest, vDest }; x86_reg counter[4]= { dstW, dstW, chrDstW, chrDstW }; while (p--) { if (dst[p]) { __asm__ volatile( "mov %2, %%"REG_a" \n\t" "pcmpeqw %%mm7, %%mm7 \n\t" "psrlw $15, %%mm7 \n\t" "psllw $6, %%mm7 \n\t" ".p2align 4 \n\t" /* FIXME Unroll? */ "1: \n\t" "movq (%0, %%"REG_a", 2), %%mm0 \n\t" "movq 8(%0, %%"REG_a", 2), %%mm1 \n\t" "paddsw %%mm7, %%mm0 \n\t" "paddsw %%mm7, %%mm1 \n\t" "psraw $7, %%mm0 \n\t" "psraw $7, %%mm1 \n\t" "packuswb %%mm1, %%mm0 \n\t" MOVNTQ(%%mm0, (%1, %%REGa)) "add $8, %%"REG_a" \n\t" "jnc 1b \n\t" :: "r" (src[p]), "r" (dst[p] + counter[p]), "g" (-counter[p]) : "%"REG_a ); } } }


void ff_put_h264_qpel8_mc02_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { avc_luma_vt_8w_msa(src - (stride * 2), stride, dst, stride, 8); }


static int read_pakt_chunk(AVFormatContext *s, int64_t size) { AVIOContext *pb = s->pb; AVStream *st = s->streams[0]; CaffContext *caf = s->priv_data; int64_t pos = 0, ccount; int num_packets, i; ccount = avio_tell(pb); num_packets = avio_rb64(pb); if (num_packets < 0 || INT32_MAX / sizeof(AVIndexEntry) < num_packets) return AVERROR_INVALIDDATA; st->nb_frames = avio_rb64(pb); /* valid frames */ st->nb_frames += avio_rb32(pb); /* priming frames */ st->nb_frames += avio_rb32(pb); /* remainder frames */ st->duration = 0; for (i = 0; i < num_packets; i++) { av_add_index_entry(s->streams[0], pos, st->duration, 0, 0, AVINDEX_KEYFRAME); pos += caf->bytes_per_packet ? caf->bytes_per_packet : ff_mp4_read_descr_len(pb); st->duration += caf->frames_per_packet ? caf->frames_per_packet : ff_mp4_read_descr_len(pb); } if (avio_tell(pb) - ccount != size) { av_log(s, AV_LOG_ERROR, "error reading packet table\n"); return -1; } caf->num_bytes = pos; return 0; }


static void vp8_decode_mb_row_no_filter(AVCodecContext *avctx, void *tdata, int jobnr, int threadnr) { decode_mb_row_no_filter(avctx, tdata, jobnr, threadnr, 0); }


static av_cold int qdm2_decode_init(AVCodecContext *avctx) { QDM2Context *s = avctx->priv_data; uint8_t *extradata; int extradata_size; int tmp_val, tmp, size; /* extradata parsing Structure: wave { frma (QDM2) QDCA QDCP } 32 size (including this field) 32 tag (=frma) 32 type (=QDM2 or QDMC) 32 size (including this field, in bytes) 32 tag (=QDCA) // maybe mandatory parameters 32 unknown (=1) 32 channels (=2) 32 samplerate (=44100) 32 bitrate (=96000) 32 block size (=4096) 32 frame size (=256) (for one channel) 32 packet size (=1300) 32 size (including this field, in bytes) 32 tag (=QDCP) // maybe some tuneable parameters 32 float1 (=1.0) 32 zero ? 32 float2 (=1.0) 32 float3 (=1.0) 32 unknown (27) 32 unknown (8) 32 zero ? */ if (!avctx->extradata || (avctx->extradata_size < 48)) { av_log(avctx, AV_LOG_ERROR, "extradata missing or truncated\n"); return -1; } extradata = avctx->extradata; extradata_size = avctx->extradata_size; while (extradata_size > 7) { if (!memcmp(extradata, "frmaQDM", 7)) break; extradata++; extradata_size--; } if (extradata_size < 12) { av_log(avctx, AV_LOG_ERROR, "not enough extradata (%i)\n", extradata_size); return -1; } if (memcmp(extradata, "frmaQDM", 7)) { av_log(avctx, AV_LOG_ERROR, "invalid headers, QDM? not found\n"); return -1; } if (extradata[7] == 'C') { // s->is_qdmc = 1; av_log(avctx, AV_LOG_ERROR, "stream is QDMC version 1, which is not supported\n"); return -1; } extradata += 8; extradata_size -= 8; size = AV_RB32(extradata); if(size > extradata_size){ av_log(avctx, AV_LOG_ERROR, "extradata size too small, %i < %i\n", extradata_size, size); return -1; } extradata += 4; av_log(avctx, AV_LOG_DEBUG, "size: %d\n", size); if (AV_RB32(extradata) != MKBETAG('Q','D','C','A')) { av_log(avctx, AV_LOG_ERROR, "invalid extradata, expecting QDCA\n"); return -1; } extradata += 8; avctx->channels = s->nb_channels = s->channels = AV_RB32(extradata); extradata += 4; if (s->channels > MPA_MAX_CHANNELS) avctx->sample_rate = AV_RB32(extradata); extradata += 4; avctx->bit_rate = AV_RB32(extradata); extradata += 4; s->group_size = AV_RB32(extradata); extradata += 4; s->fft_size = AV_RB32(extradata); extradata += 4; s->checksum_size = AV_RB32(extradata); s->fft_order = av_log2(s->fft_size) + 1; s->fft_frame_size = 2 * s->fft_size; // complex has two floats // something like max decodable tones s->group_order = av_log2(s->group_size) + 1; s->frame_size = s->group_size / 16; // 16 iterations per super block s->sub_sampling = s->fft_order - 7; s->frequency_range = 255 / (1 << (2 - s->sub_sampling)); switch ((s->sub_sampling * 2 + s->channels - 1)) { case 0: tmp = 40; break; case 1: tmp = 48; break; case 2: tmp = 56; break; case 3: tmp = 72; break; case 4: tmp = 80; break; case 5: tmp = 100;break; default: tmp=s->sub_sampling; break; } tmp_val = 0; if ((tmp * 1000) < avctx->bit_rate) tmp_val = 1; if ((tmp * 1440) < avctx->bit_rate) tmp_val = 2; if ((tmp * 1760) < avctx->bit_rate) tmp_val = 3; if ((tmp * 2240) < avctx->bit_rate) tmp_val = 4; s->cm_table_select = tmp_val; if (s->sub_sampling == 0) tmp = 7999; else tmp = ((-(s->sub_sampling -1)) & 8000) + 20000; /* 0: 7999 -> 0 1: 20000 -> 2 2: 28000 -> 2 */ if (tmp < 8000) s->coeff_per_sb_select = 0; else if (tmp <= 16000) s->coeff_per_sb_select = 1; else s->coeff_per_sb_select = 2; // Fail on unknown fft order if ((s->fft_order < 7) || (s->fft_order > 9)) { av_log(avctx, AV_LOG_ERROR, "Unknown FFT order (%d), contact the developers!\n", s->fft_order); return -1; } ff_rdft_init(&s->rdft_ctx, s->fft_order, IDFT_C2R); ff_mpadsp_init(&s->mpadsp); qdm2_init(s); avctx->sample_fmt = AV_SAMPLE_FMT_S16; // dump_context(s); return 0; }


void usb_packet_unmap(USBPacket *p) { int is_write = (p->pid == USB_TOKEN_IN); int i; for (i = 0; i < p->iov.niov; i++) { cpu_physical_memory_unmap(p->iov.iov[i].iov_base, p->iov.iov[i].iov_len, is_write, p->iov.iov[i].iov_len); } }


static void gen_mfc0 (DisasContext *ctx, int reg, int sel) { const char *rn = "invalid"; switch (reg) { case 0: switch (sel) { case 0: gen_op_mfc0_index(); rn = "Index"; break; case 1: // gen_op_mfc0_mvpcontrol(); /* MT ASE */ rn = "MVPControl"; // break; case 2: // gen_op_mfc0_mvpconf0(); /* MT ASE */ rn = "MVPConf0"; // break; case 3: // gen_op_mfc0_mvpconf1(); /* MT ASE */ rn = "MVPConf1"; // break; default: goto die; } break; case 1: switch (sel) { case 0: gen_op_mfc0_random(); rn = "Random"; break; case 1: // gen_op_mfc0_vpecontrol(); /* MT ASE */ rn = "VPEControl"; // break; case 2: // gen_op_mfc0_vpeconf0(); /* MT ASE */ rn = "VPEConf0"; // break; case 3: // gen_op_mfc0_vpeconf1(); /* MT ASE */ rn = "VPEConf1"; // break; case 4: // gen_op_mfc0_YQMask(); /* MT ASE */ rn = "YQMask"; // break; case 5: // gen_op_mfc0_vpeschedule(); /* MT ASE */ rn = "VPESchedule"; // break; case 6: // gen_op_mfc0_vpeschefback(); /* MT ASE */ rn = "VPEScheFBack"; // break; case 7: // gen_op_mfc0_vpeopt(); /* MT ASE */ rn = "VPEOpt"; // break; default: goto die; } break; case 2: switch (sel) { case 0: gen_op_mfc0_entrylo0(); rn = "EntryLo0"; break; case 1: // gen_op_mfc0_tcstatus(); /* MT ASE */ rn = "TCStatus"; // break; case 2: // gen_op_mfc0_tcbind(); /* MT ASE */ rn = "TCBind"; // break; case 3: // gen_op_mfc0_tcrestart(); /* MT ASE */ rn = "TCRestart"; // break; case 4: // gen_op_mfc0_tchalt(); /* MT ASE */ rn = "TCHalt"; // break; case 5: // gen_op_mfc0_tccontext(); /* MT ASE */ rn = "TCContext"; // break; case 6: // gen_op_mfc0_tcschedule(); /* MT ASE */ rn = "TCSchedule"; // break; case 7: // gen_op_mfc0_tcschefback(); /* MT ASE */ rn = "TCScheFBack"; // break; default: goto die; } break; case 3: switch (sel) { case 0: gen_op_mfc0_entrylo1(); rn = "EntryLo1"; break; default: goto die; } break; case 4: switch (sel) { case 0: gen_op_mfc0_context(); rn = "Context"; break; case 1: // gen_op_mfc0_contextconfig(); /* SmartMIPS ASE */ rn = "ContextConfig"; // break; default: goto die; } break; case 5: switch (sel) { case 0: gen_op_mfc0_pagemask(); rn = "PageMask"; break; case 1: gen_op_mfc0_pagegrain(); rn = "PageGrain"; break; default: goto die; } break; case 6: switch (sel) { case 0: gen_op_mfc0_wired(); rn = "Wired"; break; case 1: // gen_op_mfc0_srsconf0(); /* shadow registers */ rn = "SRSConf0"; // break; case 2: // gen_op_mfc0_srsconf1(); /* shadow registers */ rn = "SRSConf1"; // break; case 3: // gen_op_mfc0_srsconf2(); /* shadow registers */ rn = "SRSConf2"; // break; case 4: // gen_op_mfc0_srsconf3(); /* shadow registers */ rn = "SRSConf3"; // break; case 5: // gen_op_mfc0_srsconf4(); /* shadow registers */ rn = "SRSConf4"; // break; default: goto die; } break; case 7: switch (sel) { case 0: gen_op_mfc0_hwrena(); rn = "HWREna"; break; default: goto die; } break; case 8: switch (sel) { case 0: gen_op_mfc0_badvaddr(); rn = "BadVaddr"; break; default: goto die; } break; case 9: switch (sel) { case 0: gen_op_mfc0_count(); rn = "Count"; break; /* 6,7 are implementation dependent */ default: goto die; } break; case 10: switch (sel) { case 0: gen_op_mfc0_entryhi(); rn = "EntryHi"; break; default: goto die; } break; case 11: switch (sel) { case 0: gen_op_mfc0_compare(); rn = "Compare"; break; /* 6,7 are implementation dependent */ default: goto die; } break; case 12: switch (sel) { case 0: gen_op_mfc0_status(); rn = "Status"; break; case 1: gen_op_mfc0_intctl(); rn = "IntCtl"; break; case 2: gen_op_mfc0_srsctl(); rn = "SRSCtl"; break; case 3: gen_op_mfc0_srsmap(); rn = "SRSMap"; break; default: goto die; } break; case 13: switch (sel) { case 0: gen_op_mfc0_cause(); rn = "Cause"; break; default: goto die; } break; case 14: switch (sel) { case 0: gen_op_mfc0_epc(); rn = "EPC"; break; default: goto die; } break; case 15: switch (sel) { case 0: gen_op_mfc0_prid(); rn = "PRid"; break; case 1: gen_op_mfc0_ebase(); rn = "EBase"; break; default: goto die; } break; case 16: switch (sel) { case 0: gen_op_mfc0_config0(); rn = "Config"; break; case 1: gen_op_mfc0_config1(); rn = "Config1"; break; case 2: gen_op_mfc0_config2(); rn = "Config2"; break; case 3: gen_op_mfc0_config3(); rn = "Config3"; break; /* 4,5 are reserved */ /* 6,7 are implementation dependent */ case 6: gen_op_mfc0_config6(); rn = "Config6"; break; case 7: gen_op_mfc0_config7(); rn = "Config7"; break; default: goto die; } break; case 17: switch (sel) { case 0: gen_op_mfc0_lladdr(); rn = "LLAddr"; break; default: goto die; } break; case 18: switch (sel) { case 0 ... 7: gen_op_mfc0_watchlo(sel); rn = "WatchLo"; break; default: goto die; } break; case 19: switch (sel) { case 0 ...7: gen_op_mfc0_watchhi(sel); rn = "WatchHi"; break; default: goto die; } break; case 20: switch (sel) { case 0: #ifdef TARGET_MIPS64 gen_op_mfc0_xcontext(); rn = "XContext"; break; #endif default: goto die; } break; case 21: /* Officially reserved, but sel 0 is used for R1x000 framemask */ switch (sel) { case 0: gen_op_mfc0_framemask(); rn = "Framemask"; break; default: goto die; } break; case 22: /* ignored */ rn = "'Diagnostic"; /* implementation dependent */ break; case 23: switch (sel) { case 0: gen_op_mfc0_debug(); /* EJTAG support */ rn = "Debug"; break; case 1: // gen_op_mfc0_tracecontrol(); /* PDtrace support */ rn = "TraceControl"; // break; case 2: // gen_op_mfc0_tracecontrol2(); /* PDtrace support */ rn = "TraceControl2"; // break; case 3: // gen_op_mfc0_usertracedata(); /* PDtrace support */ rn = "UserTraceData"; // break; case 4: // gen_op_mfc0_debug(); /* PDtrace support */ rn = "TraceBPC"; // break; default: goto die; } break; case 24: switch (sel) { case 0: gen_op_mfc0_depc(); /* EJTAG support */ rn = "DEPC"; break; default: goto die; } break; case 25: switch (sel) { case 0: gen_op_mfc0_performance0(); rn = "Performance0"; break; case 1: // gen_op_mfc0_performance1(); rn = "Performance1"; // break; case 2: // gen_op_mfc0_performance2(); rn = "Performance2"; // break; case 3: // gen_op_mfc0_performance3(); rn = "Performance3"; // break; case 4: // gen_op_mfc0_performance4(); rn = "Performance4"; // break; case 5: // gen_op_mfc0_performance5(); rn = "Performance5"; // break; case 6: // gen_op_mfc0_performance6(); rn = "Performance6"; // break; case 7: // gen_op_mfc0_performance7(); rn = "Performance7"; // break; default: goto die; } break; case 26: rn = "ECC"; break; case 27: switch (sel) { /* ignored */ case 0 ... 3: rn = "CacheErr"; break; default: goto die; } break; case 28: switch (sel) { case 0: case 2: case 4: case 6: gen_op_mfc0_taglo(); rn = "TagLo"; break; case 1: case 3: case 5: case 7: gen_op_mfc0_datalo(); rn = "DataLo"; break; default: goto die; } break; case 29: switch (sel) { case 0: case 2: case 4: case 6: gen_op_mfc0_taghi(); rn = "TagHi"; break; case 1: case 3: case 5: case 7: gen_op_mfc0_datahi(); rn = "DataHi"; break; default: goto die; } break; case 30: switch (sel) { case 0: gen_op_mfc0_errorepc(); rn = "ErrorEPC"; break; default: goto die; } break; case 31: switch (sel) { case 0: gen_op_mfc0_desave(); /* EJTAG support */ rn = "DESAVE"; break; default: goto die; } break; default: goto die; } #if defined MIPS_DEBUG_DISAS if (loglevel & CPU_LOG_TB_IN_ASM) { fprintf(logfile, "mfc0 %s (reg %d sel %d)\n", rn, reg, sel); } #endif return; die: #if defined MIPS_DEBUG_DISAS if (loglevel & CPU_LOG_TB_IN_ASM) { fprintf(logfile, "mfc0 %s (reg %d sel %d)\n", rn, reg, sel); } #endif generate_exception(ctx, EXCP_RI); }


static int roq_decode_end(AVCodecContext *avctx) { RoqContext *s = avctx->priv_data; /* release the last frame */ avctx->release_buffer(avctx, &s->last_frame); return 0; }


static void tgen_branch(TCGContext *s, int cc, int labelno) { TCGLabel* l = &s->labels[labelno]; if (l->has_value) { tgen_gotoi(s, cc, l->u.value_ptr); } else if (USE_LONG_BRANCHES) { tcg_out16(s, RIL_BRCL | (cc << 4)); tcg_out_reloc(s, s->code_ptr, R_390_PC32DBL, labelno, -2); s->code_ptr += 2; } else { tcg_out16(s, RI_BRC | (cc << 4)); tcg_out_reloc(s, s->code_ptr, R_390_PC16DBL, labelno, -2); s->code_ptr += 1; } }


static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh, uint32_t fid, uint64_t faddr, uint32_t e) { SeiContainer *sei_cont; S390pciState *s = S390_PCI_HOST_BRIDGE( object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL)); if (!s) { return; } sei_cont = g_malloc0(sizeof(SeiContainer)); sei_cont->fh = fh; sei_cont->fid = fid; sei_cont->cc = cc; sei_cont->pec = pec; sei_cont->faddr = faddr; sei_cont->e = e; QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link); css_generate_css_crws(0); }


static void pci_spapr_set_irq(void *opaque, int irq_num, int level) { /* * Here we use the number returned by pci_spapr_map_irq to find a * corresponding qemu_irq. */ sPAPRPHBState *phb = opaque; qemu_set_irq(phb->lsi_table[irq_num].qirq, level); }


static void test_io_channel(bool async, SocketAddress *listen_addr, SocketAddress *connect_addr, bool passFD) { QIOChannel *src, *dst; QIOChannelTest *test; if (async) { test_io_channel_setup_async(listen_addr, connect_addr, &src, &dst); g_assert(!passFD || qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_FD_PASS)); g_assert(!passFD || qio_channel_has_feature(dst, QIO_CHANNEL_FEATURE_FD_PASS)); g_assert(qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_SHUTDOWN)); g_assert(qio_channel_has_feature(dst, QIO_CHANNEL_FEATURE_SHUTDOWN)); test = qio_channel_test_new(); qio_channel_test_run_threads(test, true, src, dst); qio_channel_test_validate(test); object_unref(OBJECT(src)); object_unref(OBJECT(dst)); test_io_channel_setup_async(listen_addr, connect_addr, &src, &dst); g_assert(!passFD || qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_FD_PASS)); g_assert(!passFD || qio_channel_has_feature(dst, QIO_CHANNEL_FEATURE_FD_PASS)); g_assert(qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_SHUTDOWN)); g_assert(qio_channel_has_feature(dst, QIO_CHANNEL_FEATURE_SHUTDOWN)); test = qio_channel_test_new(); qio_channel_test_run_threads(test, false, src, dst); qio_channel_test_validate(test); object_unref(OBJECT(src)); object_unref(OBJECT(dst)); } else { test_io_channel_setup_sync(listen_addr, connect_addr, &src, &dst); g_assert(!passFD || qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_FD_PASS)); g_assert(!passFD || qio_channel_has_feature(dst, QIO_CHANNEL_FEATURE_FD_PASS)); g_assert(qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_SHUTDOWN)); g_assert(qio_channel_has_feature(dst, QIO_CHANNEL_FEATURE_SHUTDOWN)); test = qio_channel_test_new(); qio_channel_test_run_threads(test, true, src, dst); qio_channel_test_validate(test); object_unref(OBJECT(src)); object_unref(OBJECT(dst)); test_io_channel_setup_sync(listen_addr, connect_addr, &src, &dst); g_assert(!passFD || qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_FD_PASS)); g_assert(!passFD || qio_channel_has_feature(dst, QIO_CHANNEL_FEATURE_FD_PASS)); g_assert(qio_channel_has_feature(src, QIO_CHANNEL_FEATURE_SHUTDOWN)); g_assert(qio_channel_has_feature(dst, QIO_CHANNEL_FEATURE_SHUTDOWN)); test = qio_channel_test_new(); qio_channel_test_run_threads(test, false, src, dst); qio_channel_test_validate(test); object_unref(OBJECT(src)); object_unref(OBJECT(dst)); } }


int floatx80_le(floatx80 a, floatx80 b, float_status *status) { flag aSign, bSign; if ( ( ( extractFloatx80Exp( a ) == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( a )<<1 ) ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { float_raise(float_flag_invalid, status); return 0; } aSign = extractFloatx80Sign( a ); bSign = extractFloatx80Sign( b ); if ( aSign != bSign ) { return aSign || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low | b.low ) == 0 ); } return aSign ? le128( b.high, b.low, a.high, a.low ) : le128( a.high, a.low, b.high, b.low ); }


int coroutine_fn bdrv_co_writev(BlockDriverState *bs, int64_t sector_num, int nb_sectors, QEMUIOVector *qiov) { trace_bdrv_co_writev(bs, sector_num, nb_sectors); return bdrv_co_do_writev(bs, sector_num, nb_sectors, qiov, 0); }


static int vfw_read_header(AVFormatContext *s, AVFormatParameters *ap) { struct vfw_ctx *ctx = s->priv_data; AVCodecContext *codec; AVStream *st; int devnum; int bisize; BITMAPINFO *bi; CAPTUREPARMS cparms; DWORD biCompression; WORD biBitCount; int width; int height; int ret; if(!ap->time_base.den) { av_log(s, AV_LOG_ERROR, "A time base must be specified.\n"); return AVERROR_IO; } ctx->s = s; ctx->hwnd = capCreateCaptureWindow(NULL, 0, 0, 0, 0, 0, HWND_MESSAGE, 0); if(!ctx->hwnd) { av_log(s, AV_LOG_ERROR, "Could not create capture window.\n"); return AVERROR_IO; } /* If atoi fails, devnum==0 and the default device is used */ devnum = atoi(s->filename); ret = SendMessage(ctx->hwnd, WM_CAP_DRIVER_CONNECT, devnum, 0); if(!ret) { av_log(s, AV_LOG_ERROR, "Could not connect to device.\n"); DestroyWindow(ctx->hwnd); return AVERROR(ENODEV); } SendMessage(ctx->hwnd, WM_CAP_SET_OVERLAY, 0, 0); SendMessage(ctx->hwnd, WM_CAP_SET_PREVIEW, 0, 0); ret = SendMessage(ctx->hwnd, WM_CAP_SET_CALLBACK_VIDEOSTREAM, 0, (LPARAM) videostream_cb); if(!ret) { av_log(s, AV_LOG_ERROR, "Could not set video stream callback.\n"); goto fail_io; } SetWindowLongPtr(ctx->hwnd, GWLP_USERDATA, (LONG_PTR) ctx); st = av_new_stream(s, 0); if(!st) { vfw_read_close(s); return AVERROR_NOMEM; } /* Set video format */ bisize = SendMessage(ctx->hwnd, WM_CAP_GET_VIDEOFORMAT, 0, 0); if(!bisize) goto fail_io; bi = av_malloc(bisize); if(!bi) { vfw_read_close(s); return AVERROR_NOMEM; } ret = SendMessage(ctx->hwnd, WM_CAP_GET_VIDEOFORMAT, bisize, (LPARAM) bi); if(!ret) goto fail_bi; dump_bih(s, &bi->bmiHeader); width = ap->width ? ap->width : bi->bmiHeader.biWidth ; height = ap->height ? ap->height : bi->bmiHeader.biHeight; bi->bmiHeader.biWidth = width ; bi->bmiHeader.biHeight = height; #if 0 /* For testing yet unsupported compressions * Copy these values from user-supplied verbose information */ bi->bmiHeader.biWidth = 320; bi->bmiHeader.biHeight = 240; bi->bmiHeader.biPlanes = 1; bi->bmiHeader.biBitCount = 12; bi->bmiHeader.biCompression = MKTAG('I','4','2','0'); bi->bmiHeader.biSizeImage = 115200; dump_bih(s, &bi->bmiHeader); #endif ret = SendMessage(ctx->hwnd, WM_CAP_SET_VIDEOFORMAT, bisize, (LPARAM) bi); if(!ret) { av_log(s, AV_LOG_ERROR, "Could not set Video Format.\n"); goto fail_bi; } biCompression = bi->bmiHeader.biCompression; biBitCount = bi->bmiHeader.biBitCount; av_free(bi); /* Set sequence setup */ ret = SendMessage(ctx->hwnd, WM_CAP_GET_SEQUENCE_SETUP, sizeof(cparms), (LPARAM) &cparms); if(!ret) goto fail_io; dump_captureparms(s, &cparms); cparms.fYield = 1; // Spawn a background thread cparms.dwRequestMicroSecPerFrame = (ap->time_base.num*1000000) / ap->time_base.den; cparms.fAbortLeftMouse = 0; cparms.fAbortRightMouse = 0; cparms.fCaptureAudio = 0; cparms.vKeyAbort = 0; ret = SendMessage(ctx->hwnd, WM_CAP_SET_SEQUENCE_SETUP, sizeof(cparms), (LPARAM) &cparms); if(!ret) goto fail_io; codec = st->codec; codec->time_base = ap->time_base; codec->codec_type = CODEC_TYPE_VIDEO; codec->width = width; codec->height = height; codec->pix_fmt = vfw_pixfmt(biCompression, biBitCount); if(codec->pix_fmt == PIX_FMT_NONE) { codec->codec_id = vfw_codecid(biCompression); if(codec->codec_id == CODEC_ID_NONE) { av_log(s, AV_LOG_ERROR, "Unknown compression type. " "Please report verbose (-v 9) debug information.\n"); vfw_read_close(s); return AVERROR_PATCHWELCOME; } codec->bits_per_coded_sample = biBitCount; } else { codec->codec_id = CODEC_ID_RAWVIDEO; if(biCompression == BI_RGB) codec->bits_per_coded_sample = biBitCount; } av_set_pts_info(st, 32, 1, 1000); ctx->mutex = CreateMutex(NULL, 0, NULL); if(!ctx->mutex) { av_log(s, AV_LOG_ERROR, "Could not create Mutex.\n" ); goto fail_io; } ctx->event = CreateEvent(NULL, 1, 0, NULL); if(!ctx->event) { av_log(s, AV_LOG_ERROR, "Could not create Event.\n" ); goto fail_io; } ret = SendMessage(ctx->hwnd, WM_CAP_SEQUENCE_NOFILE, 0, 0); if(!ret) { av_log(s, AV_LOG_ERROR, "Could not start capture sequence.\n" ); goto fail_io; } return 0; fail_bi: av_free(bi); fail_io: vfw_read_close(s); return AVERROR_IO; }


size_t v9fs_pack(struct iovec *in_sg, int in_num, size_t offset, const void *src, size_t size) { return v9fs_packunpack((void *)src, in_sg, in_num, offset, size, 1); }


void usb_packet_setup(USBPacket *p, int pid, uint8_t addr, uint8_t ep) { assert(!usb_packet_is_inflight(p)); p->state = USB_PACKET_SETUP; p->pid = pid; p->devaddr = addr; p->devep = ep; p->result = 0; qemu_iovec_reset(&p->iov); }


int nbd_client_init(BlockDriverState *bs, QIOChannelSocket *sioc, const char *export, Error **errp) { NbdClientSession *client = nbd_get_client_session(bs); int ret; /* NBD handshake */ logout("session init %s\n", export); qio_channel_set_blocking(QIO_CHANNEL(sioc), true, NULL); ret = nbd_receive_negotiate(QIO_CHANNEL(sioc), export, &client->nbdflags, NULL, NULL, &client->ioc, &client->size, errp); if (ret < 0) { logout("Failed to negotiate with the NBD server\n"); return ret; } qemu_co_mutex_init(&client->send_mutex); qemu_co_mutex_init(&client->free_sema); client->sioc = sioc; object_ref(OBJECT(client->sioc)); if (!client->ioc) { client->ioc = QIO_CHANNEL(sioc); object_ref(OBJECT(client->ioc)); } /* Now that we're connected, set the socket to be non-blocking and * kick the reply mechanism. */ qio_channel_set_blocking(QIO_CHANNEL(sioc), false, NULL); nbd_client_attach_aio_context(bs, bdrv_get_aio_context(bs)); logout("Established connection with NBD server\n"); return 0; }


static void cuda_writel (void *opaque, target_phys_addr_t addr, uint32_t value) { }


static void tcg_out_brcond64(TCGContext *s, TCGCond cond, TCGArg arg1, TCGArg arg2, int const_arg2, int label_index, int small) { tcg_out_cmp(s, arg1, arg2, const_arg2, P_REXW); tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index, small); }


static void pci_init_wmask(PCIDevice *dev) { int i; int config_size = pci_config_size(dev); dev->wmask[PCI_CACHE_LINE_SIZE] = 0xff; dev->wmask[PCI_INTERRUPT_LINE] = 0xff; pci_set_word(dev->wmask + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); for (i = PCI_CONFIG_HEADER_SIZE; i < config_size; ++i) dev->wmask[i] = 0xff; }


static void *vnc_worker_thread(void *arg) { VncJobQueue *queue = arg; qemu_thread_self(&queue->thread); while (!vnc_worker_thread_loop(queue)) ; vnc_queue_clear(queue); return NULL; }


int qemu_savevm_state(QEMUFile *f) { int saved_vm_running; int ret; saved_vm_running = vm_running; vm_stop(0); ret = qemu_savevm_state_begin(f); if (ret < 0) goto out; do { ret = qemu_savevm_state_iterate(f); if (ret < 0) goto out; } while (ret == 0); ret = qemu_savevm_state_complete(f); out: if (saved_vm_running) vm_start(); return ret; }


static int vmdk_create(const char *filename, QEMUOptionParameter *options, Error **errp) { int fd, idx = 0; char desc[BUF_SIZE]; int64_t total_size = 0, filesize; const char *adapter_type = NULL; const char *backing_file = NULL; const char *fmt = NULL; int flags = 0; int ret = 0; bool flat, split, compress; char ext_desc_lines[BUF_SIZE] = ""; char path[PATH_MAX], prefix[PATH_MAX], postfix[PATH_MAX]; const int64_t split_size = 0x80000000; /* VMDK has constant split size */ const char *desc_extent_line; char parent_desc_line[BUF_SIZE] = ""; uint32_t parent_cid = 0xffffffff; uint32_t number_heads = 16; bool zeroed_grain = false; const char desc_template[] = "# Disk DescriptorFile\n" "version=1\n" "CID=%x\n" "parentCID=%x\n" "createType=\"%s\"\n" "%s" "\n" "# Extent description\n" "%s" "\n" "# The Disk Data Base\n" "#DDB\n" "\n" "ddb.virtualHWVersion = \"%d\"\n" "ddb.geometry.cylinders = \"%" PRId64 "\"\n" "ddb.geometry.heads = \"%d\"\n" "ddb.geometry.sectors = \"63\"\n" "ddb.adapterType = \"%s\"\n"; if (filename_decompose(filename, path, prefix, postfix, PATH_MAX, errp)) { return -EINVAL; } /* Read out options */ while (options && options->name) { if (!strcmp(options->name, BLOCK_OPT_SIZE)) { total_size = options->value.n; } else if (!strcmp(options->name, BLOCK_OPT_ADAPTER_TYPE)) { adapter_type = options->value.s; } else if (!strcmp(options->name, BLOCK_OPT_BACKING_FILE)) { backing_file = options->value.s; } else if (!strcmp(options->name, BLOCK_OPT_COMPAT6)) { flags |= options->value.n ? BLOCK_FLAG_COMPAT6 : 0; } else if (!strcmp(options->name, BLOCK_OPT_SUBFMT)) { fmt = options->value.s; } else if (!strcmp(options->name, BLOCK_OPT_ZEROED_GRAIN)) { zeroed_grain |= options->value.n; } options++; } if (!adapter_type) { adapter_type = "ide"; } else if (strcmp(adapter_type, "ide") && strcmp(adapter_type, "buslogic") && strcmp(adapter_type, "lsilogic") && strcmp(adapter_type, "legacyESX")) { error_setg(errp, "Unknown adapter type: '%s'", adapter_type); return -EINVAL; } if (strcmp(adapter_type, "ide") != 0) { /* that's the number of heads with which vmware operates when creating, exporting, etc. vmdk files with a non-ide adapter type */ number_heads = 255; } if (!fmt) { /* Default format to monolithicSparse */ fmt = "monolithicSparse"; } else if (strcmp(fmt, "monolithicFlat") && strcmp(fmt, "monolithicSparse") && strcmp(fmt, "twoGbMaxExtentSparse") && strcmp(fmt, "twoGbMaxExtentFlat") && strcmp(fmt, "streamOptimized")) { error_setg(errp, "Unknown subformat: '%s'", fmt); return -EINVAL; } split = !(strcmp(fmt, "twoGbMaxExtentFlat") && strcmp(fmt, "twoGbMaxExtentSparse")); flat = !(strcmp(fmt, "monolithicFlat") && strcmp(fmt, "twoGbMaxExtentFlat")); compress = !strcmp(fmt, "streamOptimized"); if (flat) { desc_extent_line = "RW %lld FLAT \"%s\" 0\n"; } else { desc_extent_line = "RW %lld SPARSE \"%s\"\n"; } if (flat && backing_file) { error_setg(errp, "Flat image can't have backing file"); return -ENOTSUP; } if (flat && zeroed_grain) { error_setg(errp, "Flat image can't enable zeroed grain"); return -ENOTSUP; } if (backing_file) { BlockDriverState *bs = bdrv_new(""); ret = bdrv_open(bs, backing_file, NULL, 0, NULL, errp); if (ret != 0) { bdrv_unref(bs); return ret; } if (strcmp(bs->drv->format_name, "vmdk")) { bdrv_unref(bs); return -EINVAL; } parent_cid = vmdk_read_cid(bs, 0); bdrv_unref(bs); snprintf(parent_desc_line, sizeof(parent_desc_line), "parentFileNameHint=\"%s\"", backing_file); } /* Create extents */ filesize = total_size; while (filesize > 0) { char desc_line[BUF_SIZE]; char ext_filename[PATH_MAX]; char desc_filename[PATH_MAX]; int64_t size = filesize; if (split && size > split_size) { size = split_size; } if (split) { snprintf(desc_filename, sizeof(desc_filename), "%s-%c%03d%s", prefix, flat ? 'f' : 's', ++idx, postfix); } else if (flat) { snprintf(desc_filename, sizeof(desc_filename), "%s-flat%s", prefix, postfix); } else { snprintf(desc_filename, sizeof(desc_filename), "%s%s", prefix, postfix); } snprintf(ext_filename, sizeof(ext_filename), "%s%s", path, desc_filename); if (vmdk_create_extent(ext_filename, size, flat, compress, zeroed_grain)) { return -EINVAL; } filesize -= size; /* Format description line */ snprintf(desc_line, sizeof(desc_line), desc_extent_line, size / 512, desc_filename); pstrcat(ext_desc_lines, sizeof(ext_desc_lines), desc_line); } /* generate descriptor file */ snprintf(desc, sizeof(desc), desc_template, (unsigned int)time(NULL), parent_cid, fmt, parent_desc_line, ext_desc_lines, (flags & BLOCK_FLAG_COMPAT6 ? 6 : 4), total_size / (int64_t)(63 * number_heads * 512), number_heads, adapter_type); if (split || flat) { fd = qemu_open(filename, O_WRONLY | O_CREAT | O_TRUNC | O_BINARY | O_LARGEFILE, 0644); } else { fd = qemu_open(filename, O_WRONLY | O_BINARY | O_LARGEFILE, 0644); } if (fd < 0) { return -errno; } /* the descriptor offset = 0x200 */ if (!split && !flat && 0x200 != lseek(fd, 0x200, SEEK_SET)) { ret = -errno; goto exit; } ret = qemu_write_full(fd, desc, strlen(desc)); if (ret != strlen(desc)) { ret = -errno; goto exit; } ret = 0; exit: qemu_close(fd); return ret; }


static void rtas_ibm_get_config_addr_info2(PowerPCCPU *cpu, sPAPREnvironment *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { sPAPRPHBState *sphb; sPAPRPHBClass *spc; PCIDevice *pdev; uint32_t addr, option; uint64_t buid; if ((nargs != 4) || (nret != 2)) { goto param_error_exit; } buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2); sphb = find_phb(spapr, buid); if (!sphb) { goto param_error_exit; } spc = SPAPR_PCI_HOST_BRIDGE_GET_CLASS(sphb); if (!spc->eeh_set_option) { goto param_error_exit; } /* * We always have PE address of form "00BB0001". "BB" * represents the bus number of PE's primary bus. */ option = rtas_ld(args, 3); switch (option) { case RTAS_GET_PE_ADDR: addr = rtas_ld(args, 0); pdev = find_dev(spapr, buid, addr); if (!pdev) { goto param_error_exit; } rtas_st(rets, 1, (pci_bus_num(pdev->bus) << 16) + 1); break; case RTAS_GET_PE_MODE: rtas_st(rets, 1, RTAS_PE_MODE_SHARED); break; default: goto param_error_exit; } rtas_st(rets, 0, RTAS_OUT_SUCCESS); return; param_error_exit: rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); }


__org_qemu_x_Union1 *qmp___org_qemu_x_command(__org_qemu_x_EnumList *a, __org_qemu_x_StructList *b, __org_qemu_x_Union2 *c, __org_qemu_x_Alt *d, Error **errp) { __org_qemu_x_Union1 *ret = g_new0(__org_qemu_x_Union1, 1); ret->kind = ORG_QEMU_X_UNION1_KIND___ORG_QEMU_X_BRANCH; ret->__org_qemu_x_branch = strdup("blah1"); return ret; }


static CURLState *curl_init_state(BDRVCURLState *s) { CURLState *state = NULL; int i, j; do { for (i=0; i<CURL_NUM_STATES; i++) { for (j=0; j<CURL_NUM_ACB; j++) if (s->states[i].acb[j]) continue; if (s->states[i].in_use) continue; state = &s->states[i]; state->in_use = 1; break; } if (!state) { qemu_aio_wait(); } } while(!state); if (!state->curl) { state->curl = curl_easy_init(); if (!state->curl) { return NULL; } curl_easy_setopt(state->curl, CURLOPT_URL, s->url); curl_easy_setopt(state->curl, CURLOPT_SSL_VERIFYPEER, (long) s->sslverify); curl_easy_setopt(state->curl, CURLOPT_TIMEOUT, 5); curl_easy_setopt(state->curl, CURLOPT_WRITEFUNCTION, (void *)curl_read_cb); curl_easy_setopt(state->curl, CURLOPT_WRITEDATA, (void *)state); curl_easy_setopt(state->curl, CURLOPT_PRIVATE, (void *)state); curl_easy_setopt(state->curl, CURLOPT_AUTOREFERER, 1); curl_easy_setopt(state->curl, CURLOPT_FOLLOWLOCATION, 1); curl_easy_setopt(state->curl, CURLOPT_NOSIGNAL, 1); curl_easy_setopt(state->curl, CURLOPT_ERRORBUFFER, state->errmsg); curl_easy_setopt(state->curl, CURLOPT_FAILONERROR, 1); /* Restrict supported protocols to avoid security issues in the more * obscure protocols. For example, do not allow POP3/SMTP/IMAP see * CVE-2013-0249. * * Restricting protocols is only supported from 7.19.4 upwards. */ #if LIBCURL_VERSION_NUM >= 0x071304 curl_easy_setopt(state->curl, CURLOPT_PROTOCOLS, PROTOCOLS); curl_easy_setopt(state->curl, CURLOPT_REDIR_PROTOCOLS, PROTOCOLS); #endif #ifdef DEBUG_VERBOSE curl_easy_setopt(state->curl, CURLOPT_VERBOSE, 1); #endif } state->s = s; return state; }


static inline int check_physical(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong eaddr, int rw) { int in_plb, ret; ctx->raddr = eaddr; ctx->prot = PAGE_READ | PAGE_EXEC; ret = 0; switch (env->mmu_model) { case POWERPC_MMU_32B: case POWERPC_MMU_601: case POWERPC_MMU_SOFT_6xx: case POWERPC_MMU_SOFT_74xx: case POWERPC_MMU_SOFT_4xx: case POWERPC_MMU_REAL: case POWERPC_MMU_BOOKE: ctx->prot |= PAGE_WRITE; break; #if defined(TARGET_PPC64) case POWERPC_MMU_64B: case POWERPC_MMU_2_06: case POWERPC_MMU_2_06d: /* Real address are 60 bits long */ ctx->raddr &= 0x0FFFFFFFFFFFFFFFULL; ctx->prot |= PAGE_WRITE; break; #endif case POWERPC_MMU_SOFT_4xx_Z: if (unlikely(msr_pe != 0)) { /* 403 family add some particular protections, * using PBL/PBU registers for accesses with no translation. */ in_plb = /* Check PLB validity */ (env->pb[0] < env->pb[1] && /* and address in plb area */ eaddr >= env->pb[0] && eaddr < env->pb[1]) || (env->pb[2] < env->pb[3] && eaddr >= env->pb[2] && eaddr < env->pb[3]) ? 1 : 0; if (in_plb ^ msr_px) { /* Access in protected area */ if (rw == 1) { /* Access is not allowed */ ret = -2; } } else { /* Read-write access is allowed */ ctx->prot |= PAGE_WRITE; } } break; case POWERPC_MMU_MPC8xx: /* XXX: TODO */ cpu_abort(env, "MPC8xx MMU model is not implemented\n"); break; case POWERPC_MMU_BOOKE206: cpu_abort(env, "BookE 2.06 MMU doesn't have physical real mode\n"); break; default: cpu_abort(env, "Unknown or invalid MMU model\n"); return -1; } return ret; }


static void onenand_command(OneNANDState *s) { int b; int sec; void *buf; #define SETADDR(block, page) \ sec = (s->addr[page] & 3) + \ ((((s->addr[page] >> 2) & 0x3f) + \ (((s->addr[block] & 0xfff) | \ (s->addr[block] >> 15 ? \ s->density_mask : 0)) << 6)) << (PAGE_SHIFT - 9)); #define SETBUF_M() \ buf = (s->bufaddr & 8) ? \ s->data[(s->bufaddr >> 2) & 1][0] : s->boot[0]; \ buf += (s->bufaddr & 3) << 9; #define SETBUF_S() \ buf = (s->bufaddr & 8) ? \ s->data[(s->bufaddr >> 2) & 1][1] : s->boot[1]; \ buf += (s->bufaddr & 3) << 4; switch (s->command) { case 0x00: /* Load single/multiple sector data unit into buffer */ SETADDR(ONEN_BUF_BLOCK, ONEN_BUF_PAGE) SETBUF_M() if (onenand_load_main(s, sec, s->count, buf)) s->status |= ONEN_ERR_CMD | ONEN_ERR_LOAD; #if 0 SETBUF_S() if (onenand_load_spare(s, sec, s->count, buf)) s->status |= ONEN_ERR_CMD | ONEN_ERR_LOAD; #endif /* TODO: if (s->bufaddr & 3) + s->count was > 4 (2k-pages) * or if (s->bufaddr & 1) + s->count was > 2 (1k-pages) * then we need two split the read/write into two chunks. */ s->intstatus |= ONEN_INT | ONEN_INT_LOAD; break; case 0x13: /* Load single/multiple spare sector into buffer */ SETADDR(ONEN_BUF_BLOCK, ONEN_BUF_PAGE) SETBUF_S() if (onenand_load_spare(s, sec, s->count, buf)) s->status |= ONEN_ERR_CMD | ONEN_ERR_LOAD; /* TODO: if (s->bufaddr & 3) + s->count was > 4 (2k-pages) * or if (s->bufaddr & 1) + s->count was > 2 (1k-pages) * then we need two split the read/write into two chunks. */ s->intstatus |= ONEN_INT | ONEN_INT_LOAD; break; case 0x80: /* Program single/multiple sector data unit from buffer */ SETADDR(ONEN_BUF_BLOCK, ONEN_BUF_PAGE) SETBUF_M() if (onenand_prog_main(s, sec, s->count, buf)) s->status |= ONEN_ERR_CMD | ONEN_ERR_PROG; #if 0 SETBUF_S() if (onenand_prog_spare(s, sec, s->count, buf)) s->status |= ONEN_ERR_CMD | ONEN_ERR_PROG; #endif /* TODO: if (s->bufaddr & 3) + s->count was > 4 (2k-pages) * or if (s->bufaddr & 1) + s->count was > 2 (1k-pages) * then we need two split the read/write into two chunks. */ s->intstatus |= ONEN_INT | ONEN_INT_PROG; break; case 0x1a: /* Program single/multiple spare area sector from buffer */ SETADDR(ONEN_BUF_BLOCK, ONEN_BUF_PAGE) SETBUF_S() if (onenand_prog_spare(s, sec, s->count, buf)) s->status |= ONEN_ERR_CMD | ONEN_ERR_PROG; /* TODO: if (s->bufaddr & 3) + s->count was > 4 (2k-pages) * or if (s->bufaddr & 1) + s->count was > 2 (1k-pages) * then we need two split the read/write into two chunks. */ s->intstatus |= ONEN_INT | ONEN_INT_PROG; break; case 0x1b: /* Copy-back program */ SETBUF_S() SETADDR(ONEN_BUF_BLOCK, ONEN_BUF_PAGE) if (onenand_load_main(s, sec, s->count, buf)) s->status |= ONEN_ERR_CMD | ONEN_ERR_PROG; SETADDR(ONEN_BUF_DEST_BLOCK, ONEN_BUF_DEST_PAGE) if (onenand_prog_main(s, sec, s->count, buf)) s->status |= ONEN_ERR_CMD | ONEN_ERR_PROG; /* TODO: spare areas */ s->intstatus |= ONEN_INT | ONEN_INT_PROG; break; case 0x23: /* Unlock NAND array block(s) */ s->intstatus |= ONEN_INT; /* XXX the previous (?) area should be locked automatically */ for (b = s->unladdr[0]; b <= s->unladdr[1]; b ++) { if (b >= s->blocks) { s->status |= ONEN_ERR_CMD; break; } if (s->blockwp[b] == ONEN_LOCK_LOCKTIGHTEN) break; s->wpstatus = s->blockwp[b] = ONEN_LOCK_UNLOCKED; } break; case 0x27: /* Unlock All NAND array blocks */ s->intstatus |= ONEN_INT; for (b = 0; b < s->blocks; b ++) { if (b >= s->blocks) { s->status |= ONEN_ERR_CMD; break; } if (s->blockwp[b] == ONEN_LOCK_LOCKTIGHTEN) break; s->wpstatus = s->blockwp[b] = ONEN_LOCK_UNLOCKED; } break; case 0x2a: /* Lock NAND array block(s) */ s->intstatus |= ONEN_INT; for (b = s->unladdr[0]; b <= s->unladdr[1]; b ++) { if (b >= s->blocks) { s->status |= ONEN_ERR_CMD; break; } if (s->blockwp[b] == ONEN_LOCK_LOCKTIGHTEN) break; s->wpstatus = s->blockwp[b] = ONEN_LOCK_LOCKED; } break; case 0x2c: /* Lock-tight NAND array block(s) */ s->intstatus |= ONEN_INT; for (b = s->unladdr[0]; b <= s->unladdr[1]; b ++) { if (b >= s->blocks) { s->status |= ONEN_ERR_CMD; break; } if (s->blockwp[b] == ONEN_LOCK_UNLOCKED) continue; s->wpstatus = s->blockwp[b] = ONEN_LOCK_LOCKTIGHTEN; } break; case 0x71: /* Erase-Verify-Read */ s->intstatus |= ONEN_INT; break; case 0x95: /* Multi-block erase */ qemu_irq_pulse(s->intr); /* Fall through. */ case 0x94: /* Block erase */ sec = ((s->addr[ONEN_BUF_BLOCK] & 0xfff) | (s->addr[ONEN_BUF_BLOCK] >> 15 ? s->density_mask : 0)) << (BLOCK_SHIFT - 9); if (onenand_erase(s, sec, 1 << (BLOCK_SHIFT - 9))) s->status |= ONEN_ERR_CMD | ONEN_ERR_ERASE; s->intstatus |= ONEN_INT | ONEN_INT_ERASE; break; case 0xb0: /* Erase suspend */ break; case 0x30: /* Erase resume */ s->intstatus |= ONEN_INT | ONEN_INT_ERASE; break; case 0xf0: /* Reset NAND Flash core */ onenand_reset(s, 0); break; case 0xf3: /* Reset OneNAND */ onenand_reset(s, 0); break; case 0x65: /* OTP Access */ s->intstatus |= ONEN_INT; s->bdrv_cur = NULL; s->current = s->otp; s->secs_cur = 1 << (BLOCK_SHIFT - 9); s->addr[ONEN_BUF_BLOCK] = 0; s->otpmode = 1; break; default: s->status |= ONEN_ERR_CMD; s->intstatus |= ONEN_INT; fprintf(stderr, "%s: unknown OneNAND command %x\n", __func__, s->command); } onenand_intr_update(s); }


void address_space_destroy(AddressSpace *as) { /* Flush out anything from MemoryListeners listening in on this */ memory_region_transaction_begin(); as->root = NULL; memory_region_transaction_commit(); QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); address_space_destroy_dispatch(as); flatview_destroy(as->current_map); g_free(as->name); g_free(as->current_map); g_free(as->ioeventfds); }


int qemu_set_fd_handler2(int fd, IOCanReadHandler *fd_read_poll, IOHandler *fd_read, IOHandler *fd_write, void *opaque) { IOHandlerRecord *ioh; assert(fd >= 0); if (!fd_read && !fd_write) { QLIST_FOREACH(ioh, &io_handlers, next) { if (ioh->fd == fd) { ioh->deleted = 1; break; } } } else { QLIST_FOREACH(ioh, &io_handlers, next) { if (ioh->fd == fd) goto found; } ioh = g_malloc0(sizeof(IOHandlerRecord)); QLIST_INSERT_HEAD(&io_handlers, ioh, next); found: ioh->fd = fd; ioh->fd_read_poll = fd_read_poll; ioh->fd_read = fd_read; ioh->fd_write = fd_write; ioh->opaque = opaque; ioh->pollfds_idx = -1; ioh->deleted = 0; qemu_notify_event(); } return 0; }


static int tap_can_send(void *opaque) { TAPState *s = opaque; return qemu_can_send_packet(&s->nc); }


static void net_slirp_cleanup(VLANClientState *vc) { SlirpState *s = vc->opaque; slirp_cleanup(s->slirp); slirp_smb_cleanup(s); TAILQ_REMOVE(&slirp_stacks, s, entry); qemu_free(s); }


static int assign_device(AssignedDevice *dev) { uint32_t flags = KVM_DEV_ASSIGN_ENABLE_IOMMU; int r; /* Only pass non-zero PCI segment to capable module */ if (!kvm_check_extension(kvm_state, KVM_CAP_PCI_SEGMENT) && dev->host.domain) { error_report("Can't assign device inside non-zero PCI segment " "as this KVM module doesn't support it."); return -ENODEV; } if (!kvm_check_extension(kvm_state, KVM_CAP_IOMMU)) { error_report("No IOMMU found. Unable to assign device \"%s\"", dev->dev.qdev.id); return -ENODEV; } if (dev->features & ASSIGNED_DEVICE_SHARE_INTX_MASK && kvm_has_intx_set_mask()) { flags |= KVM_DEV_ASSIGN_PCI_2_3; } r = kvm_device_pci_assign(kvm_state, &dev->host, flags, &dev->dev_id); if (r < 0) { switch (r) { case -EBUSY: { char *cause; cause = assign_failed_examine(dev); error_report("Failed to assign device \"%s\" : %s\n%s", dev->dev.qdev.id, strerror(-r), cause); g_free(cause); break; } default: error_report("Failed to assign device \"%s\" : %s", dev->dev.qdev.id, strerror(-r)); break; } } return r; }


void helper_fdtoq(CPUSPARCState *env, float64 src) { clear_float_exceptions(env); QT0 = float64_to_float128(src, &env->fp_status); check_ieee_exceptions(env); }


static uint64_t ecc_diag_mem_read(void *opaque, target_phys_addr_t addr, unsigned size) { ECCState *s = opaque; uint32_t ret = s->diag[(int)addr]; trace_ecc_diag_mem_readb(addr, ret); return ret; }


static void uart_write(void *opaque, target_phys_addr_t offset, uint64_t value, unsigned size) { UartState *s = (UartState *)opaque; DB_PRINT(" offset:%x data:%08x\n", offset, (unsigned)value); offset >>= 2; switch (offset) { case R_IER: /* ier (wts imr) */ s->r[R_IMR] |= value; break; case R_IDR: /* idr (wtc imr) */ s->r[R_IMR] &= ~value; break; case R_IMR: /* imr (read only) */ break; case R_CISR: /* cisr (wtc) */ s->r[R_CISR] &= ~value; break; case R_TX_RX: /* UARTDR */ switch (s->r[R_MR] & UART_MR_CHMODE) { case NORMAL_MODE: uart_write_tx_fifo(s, (uint8_t *) &value, 1); break; case LOCAL_LOOPBACK: uart_write_rx_fifo(opaque, (uint8_t *) &value, 1); break; } break; default: s->r[offset] = value; } switch (offset) { case R_CR: uart_ctrl_update(s); break; case R_MR: uart_parameters_setup(s); break; } }


static inline int handle_cpu_signal(unsigned long pc, unsigned long address, int is_write, sigset_t *old_set) { TranslationBlock *tb; int ret; uint32_t found_pc; #if defined(DEBUG_SIGNAL) printf("qemu: SIGSEGV pc=0x%08lx address=%08lx wr=%d oldset=0x%08lx\n", pc, address, is_write, *(unsigned long *)old_set); #endif /* XXX: locking issue */ if (is_write && page_unprotect(address)) { return 1; } tb = tb_find_pc(pc); if (tb) { /* the PC is inside the translated code. It means that we have a virtual CPU fault */ ret = cpu_x86_search_pc(tb, &found_pc, pc); if (ret < 0) return 0; env->eip = found_pc - tb->cs_base; env->cr2 = address; /* we restore the process signal mask as the sigreturn should do it (XXX: use sigsetjmp) */ sigprocmask(SIG_SETMASK, old_set, NULL); raise_exception_err(EXCP0E_PAGE, 4 | (is_write << 1)); /* never comes here */ return 1; } else { return 0; } }


START_TEST(qobject_to_qstring_test) { QString *qstring; qstring = qstring_from_str("foo"); fail_unless(qobject_to_qstring(QOBJECT(qstring)) == qstring); QDECREF(qstring); }


static MachineClass *machine_parse(const char *name) { MachineClass *mc = NULL; GSList *el, *machines = object_class_get_list(TYPE_MACHINE, false); if (name) { mc = find_machine(name); } if (mc) { return mc; } if (name && !is_help_option(name)) { error_report("Unsupported machine type"); error_printf("Use -machine help to list supported machines!\n"); } else { printf("Supported machines are:\n"); machines = g_slist_sort(machines, machine_class_cmp); for (el = machines; el; el = el->next) { MachineClass *mc = el->data; if (mc->alias) { printf("%-20s %s (alias of %s)\n", mc->alias, mc->desc, mc->name); } printf("%-20s %s%s\n", mc->name, mc->desc, mc->is_default ? " (default)" : ""); } } exit(!name || !is_help_option(name)); }


static int decode_wmv9(AVCodecContext *avctx, const uint8_t *buf, int buf_size, int x, int y, int w, int h, int wmv9_mask) { MSS2Context *ctx = avctx->priv_data; MSS12Context *c = &ctx->c; VC1Context *v = avctx->priv_data; MpegEncContext *s = &v->s; AVFrame *f; int ret; ff_mpeg_flush(avctx); init_get_bits(&s->gb, buf, buf_size * 8); s->loop_filter = avctx->skip_loop_filter < AVDISCARD_ALL; if (ff_vc1_parse_frame_header(v, &s->gb) < 0) { av_log(v->s.avctx, AV_LOG_ERROR, "header error\n"); return AVERROR_INVALIDDATA; } if (s->pict_type != AV_PICTURE_TYPE_I) { av_log(v->s.avctx, AV_LOG_ERROR, "expected I-frame\n"); return AVERROR_INVALIDDATA; } avctx->pix_fmt = AV_PIX_FMT_YUV420P; if ((ret = ff_MPV_frame_start(s, avctx)) < 0) { av_log(v->s.avctx, AV_LOG_ERROR, "ff_MPV_frame_start error\n"); avctx->pix_fmt = AV_PIX_FMT_RGB24; return ret; } ff_mpeg_er_frame_start(s); v->bits = buf_size * 8; v->end_mb_x = (w + 15) >> 4; s->end_mb_y = (h + 15) >> 4; if (v->respic & 1) v->end_mb_x = v->end_mb_x + 1 >> 1; if (v->respic & 2) s->end_mb_y = s->end_mb_y + 1 >> 1; ff_vc1_decode_blocks(v); ff_er_frame_end(&s->er); ff_MPV_frame_end(s); f = &s->current_picture.f; if (v->respic == 3) { ctx->dsp.upsample_plane(f->data[0], f->linesize[0], w, h); ctx->dsp.upsample_plane(f->data[1], f->linesize[1], w >> 1, h >> 1); ctx->dsp.upsample_plane(f->data[2], f->linesize[2], w >> 1, h >> 1); } else if (v->respic) avpriv_request_sample(v->s.avctx, "Asymmetric WMV9 rectangle subsampling"); av_assert0(f->linesize[1] == f->linesize[2]); if (wmv9_mask != -1) ctx->dsp.mss2_blit_wmv9_masked(c->rgb_pic + y * c->rgb_stride + x * 3, c->rgb_stride, wmv9_mask, c->pal_pic + y * c->pal_stride + x, c->pal_stride, f->data[0], f->linesize[0], f->data[1], f->data[2], f->linesize[1], w, h); else ctx->dsp.mss2_blit_wmv9(c->rgb_pic + y * c->rgb_stride + x * 3, c->rgb_stride, f->data[0], f->linesize[0], f->data[1], f->data[2], f->linesize[1], w, h); avctx->pix_fmt = AV_PIX_FMT_RGB24; return 0; }


yuv2rgb_1_c_template(SwsContext *c, const int16_t *buf0, const int16_t *ubuf[2], const int16_t *vbuf[2], const int16_t *abuf0, uint8_t *dest, int dstW, int uvalpha, int y, enum PixelFormat target, int hasAlpha) { const int16_t *ubuf0 = ubuf[0], *vbuf0 = vbuf[0]; int i; if (uvalpha < 2048) { for (i = 0; i < (dstW >> 1); i++) { int Y1 = buf0[i * 2] >> 7; int Y2 = buf0[i * 2 + 1] >> 7; int U = ubuf0[i] >> 7; int V = vbuf0[i] >> 7; int A1, A2; const void *r = c->table_rV[V], *g = (c->table_gU[U] + c->table_gV[V]), *b = c->table_bU[U]; if (hasAlpha) { A1 = abuf0[i * 2 ] >> 7; A2 = abuf0[i * 2 + 1] >> 7; } yuv2rgb_write(dest, i, Y1, Y2, hasAlpha ? A1 : 0, hasAlpha ? A2 : 0, r, g, b, y, target, hasAlpha); } } else { const int16_t *ubuf1 = ubuf[1], *vbuf1 = vbuf[1]; for (i = 0; i < (dstW >> 1); i++) { int Y1 = buf0[i * 2] >> 7; int Y2 = buf0[i * 2 + 1] >> 7; int U = (ubuf0[i] + ubuf1[i]) >> 8; int V = (vbuf0[i] + vbuf1[i]) >> 8; int A1, A2; const void *r = c->table_rV[V], *g = (c->table_gU[U] + c->table_gV[V]), *b = c->table_bU[U]; if (hasAlpha) { A1 = abuf0[i * 2 ] >> 7; A2 = abuf0[i * 2 + 1] >> 7; } yuv2rgb_write(dest, i, Y1, Y2, hasAlpha ? A1 : 0, hasAlpha ? A2 : 0, r, g, b, y, target, hasAlpha); } } }


static int pci_qdev_init(DeviceState *qdev, DeviceInfo *base) { PCIDevice *pci_dev = (PCIDevice *)qdev; PCIDeviceInfo *info = container_of(base, PCIDeviceInfo, qdev); PCIBus *bus; int devfn, rc; /* initialize cap_present for pci_is_express() and pci_config_size() */ if (info->is_express) { pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; } bus = FROM_QBUS(PCIBus, qdev_get_parent_bus(qdev)); devfn = pci_dev->devfn; pci_dev = do_pci_register_device(pci_dev, bus, base->name, devfn, info->config_read, info->config_write, info->header_type); assert(pci_dev); rc = info->init(pci_dev); if (rc != 0) return rc; if (qdev->hotplugged) bus->hotplug(pci_dev, 1); return 0; }


static AVStream * parse_media_type(AVFormatContext *s, AVStream *st, int sid, ff_asf_guid mediatype, ff_asf_guid subtype, ff_asf_guid formattype, int size) { WtvContext *wtv = s->priv_data; AVIOContext *pb = wtv->pb; if (!ff_guidcmp(subtype, ff_mediasubtype_cpfilters_processed) && !ff_guidcmp(formattype, ff_format_cpfilters_processed)) { ff_asf_guid actual_subtype; ff_asf_guid actual_formattype; if (size < 32) { av_log(s, AV_LOG_WARNING, "format buffer size underflow\n"); avio_skip(pb, size); return NULL; } avio_skip(pb, size - 32); ff_get_guid(pb, &actual_subtype); ff_get_guid(pb, &actual_formattype); avio_seek(pb, -size, SEEK_CUR); st = parse_media_type(s, st, sid, mediatype, actual_subtype, actual_formattype, size - 32); avio_skip(pb, 32); return st; } else if (!ff_guidcmp(mediatype, ff_mediatype_audio)) { st = new_stream(s, st, sid, AVMEDIA_TYPE_AUDIO); if (!st) return NULL; if (!ff_guidcmp(formattype, ff_format_waveformatex)) { int ret = ff_get_wav_header(pb, st->codec, size); if (ret < 0) return NULL; } else { if (ff_guidcmp(formattype, ff_format_none)) av_log(s, AV_LOG_WARNING, "unknown formattype:"FF_PRI_GUID"\n", FF_ARG_GUID(formattype)); avio_skip(pb, size); } if (!memcmp(subtype + 4, (const uint8_t[]){FF_MEDIASUBTYPE_BASE_GUID}, 12)) { st->codec->codec_id = ff_wav_codec_get_id(AV_RL32(subtype), st->codec->bits_per_coded_sample); } else if (!ff_guidcmp(subtype, mediasubtype_mpeg1payload)) { if (st->codec->extradata && st->codec->extradata_size >= 22) parse_mpeg1waveformatex(st); else av_log(s, AV_LOG_WARNING, "MPEG1WAVEFORMATEX underflow\n"); } else { st->codec->codec_id = ff_codec_guid_get_id(ff_codec_wav_guids, subtype); if (st->codec->codec_id == AV_CODEC_ID_NONE) av_log(s, AV_LOG_WARNING, "unknown subtype:"FF_PRI_GUID"\n", FF_ARG_GUID(subtype)); } return st; } else if (!ff_guidcmp(mediatype, ff_mediatype_video)) { st = new_stream(s, st, sid, AVMEDIA_TYPE_VIDEO); if (!st) return NULL; if (!ff_guidcmp(formattype, ff_format_videoinfo2)) { int consumed = parse_videoinfoheader2(s, st); avio_skip(pb, FFMAX(size - consumed, 0)); } else if (!ff_guidcmp(formattype, ff_format_mpeg2_video)) { int consumed = parse_videoinfoheader2(s, st); int count; avio_skip(pb, 4); count = avio_rl32(pb); avio_skip(pb, 12); if (count && ff_get_extradata(st->codec, pb, count) < 0) { ff_free_stream(s, st); return NULL; } consumed += 20 + count; avio_skip(pb, FFMAX(size - consumed, 0)); } else { if (ff_guidcmp(formattype, ff_format_none)) av_log(s, AV_LOG_WARNING, "unknown formattype:"FF_PRI_GUID"\n", FF_ARG_GUID(formattype)); avio_skip(pb, size); } if (!memcmp(subtype + 4, (const uint8_t[]){FF_MEDIASUBTYPE_BASE_GUID}, 12)) { st->codec->codec_id = ff_codec_get_id(ff_codec_bmp_tags, AV_RL32(subtype)); } else { st->codec->codec_id = ff_codec_guid_get_id(ff_video_guids, subtype); } if (st->codec->codec_id == AV_CODEC_ID_NONE) av_log(s, AV_LOG_WARNING, "unknown subtype:"FF_PRI_GUID"\n", FF_ARG_GUID(subtype)); return st; } else if (!ff_guidcmp(mediatype, mediatype_mpeg2_pes) && !ff_guidcmp(subtype, mediasubtype_dvb_subtitle)) { st = new_stream(s, st, sid, AVMEDIA_TYPE_SUBTITLE); if (!st) return NULL; if (ff_guidcmp(formattype, ff_format_none)) av_log(s, AV_LOG_WARNING, "unknown formattype:"FF_PRI_GUID"\n", FF_ARG_GUID(formattype)); avio_skip(pb, size); st->codec->codec_id = AV_CODEC_ID_DVB_SUBTITLE; return st; } else if (!ff_guidcmp(mediatype, mediatype_mstvcaption) && (!ff_guidcmp(subtype, mediasubtype_teletext) || !ff_guidcmp(subtype, mediasubtype_dtvccdata))) { st = new_stream(s, st, sid, AVMEDIA_TYPE_SUBTITLE); if (!st) return NULL; if (ff_guidcmp(formattype, ff_format_none)) av_log(s, AV_LOG_WARNING, "unknown formattype:"FF_PRI_GUID"\n", FF_ARG_GUID(formattype)); avio_skip(pb, size); st->codec->codec_id = !ff_guidcmp(subtype, mediasubtype_teletext) ? AV_CODEC_ID_DVB_TELETEXT : AV_CODEC_ID_EIA_608; return st; } else if (!ff_guidcmp(mediatype, mediatype_mpeg2_sections) && !ff_guidcmp(subtype, mediasubtype_mpeg2_sections)) { if (ff_guidcmp(formattype, ff_format_none)) av_log(s, AV_LOG_WARNING, "unknown formattype:"FF_PRI_GUID"\n", FF_ARG_GUID(formattype)); avio_skip(pb, size); return NULL; } av_log(s, AV_LOG_WARNING, "unknown media type, mediatype:"FF_PRI_GUID ", subtype:"FF_PRI_GUID", formattype:"FF_PRI_GUID"\n", FF_ARG_GUID(mediatype), FF_ARG_GUID(subtype), FF_ARG_GUID(formattype)); avio_skip(pb, size); return NULL; }


static void intra_predict_dc_4blk_8x8_msa(uint8_t *src, int32_t stride) { uint8_t lp_cnt; uint32_t src0, src1, src3, src2 = 0; uint32_t out0, out1, out2, out3; v16u8 src_top; v8u16 add; v4u32 sum; src_top = LD_UB(src - stride); add = __msa_hadd_u_h((v16u8) src_top, (v16u8) src_top); sum = __msa_hadd_u_w(add, add); src0 = __msa_copy_u_w((v4i32) sum, 0); src1 = __msa_copy_u_w((v4i32) sum, 1); for (lp_cnt = 0; lp_cnt < 4; lp_cnt++) { src0 += src[lp_cnt * stride - 1]; src2 += src[(4 + lp_cnt) * stride - 1]; } src0 = (src0 + 4) >> 3; src3 = (src1 + src2 + 4) >> 3; src1 = (src1 + 2) >> 2; src2 = (src2 + 2) >> 2; out0 = src0 * 0x01010101; out1 = src1 * 0x01010101; out2 = src2 * 0x01010101; out3 = src3 * 0x01010101; for (lp_cnt = 4; lp_cnt--;) { SW(out0, src); SW(out1, (src + 4)); SW(out2, (src + 4 * stride)); SW(out3, (src + 4 * stride + 4)); src += stride; } }


static int init_poc(H264Context *h){ MpegEncContext * const s = &h->s; const int max_frame_num= 1<<h->sps.log2_max_frame_num; int field_poc[2]; h->frame_num_offset= h->prev_frame_num_offset; if(h->frame_num < h->prev_frame_num) h->frame_num_offset += max_frame_num; if(h->sps.poc_type==0){ const int max_poc_lsb= 1<<h->sps.log2_max_poc_lsb; if (h->poc_lsb < h->prev_poc_lsb && h->prev_poc_lsb - h->poc_lsb >= max_poc_lsb/2) h->poc_msb = h->prev_poc_msb + max_poc_lsb; else if(h->poc_lsb > h->prev_poc_lsb && h->prev_poc_lsb - h->poc_lsb < -max_poc_lsb/2) h->poc_msb = h->prev_poc_msb - max_poc_lsb; else h->poc_msb = h->prev_poc_msb; //printf("poc: %d %d\n", h->poc_msb, h->poc_lsb); field_poc[0] = field_poc[1] = h->poc_msb + h->poc_lsb; if(s->picture_structure == PICT_FRAME) field_poc[1] += h->delta_poc_bottom; }else if(h->sps.poc_type==1){ int abs_frame_num, expected_delta_per_poc_cycle, expectedpoc; int i; if(h->sps.poc_cycle_length != 0) abs_frame_num = h->frame_num_offset + h->frame_num; else abs_frame_num = 0; if(h->nal_ref_idc==0 && abs_frame_num > 0) abs_frame_num--; expected_delta_per_poc_cycle = 0; for(i=0; i < h->sps.poc_cycle_length; i++) expected_delta_per_poc_cycle += h->sps.offset_for_ref_frame[ i ]; //FIXME integrate during sps parse if(abs_frame_num > 0){ int poc_cycle_cnt = (abs_frame_num - 1) / h->sps.poc_cycle_length; int frame_num_in_poc_cycle = (abs_frame_num - 1) % h->sps.poc_cycle_length; expectedpoc = poc_cycle_cnt * expected_delta_per_poc_cycle; for(i = 0; i <= frame_num_in_poc_cycle; i++) expectedpoc = expectedpoc + h->sps.offset_for_ref_frame[ i ]; } else expectedpoc = 0; if(h->nal_ref_idc == 0) expectedpoc = expectedpoc + h->sps.offset_for_non_ref_pic; field_poc[0] = expectedpoc + h->delta_poc[0]; field_poc[1] = field_poc[0] + h->sps.offset_for_top_to_bottom_field; if(s->picture_structure == PICT_FRAME) field_poc[1] += h->delta_poc[1]; }else{ int poc= 2*(h->frame_num_offset + h->frame_num); if(!h->nal_ref_idc) poc--; field_poc[0]= poc; field_poc[1]= poc; } if(s->picture_structure != PICT_BOTTOM_FIELD) { s->current_picture_ptr->field_poc[0]= field_poc[0]; s->current_picture_ptr->poc = field_poc[0]; } if(s->picture_structure != PICT_TOP_FIELD) { s->current_picture_ptr->field_poc[1]= field_poc[1]; s->current_picture_ptr->poc = field_poc[1]; } if(!FIELD_PICTURE || !s->first_field) { Picture *cur = s->current_picture_ptr; cur->poc= FFMIN(cur->field_poc[0], cur->field_poc[1]); } return 0; }


static void sdhci_set_inserted(DeviceState *dev, bool level) { SDHCIState *s = (SDHCIState *)dev; DPRINT_L1("Card state changed: %s!\n", level ? "insert" : "eject"); if ((s->norintsts & SDHC_NIS_REMOVE) && level) { /* Give target some time to notice card ejection */ timer_mod(s->insert_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + SDHC_INSERTION_DELAY); } else { if (level) { s->prnsts = 0x1ff0000; if (s->norintstsen & SDHC_NISEN_INSERT) { s->norintsts |= SDHC_NIS_INSERT; } } else { s->prnsts = 0x1fa0000; s->pwrcon &= ~SDHC_POWER_ON; s->clkcon &= ~SDHC_CLOCK_SDCLK_EN; if (s->norintstsen & SDHC_NISEN_REMOVE) { s->norintsts |= SDHC_NIS_REMOVE; } } sdhci_update_irq(s); } }


static void get_sensor_type(IPMIBmcSim *ibs, uint8_t *cmd, unsigned int cmd_len, uint8_t *rsp, unsigned int *rsp_len, unsigned int max_rsp_len) { IPMISensor *sens; IPMI_CHECK_CMD_LEN(3); if ((cmd[2] > MAX_SENSORS) || !IPMI_SENSOR_GET_PRESENT(ibs->sensors + cmd[2])) { rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT; return; } sens = ibs->sensors + cmd[2]; IPMI_ADD_RSP_DATA(sens->sensor_type); IPMI_ADD_RSP_DATA(sens->evt_reading_type_code); }


static int avui_encode_frame(AVCodecContext *avctx, AVPacket *pkt, const AVFrame *pic, int *got_packet) { uint8_t *dst, *src = pic->data[0]; int i, j, skip, ret, size, interlaced; interlaced = avctx->field_order > AV_FIELD_PROGRESSIVE; if (avctx->height == 486) { skip = 10; } else { skip = 16; } size = 2 * avctx->width * (avctx->height + skip) + 8 * interlaced; if ((ret = ff_alloc_packet2(avctx, pkt, size)) < 0) return ret; dst = pkt->data; if (!(avctx->extradata = av_mallocz(24 + FF_INPUT_BUFFER_PADDING_SIZE))) return AVERROR(ENOMEM); avctx->extradata_size = 24; memcpy(avctx->extradata, "\0\0\0\x18""APRGAPRG0001", 16); if (interlaced) { avctx->extradata[19] = 2; } else { avctx->extradata[19] = 1; dst += avctx->width * skip; } avctx->coded_frame->reference = 0; avctx->coded_frame->key_frame = 1; avctx->coded_frame->pict_type = AV_PICTURE_TYPE_I; for (i = 0; i <= interlaced; i++) { if (interlaced && avctx->height == 486) { src = pic->data[0] + (1 - i) * pic->linesize[0]; } else { src = pic->data[0] + i * pic->linesize[0]; } dst += avctx->width * skip + 4 * i; for (j = 0; j < avctx->height; j += interlaced + 1) { memcpy(dst, src, avctx->width * 2); src += (interlaced + 1) * pic->linesize[0]; dst += avctx->width * 2; } } pkt->flags |= AV_PKT_FLAG_KEY; *got_packet = 1; return 0; }


static void sparc_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); SPARCCPU *cpu = SPARC_CPU(obj); CPUSPARCState *env = &cpu->env; cs->env_ptr = env; cpu_exec_init(cs, &error_abort); if (tcg_enabled()) { gen_intermediate_code_init(env); } }


static void register_to_network(RDMARegister *reg) { reg->key.current_addr = htonll(reg->key.current_addr); reg->current_index = htonl(reg->current_index); reg->chunks = htonll(reg->chunks); }


int av_resample(AVResampleContext *c, short *dst, short *src, int *consumed, int src_size, int dst_size, int update_ctx){ int dst_index, i; int index= c->index; int frac= c->frac; int dst_incr_frac= c->dst_incr % c->src_incr; int dst_incr= c->dst_incr / c->src_incr; int compensation_distance= c->compensation_distance; if(compensation_distance == 0 && c->filter_length == 1 && c->phase_shift==0){ int64_t index2= ((int64_t)index)<<32; int64_t incr= (1LL<<32) * c->dst_incr / c->src_incr; dst_size= FFMIN(dst_size, (src_size-1-index) * (int64_t)c->src_incr / c->dst_incr); for(dst_index=0; dst_index < dst_size; dst_index++){ dst[dst_index] = src[index2>>32]; index2 += incr; } frac += dst_index * dst_incr_frac; index += dst_index * dst_incr; index += frac / c->src_incr; frac %= c->src_incr; }else{ for(dst_index=0; dst_index < dst_size; dst_index++){ FELEM *filter= c->filter_bank + c->filter_length*(index & c->phase_mask); int sample_index= index >> c->phase_shift; FELEM2 val=0; if(sample_index < 0){ for(i=0; i<c->filter_length; i++) val += src[FFABS(sample_index + i) % src_size] * filter[i]; }else if(sample_index + c->filter_length > src_size){ break; }else if(c->linear){ FELEM2 v2=0; for(i=0; i<c->filter_length; i++){ val += src[sample_index + i] * (FELEM2)filter[i]; v2 += src[sample_index + i] * (FELEM2)filter[i + c->filter_length]; } val+=(v2-val)*(FELEML)frac / c->src_incr; }else{ for(i=0; i<c->filter_length; i++){ val += src[sample_index + i] * (FELEM2)filter[i]; } } #ifdef CONFIG_RESAMPLE_AUDIOPHILE_KIDDY_MODE dst[dst_index] = av_clip_int16(lrintf(val)); #else val = (val + (1<<(FILTER_SHIFT-1)))>>FILTER_SHIFT; dst[dst_index] = (unsigned)(val + 32768) > 65535 ? (val>>31) ^ 32767 : val; #endif frac += dst_incr_frac; index += dst_incr; if(frac >= c->src_incr){ frac -= c->src_incr; index++; } if(dst_index + 1 == compensation_distance){ compensation_distance= 0; dst_incr_frac= c->ideal_dst_incr % c->src_incr; dst_incr= c->ideal_dst_incr / c->src_incr; } } } *consumed= FFMAX(index, 0) >> c->phase_shift; if(index>=0) index &= c->phase_mask; if(compensation_distance){ compensation_distance -= dst_index; assert(compensation_distance > 0); } if(update_ctx){ c->frac= frac; c->index= index; c->dst_incr= dst_incr_frac + c->src_incr*dst_incr; c->compensation_distance= compensation_distance; } #if 0 if(update_ctx && !c->compensation_distance){ #undef rand av_resample_compensate(c, rand() % (8000*2) - 8000, 8000*2); av_log(NULL, AV_LOG_DEBUG, "%d %d %d\n", c->dst_incr, c->ideal_dst_incr, c->compensation_distance); } #endif return dst_index; }


static void FUNCC(pred4x4_128_dc)(uint8_t *_src, const uint8_t *topright, int _stride){ pixel *src = (pixel*)_src; int stride = _stride/sizeof(pixel); ((pixel4*)(src+0*stride))[0]= ((pixel4*)(src+1*stride))[0]= ((pixel4*)(src+2*stride))[0]= ((pixel4*)(src+3*stride))[0]= PIXEL_SPLAT_X4(1<<(BIT_DEPTH-1)); }


void nand_setio(DeviceState *dev, uint32_t value) { int i; NANDFlashState *s = (NANDFlashState *) dev; if (!s->ce && s->cle) { if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) { if (s->cmd == NAND_CMD_READ0 && value == NAND_CMD_LPREAD2) return; if (value == NAND_CMD_RANDOMREAD1) { s->addr &= ~((1 << s->addr_shift) - 1); s->addrlen = 0; return; } } if (value == NAND_CMD_READ0) s->offset = 0; else if (value == NAND_CMD_READ1) { s->offset = 0x100; value = NAND_CMD_READ0; } else if (value == NAND_CMD_READ2) { s->offset = 1 << s->page_shift; value = NAND_CMD_READ0; } s->cmd = value; if (s->cmd == NAND_CMD_READSTATUS || s->cmd == NAND_CMD_PAGEPROGRAM2 || s->cmd == NAND_CMD_BLOCKERASE1 || s->cmd == NAND_CMD_BLOCKERASE2 || s->cmd == NAND_CMD_NOSERIALREAD2 || s->cmd == NAND_CMD_RANDOMREAD2 || s->cmd == NAND_CMD_RESET) nand_command(s); if (s->cmd != NAND_CMD_RANDOMREAD2) { s->addrlen = 0; } } if (s->ale) { unsigned int shift = s->addrlen * 8; unsigned int mask = ~(0xff << shift); unsigned int v = value << shift; s->addr = (s->addr & mask) | v; s->addrlen ++; switch (s->addrlen) { case 1: if (s->cmd == NAND_CMD_READID) { nand_command(s); } break; case 2: /* fix cache address as a byte address */ s->addr <<= (s->buswidth - 1); break; case 3: if (!(nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) && (s->cmd == NAND_CMD_READ0 || s->cmd == NAND_CMD_PAGEPROGRAM1)) { nand_command(s); } break; case 4: if ((nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) && nand_flash_ids[s->chip_id].size < 256 && /* 1Gb or less */ (s->cmd == NAND_CMD_READ0 || s->cmd == NAND_CMD_PAGEPROGRAM1)) { nand_command(s); } break; case 5: if ((nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) && nand_flash_ids[s->chip_id].size >= 256 && /* 2Gb or more */ (s->cmd == NAND_CMD_READ0 || s->cmd == NAND_CMD_PAGEPROGRAM1)) { nand_command(s); } break; default: break; } } if (!s->cle && !s->ale && s->cmd == NAND_CMD_PAGEPROGRAM1) { if (s->iolen < (1 << s->page_shift) + (1 << s->oob_shift)) { for (i = s->buswidth; i--; value >>= 8) { s->io[s->iolen ++] = (uint8_t) (value & 0xff); } } } else if (!s->cle && !s->ale && s->cmd == NAND_CMD_COPYBACKPRG1) { if ((s->addr & ((1 << s->addr_shift) - 1)) < (1 << s->page_shift) + (1 << s->oob_shift)) { for (i = s->buswidth; i--; s->addr++, value >>= 8) { s->io[s->iolen + (s->addr & ((1 << s->addr_shift) - 1))] = (uint8_t) (value & 0xff); } } } }


static int bdrv_qed_check(BlockDriverState *bs, BdrvCheckResult *result) { return -ENOTSUP; }


int ff_dirac_golomb_read_16bit(DiracGolombLUT *lut_ctx, const uint8_t *buf, int bytes, uint8_t *_dst, int coeffs) { int i, b, c_idx = 0; int16_t *dst = (int16_t *)_dst; DiracGolombLUT *future[4], *l = &lut_ctx[2*LUT_SIZE + buf[0]]; INIT_RESIDUE(res); for (b = 1; b <= bytes; b++) { future[0] = &lut_ctx[buf[b]]; future[1] = future[0] + 1*LUT_SIZE; future[2] = future[0] + 2*LUT_SIZE; future[3] = future[0] + 3*LUT_SIZE; if ((c_idx + 1) > coeffs) return c_idx; if (res_bits && l->sign) { int32_t coeff = 1; APPEND_RESIDUE(res, l->preamble); for (i = 0; i < (res_bits >> 1) - 1; i++) { coeff <<= 1; coeff |= (res >> (RSIZE_BITS - 2*i - 2)) & 1; } dst[c_idx++] = l->sign * (coeff - 1); } for (i = 0; i < LUT_BITS; i++) dst[c_idx + i] = l->ready[i]; c_idx += l->ready_num; APPEND_RESIDUE(res, l->leftover); l = future[l->need_s ? 3 : !res_bits ? 2 : res_bits & 1]; } return c_idx; }


static int bdrv_wr_badreq_sectors(BlockDriverState *bs, int64_t sector_num, int nb_sectors) { if (sector_num < 0 || nb_sectors < 0) return 1; if (sector_num > bs->total_sectors - nb_sectors) { if (bs->autogrow) bs->total_sectors = sector_num + nb_sectors; else return 1; } return 0; }


static int ram_save_complete(QEMUFile *f, void *opaque) { rcu_read_lock(); migration_bitmap_sync(); ram_control_before_iterate(f, RAM_CONTROL_FINISH); /* try transferring iterative blocks of memory */ /* flush all remaining blocks regardless of rate limiting */ while (true) { int pages; pages = ram_find_and_save_block(f, true, &bytes_transferred); /* no more blocks to sent */ if (pages == 0) { break; } } flush_compressed_data(f); ram_control_after_iterate(f, RAM_CONTROL_FINISH); migration_end(); rcu_read_unlock(); qemu_put_be64(f, RAM_SAVE_FLAG_EOS); return 0; }


void ff_add_pixels_clamped_c(const DCTELEM *block, uint8_t *restrict pixels, int line_size) { int i; uint8_t *cm = ff_cropTbl + MAX_NEG_CROP; /* read the pixels */ for(i=0;i<8;i++) { pixels[0] = cm[pixels[0] + block[0]]; pixels[1] = cm[pixels[1] + block[1]]; pixels[2] = cm[pixels[2] + block[2]]; pixels[3] = cm[pixels[3] + block[3]]; pixels[4] = cm[pixels[4] + block[4]]; pixels[5] = cm[pixels[5] + block[5]]; pixels[6] = cm[pixels[6] + block[6]]; pixels[7] = cm[pixels[7] + block[7]]; pixels += line_size; block += 8; } }


static inline int ohci_put_ed(OHCIState *ohci, uint32_t addr, struct ohci_ed *ed) { return put_dwords(ohci, addr, (uint32_t *)ed, sizeof(*ed) >> 2); }


static int read_cpuinfo(const char *field, char *value, int len) { FILE *f; int ret = -1; int field_len = strlen(field); char line[512]; f = fopen("/proc/cpuinfo", "r"); if (!f) { return -1; } do { if(!fgets(line, sizeof(line), f)) { break; } if (!strncmp(line, field, field_len)) { strncpy(value, line, len); ret = 0; break; } } while(*line); fclose(f); return ret; }


static void puv3_board_init(CPUUniCore32State *env, ram_addr_t ram_size) { MemoryRegion *ram_memory = g_new(MemoryRegion, 1); /* SDRAM at address zero. */ memory_region_init_ram(ram_memory, NULL, "puv3.ram", ram_size, &error_abort); vmstate_register_ram_global(ram_memory); memory_region_add_subregion(get_system_memory(), 0, ram_memory); }


void show_help(void) { const OptionDef *po; int i, expert; printf("ffmpeg version " FFMPEG_VERSION ", Copyright (c) 2000,2001 Gerard Lantau\n" "usage: ffmpeg [[options] -i input_file]... {[options] outfile}...\n" "Hyper fast MPEG1/MPEG4/H263/RV and AC3/MPEG audio encoder\n" "\n" "Main options are:\n"); for(i=0;i<2;i++) { if (i == 1) printf("\nAdvanced options are:\n"); for(po = options; po->name != NULL; po++) { char buf[64]; expert = (po->flags & OPT_EXPERT) != 0; if (expert == i) { strcpy(buf, po->name); if (po->flags & HAS_ARG) { strcat(buf, " "); strcat(buf, po->argname); } printf("-%-17s %s\n", buf, po->help); } } } exit(1); }


static int ftp_shutdown(URLContext *h, int flags) { FTPContext *s = h->priv_data; av_dlog(h, "ftp protocol shutdown\n"); if (s->conn_data) return ffurl_shutdown(s->conn_data, flags); return AVERROR(EIO); }


static inline void RENAME(yuv2yuvX)(int16_t *lumFilter, int16_t **lumSrc, int lumFilterSize, int16_t *chrFilter, int16_t **chrSrc, int chrFilterSize, uint8_t *dest, uint8_t *uDest, uint8_t *vDest, int dstW, int16_t * lumMmxFilter, int16_t * chrMmxFilter) { #ifdef HAVE_MMX if(uDest != NULL) { asm volatile( YSCALEYUV2YV12X(0) :: "m" (-chrFilterSize), "r" (chrSrc+chrFilterSize), "r" (chrMmxFilter+chrFilterSize*4), "r" (uDest), "m" (dstW>>1) : "%eax", "%edx", "%esi" ); asm volatile( YSCALEYUV2YV12X(4096) :: "m" (-chrFilterSize), "r" (chrSrc+chrFilterSize), "r" (chrMmxFilter+chrFilterSize*4), "r" (vDest), "m" (dstW>>1) : "%eax", "%edx", "%esi" ); } asm volatile( YSCALEYUV2YV12X(0) :: "m" (-lumFilterSize), "r" (lumSrc+lumFilterSize), "r" (lumMmxFilter+lumFilterSize*4), "r" (dest), "m" (dstW) : "%eax", "%edx", "%esi" ); #else //FIXME Optimize (just quickly writen not opti..) int i; for(i=0; i<dstW; i++) { int val=0; int j; for(j=0; j<lumFilterSize; j++) val += lumSrc[j][i] * lumFilter[j]; dest[i]= MIN(MAX(val>>19, 0), 255); } if(uDest != NULL) for(i=0; i<(dstW>>1); i++) { int u=0; int v=0; int j; for(j=0; j<lumFilterSize; j++) { u += chrSrc[j][i] * chrFilter[j]; v += chrSrc[j][i + 2048] * chrFilter[j]; } uDest[i]= MIN(MAX(u>>19, 0), 255); vDest[i]= MIN(MAX(v>>19, 0), 255); } #endif }


void enable_kvm_pv_eoi(void) { kvm_default_features |= kvm_pv_eoi_features; }


iscsi_aio_writev(BlockDriverState *bs, int64_t sector_num, QEMUIOVector *qiov, int nb_sectors, BlockDriverCompletionFunc *cb, void *opaque) { IscsiLun *iscsilun = bs->opaque; IscsiAIOCB *acb; acb = qemu_aio_get(&iscsi_aiocb_info, bs, cb, opaque); trace_iscsi_aio_writev(iscsilun->iscsi, sector_num, nb_sectors, opaque, acb); acb->iscsilun = iscsilun; acb->qiov = qiov; acb->nb_sectors = nb_sectors; acb->sector_num = sector_num; acb->retries = ISCSI_CMD_RETRIES; if (iscsi_aio_writev_acb(acb) != 0) { qemu_aio_release(acb); iscsi_set_events(iscsilun); return &acb->common;


static void qemu_s390_flic_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); S390FLICStateClass *fsc = S390_FLIC_COMMON_CLASS(oc); dc->reset = qemu_s390_flic_reset; fsc->register_io_adapter = qemu_s390_register_io_adapter; fsc->io_adapter_map = qemu_s390_io_adapter_map; fsc->add_adapter_routes = qemu_s390_add_adapter_routes; fsc->release_adapter_routes = qemu_s390_release_adapter_routes; fsc->clear_io_irq = qemu_s390_clear_io_flic; fsc->modify_ais_mode = qemu_s390_modify_ais_mode; }


static always_inline void gen_op_subfeo_64 (void) { gen_op_move_T2_T0(); gen_op_subfe_64(); gen_op_check_subfo_64(); }


static ssize_t rtl8139_do_receive(NetClientState *nc, const uint8_t *buf, size_t size_, int do_interrupt) { RTL8139State *s = qemu_get_nic_opaque(nc); PCIDevice *d = PCI_DEVICE(s); /* size is the length of the buffer passed to the driver */ int size = size_; const uint8_t *dot1q_buf = NULL; uint32_t packet_header = 0; uint8_t buf1[MIN_BUF_SIZE + VLAN_HLEN]; static const uint8_t broadcast_macaddr[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; DPRINTF(">>> received len=%d\n", size); /* test if board clock is stopped */ if (!s->clock_enabled) { DPRINTF("stopped ==========================\n"); return -1; } /* first check if receiver is enabled */ if (!rtl8139_receiver_enabled(s)) { DPRINTF("receiver disabled ================\n"); return -1; } /* XXX: check this */ if (s->RxConfig & AcceptAllPhys) { /* promiscuous: receive all */ DPRINTF(">>> packet received in promiscuous mode\n"); } else { if (!memcmp(buf, broadcast_macaddr, 6)) { /* broadcast address */ if (!(s->RxConfig & AcceptBroadcast)) { DPRINTF(">>> broadcast packet rejected\n"); /* update tally counter */ ++s->tally_counters.RxERR; return size; } packet_header |= RxBroadcast; DPRINTF(">>> broadcast packet received\n"); /* update tally counter */ ++s->tally_counters.RxOkBrd; } else if (buf[0] & 0x01) { /* multicast */ if (!(s->RxConfig & AcceptMulticast)) { DPRINTF(">>> multicast packet rejected\n"); /* update tally counter */ ++s->tally_counters.RxERR; return size; } int mcast_idx = compute_mcast_idx(buf); if (!(s->mult[mcast_idx >> 3] & (1 << (mcast_idx & 7)))) { DPRINTF(">>> multicast address mismatch\n"); /* update tally counter */ ++s->tally_counters.RxERR; return size; } packet_header |= RxMulticast; DPRINTF(">>> multicast packet received\n"); /* update tally counter */ ++s->tally_counters.RxOkMul; } else if (s->phys[0] == buf[0] && s->phys[1] == buf[1] && s->phys[2] == buf[2] && s->phys[3] == buf[3] && s->phys[4] == buf[4] && s->phys[5] == buf[5]) { /* match */ if (!(s->RxConfig & AcceptMyPhys)) { DPRINTF(">>> rejecting physical address matching packet\n"); /* update tally counter */ ++s->tally_counters.RxERR; return size; } packet_header |= RxPhysical; DPRINTF(">>> physical address matching packet received\n"); /* update tally counter */ ++s->tally_counters.RxOkPhy; } else { DPRINTF(">>> unknown packet\n"); /* update tally counter */ ++s->tally_counters.RxERR; return size; } } /* if too small buffer, then expand it * Include some tailroom in case a vlan tag is later removed. */ if (size < MIN_BUF_SIZE + VLAN_HLEN) { memcpy(buf1, buf, size); memset(buf1 + size, 0, MIN_BUF_SIZE + VLAN_HLEN - size); buf = buf1; if (size < MIN_BUF_SIZE) { size = MIN_BUF_SIZE; } } if (rtl8139_cp_receiver_enabled(s)) { if (!rtl8139_cp_rx_valid(s)) { return size; } DPRINTF("in C+ Rx mode ================\n"); /* begin C+ receiver mode */ /* w0 ownership flag */ #define CP_RX_OWN (1<<31) /* w0 end of ring flag */ #define CP_RX_EOR (1<<30) /* w0 bits 0...12 : buffer size */ #define CP_RX_BUFFER_SIZE_MASK ((1<<13) - 1) /* w1 tag available flag */ #define CP_RX_TAVA (1<<16) /* w1 bits 0...15 : VLAN tag */ #define CP_RX_VLAN_TAG_MASK ((1<<16) - 1) /* w2 low 32bit of Rx buffer ptr */ /* w3 high 32bit of Rx buffer ptr */ int descriptor = s->currCPlusRxDesc; dma_addr_t cplus_rx_ring_desc; cplus_rx_ring_desc = rtl8139_addr64(s->RxRingAddrLO, s->RxRingAddrHI); cplus_rx_ring_desc += 16 * descriptor; DPRINTF("+++ C+ mode reading RX descriptor %d from host memory at " "%08x %08x = "DMA_ADDR_FMT"\n", descriptor, s->RxRingAddrHI, s->RxRingAddrLO, cplus_rx_ring_desc); uint32_t val, rxdw0,rxdw1,rxbufLO,rxbufHI; pci_dma_read(d, cplus_rx_ring_desc, &val, 4); rxdw0 = le32_to_cpu(val); pci_dma_read(d, cplus_rx_ring_desc+4, &val, 4); rxdw1 = le32_to_cpu(val); pci_dma_read(d, cplus_rx_ring_desc+8, &val, 4); rxbufLO = le32_to_cpu(val); pci_dma_read(d, cplus_rx_ring_desc+12, &val, 4); rxbufHI = le32_to_cpu(val); DPRINTF("+++ C+ mode RX descriptor %d %08x %08x %08x %08x\n", descriptor, rxdw0, rxdw1, rxbufLO, rxbufHI); if (!(rxdw0 & CP_RX_OWN)) { DPRINTF("C+ Rx mode : descriptor %d is owned by host\n", descriptor); s->IntrStatus |= RxOverflow; ++s->RxMissed; /* update tally counter */ ++s->tally_counters.RxERR; ++s->tally_counters.MissPkt; rtl8139_update_irq(s); return size_; } uint32_t rx_space = rxdw0 & CP_RX_BUFFER_SIZE_MASK; /* write VLAN info to descriptor variables. */ if (s->CpCmd & CPlusRxVLAN && be16_to_cpup((uint16_t *) &buf[ETH_ALEN * 2]) == ETH_P_VLAN) { dot1q_buf = &buf[ETH_ALEN * 2]; size -= VLAN_HLEN; /* if too small buffer, use the tailroom added duing expansion */ if (size < MIN_BUF_SIZE) { size = MIN_BUF_SIZE; } rxdw1 &= ~CP_RX_VLAN_TAG_MASK; /* BE + ~le_to_cpu()~ + cpu_to_le() = BE */ rxdw1 |= CP_RX_TAVA | le16_to_cpup((uint16_t *) &dot1q_buf[ETHER_TYPE_LEN]); DPRINTF("C+ Rx mode : extracted vlan tag with tci: ""%u\n", be16_to_cpup((uint16_t *)&dot1q_buf[ETHER_TYPE_LEN])); } else { /* reset VLAN tag flag */ rxdw1 &= ~CP_RX_TAVA; } /* TODO: scatter the packet over available receive ring descriptors space */ if (size+4 > rx_space) { DPRINTF("C+ Rx mode : descriptor %d size %d received %d + 4\n", descriptor, rx_space, size); s->IntrStatus |= RxOverflow; ++s->RxMissed; /* update tally counter */ ++s->tally_counters.RxERR; ++s->tally_counters.MissPkt; rtl8139_update_irq(s); return size_; } dma_addr_t rx_addr = rtl8139_addr64(rxbufLO, rxbufHI); /* receive/copy to target memory */ if (dot1q_buf) { pci_dma_write(d, rx_addr, buf, 2 * ETH_ALEN); pci_dma_write(d, rx_addr + 2 * ETH_ALEN, buf + 2 * ETH_ALEN + VLAN_HLEN, size - 2 * ETH_ALEN); } else { pci_dma_write(d, rx_addr, buf, size); } if (s->CpCmd & CPlusRxChkSum) { /* do some packet checksumming */ } /* write checksum */ val = cpu_to_le32(crc32(0, buf, size_)); pci_dma_write(d, rx_addr+size, (uint8_t *)&val, 4); /* first segment of received packet flag */ #define CP_RX_STATUS_FS (1<<29) /* last segment of received packet flag */ #define CP_RX_STATUS_LS (1<<28) /* multicast packet flag */ #define CP_RX_STATUS_MAR (1<<26) /* physical-matching packet flag */ #define CP_RX_STATUS_PAM (1<<25) /* broadcast packet flag */ #define CP_RX_STATUS_BAR (1<<24) /* runt packet flag */ #define CP_RX_STATUS_RUNT (1<<19) /* crc error flag */ #define CP_RX_STATUS_CRC (1<<18) /* IP checksum error flag */ #define CP_RX_STATUS_IPF (1<<15) /* UDP checksum error flag */ #define CP_RX_STATUS_UDPF (1<<14) /* TCP checksum error flag */ #define CP_RX_STATUS_TCPF (1<<13) /* transfer ownership to target */ rxdw0 &= ~CP_RX_OWN; /* set first segment bit */ rxdw0 |= CP_RX_STATUS_FS; /* set last segment bit */ rxdw0 |= CP_RX_STATUS_LS; /* set received packet type flags */ if (packet_header & RxBroadcast) rxdw0 |= CP_RX_STATUS_BAR; if (packet_header & RxMulticast) rxdw0 |= CP_RX_STATUS_MAR; if (packet_header & RxPhysical) rxdw0 |= CP_RX_STATUS_PAM; /* set received size */ rxdw0 &= ~CP_RX_BUFFER_SIZE_MASK; rxdw0 |= (size+4); /* update ring data */ val = cpu_to_le32(rxdw0); pci_dma_write(d, cplus_rx_ring_desc, (uint8_t *)&val, 4); val = cpu_to_le32(rxdw1); pci_dma_write(d, cplus_rx_ring_desc+4, (uint8_t *)&val, 4); /* update tally counter */ ++s->tally_counters.RxOk; /* seek to next Rx descriptor */ if (rxdw0 & CP_RX_EOR) { s->currCPlusRxDesc = 0; } else { ++s->currCPlusRxDesc; } DPRINTF("done C+ Rx mode ----------------\n"); } else { DPRINTF("in ring Rx mode ================\n"); /* begin ring receiver mode */ int avail = MOD2(s->RxBufferSize + s->RxBufPtr - s->RxBufAddr, s->RxBufferSize); /* if receiver buffer is empty then avail == 0 */ #define RX_ALIGN(x) (((x) + 3) & ~0x3) if (avail != 0 && RX_ALIGN(size + 8) >= avail) { DPRINTF("rx overflow: rx buffer length %d head 0x%04x " "read 0x%04x === available 0x%04x need 0x%04x\n", s->RxBufferSize, s->RxBufAddr, s->RxBufPtr, avail, size + 8); s->IntrStatus |= RxOverflow; ++s->RxMissed; rtl8139_update_irq(s); return size_; } packet_header |= RxStatusOK; packet_header |= (((size+4) << 16) & 0xffff0000); /* write header */ uint32_t val = cpu_to_le32(packet_header); rtl8139_write_buffer(s, (uint8_t *)&val, 4); rtl8139_write_buffer(s, buf, size); /* write checksum */ val = cpu_to_le32(crc32(0, buf, size)); rtl8139_write_buffer(s, (uint8_t *)&val, 4); /* correct buffer write pointer */ s->RxBufAddr = MOD2(RX_ALIGN(s->RxBufAddr), s->RxBufferSize); /* now we can signal we have received something */ DPRINTF("received: rx buffer length %d head 0x%04x read 0x%04x\n", s->RxBufferSize, s->RxBufAddr, s->RxBufPtr); } s->IntrStatus |= RxOK; if (do_interrupt) { rtl8139_update_irq(s); } return size_; }


void start_auth_sasl(VncState *vs) { const char *mechlist = NULL; sasl_security_properties_t secprops; int err; char *localAddr, *remoteAddr; int mechlistlen; VNC_DEBUG("Initialize SASL auth %d\n", vs->csock); /* Get local & remote client addresses in form IPADDR;PORT */ if (!(localAddr = vnc_socket_local_addr("%s;%s", vs->csock))) goto authabort; if (!(remoteAddr = vnc_socket_remote_addr("%s;%s", vs->csock))) { g_free(localAddr); goto authabort; } err = sasl_server_new("vnc", NULL, /* FQDN - just delegates to gethostname */ NULL, /* User realm */ localAddr, remoteAddr, NULL, /* Callbacks, not needed */ SASL_SUCCESS_DATA, &vs->sasl.conn); g_free(localAddr); g_free(remoteAddr); localAddr = remoteAddr = NULL; if (err != SASL_OK) { VNC_DEBUG("sasl context setup failed %d (%s)", err, sasl_errstring(err, NULL, NULL)); vs->sasl.conn = NULL; goto authabort; } #ifdef CONFIG_VNC_TLS /* Inform SASL that we've got an external SSF layer from TLS/x509 */ if (vs->auth == VNC_AUTH_VENCRYPT && vs->subauth == VNC_AUTH_VENCRYPT_X509SASL) { gnutls_cipher_algorithm_t cipher; sasl_ssf_t ssf; cipher = gnutls_cipher_get(vs->tls.session); if (!(ssf = (sasl_ssf_t)gnutls_cipher_get_key_size(cipher))) { VNC_DEBUG("%s", "cannot TLS get cipher size\n"); sasl_dispose(&vs->sasl.conn); vs->sasl.conn = NULL; goto authabort; } ssf *= 8; /* tls key size is bytes, sasl wants bits */ err = sasl_setprop(vs->sasl.conn, SASL_SSF_EXTERNAL, &ssf); if (err != SASL_OK) { VNC_DEBUG("cannot set SASL external SSF %d (%s)\n", err, sasl_errstring(err, NULL, NULL)); sasl_dispose(&vs->sasl.conn); vs->sasl.conn = NULL; goto authabort; } } else #endif /* CONFIG_VNC_TLS */ vs->sasl.wantSSF = 1; memset (&secprops, 0, sizeof secprops); /* Inform SASL that we've got an external SSF layer from TLS */ if (vs->vd->is_unix #ifdef CONFIG_VNC_TLS /* Disable SSF, if using TLS+x509+SASL only. TLS without x509 is not sufficiently strong */ || (vs->auth == VNC_AUTH_VENCRYPT && vs->subauth == VNC_AUTH_VENCRYPT_X509SASL) #endif /* CONFIG_VNC_TLS */ ) { /* If we've got TLS or UNIX domain sock, we don't care about SSF */ secprops.min_ssf = 0; secprops.max_ssf = 0; secprops.maxbufsize = 8192; secprops.security_flags = 0; } else { /* Plain TCP, better get an SSF layer */ secprops.min_ssf = 56; /* Good enough to require kerberos */ secprops.max_ssf = 100000; /* Arbitrary big number */ secprops.maxbufsize = 8192; /* Forbid any anonymous or trivially crackable auth */ secprops.security_flags = SASL_SEC_NOANONYMOUS | SASL_SEC_NOPLAINTEXT; } err = sasl_setprop(vs->sasl.conn, SASL_SEC_PROPS, &secprops); if (err != SASL_OK) { VNC_DEBUG("cannot set SASL security props %d (%s)\n", err, sasl_errstring(err, NULL, NULL)); sasl_dispose(&vs->sasl.conn); vs->sasl.conn = NULL; goto authabort; } err = sasl_listmech(vs->sasl.conn, NULL, /* Don't need to set user */ "", /* Prefix */ ",", /* Separator */ "", /* Suffix */ &mechlist, NULL, NULL); if (err != SASL_OK) { VNC_DEBUG("cannot list SASL mechanisms %d (%s)\n", err, sasl_errdetail(vs->sasl.conn)); sasl_dispose(&vs->sasl.conn); vs->sasl.conn = NULL; goto authabort; } VNC_DEBUG("Available mechanisms for client: '%s'\n", mechlist); vs->sasl.mechlist = g_strdup(mechlist); mechlistlen = strlen(mechlist); vnc_write_u32(vs, mechlistlen); vnc_write(vs, mechlist, mechlistlen); vnc_flush(vs); VNC_DEBUG("Wait for client mechname length\n"); vnc_read_when(vs, protocol_client_auth_sasl_mechname_len, 4); return; authabort: vnc_client_error(vs); }