void gen_intermediate_code(CPUPPCState *env, struct TranslationBlock *tb) { PowerPCCPU *cpu = ppc_env_get_cpu(env); CPUState *cs = CPU(cpu); DisasContext ctx, *ctxp = &ctx; opc_handler_t **table, *handler; target_ulong pc_start; int num_insns; int max_insns; pc_start = tb->pc; ctx.nip = pc_start; ctx.tb = tb; ctx.exception = POWERPC_EXCP_NONE; ctx.spr_cb = env->spr_cb; ctx.pr = msr_pr; ctx.mem_idx = env->dmmu_idx; ctx.dr = msr_dr; #if !defined(CONFIG_USER_ONLY) ctx.hv = msr_hv || !env->has_hv_mode; #endif ctx.insns_flags = env->insns_flags; ctx.insns_flags2 = env->insns_flags2; ctx.access_type = -1; ctx.le_mode = !!(env->hflags & (1 << MSR_LE)); ctx.default_tcg_memop_mask = ctx.le_mode ? MO_LE : MO_BE; #if defined(TARGET_PPC64) ctx.sf_mode = msr_is_64bit(env, env->msr); ctx.has_cfar = !!(env->flags & POWERPC_FLAG_CFAR); #endif if (env->mmu_model == POWERPC_MMU_32B || env->mmu_model == POWERPC_MMU_601 || (env->mmu_model & POWERPC_MMU_64B)) ctx.lazy_tlb_flush = true; ctx.fpu_enabled = !!msr_fp; if ((env->flags & POWERPC_FLAG_SPE) && msr_spe) ctx.spe_enabled = !!msr_spe; else ctx.spe_enabled = false; if ((env->flags & POWERPC_FLAG_VRE) && msr_vr) ctx.altivec_enabled = !!msr_vr; else ctx.altivec_enabled = false; if ((env->flags & POWERPC_FLAG_VSX) && msr_vsx) { ctx.vsx_enabled = !!msr_vsx; } else { ctx.vsx_enabled = false; } #if defined(TARGET_PPC64) if ((env->flags & POWERPC_FLAG_TM) && msr_tm) { ctx.tm_enabled = !!msr_tm; } else { ctx.tm_enabled = false; } #endif if ((env->flags & POWERPC_FLAG_SE) && msr_se) ctx.singlestep_enabled = CPU_SINGLE_STEP; else ctx.singlestep_enabled = 0; if ((env->flags & POWERPC_FLAG_BE) && msr_be) ctx.singlestep_enabled |= CPU_BRANCH_STEP; if (unlikely(cs->singlestep_enabled)) { ctx.singlestep_enabled |= GDBSTUB_SINGLE_STEP; } #if defined (DO_SINGLE_STEP) && 0 /* Single step trace mode */ msr_se = 1; #endif num_insns = 0; max_insns = tb->cflags & CF_COUNT_MASK; if (max_insns == 0) { max_insns = CF_COUNT_MASK; } if (max_insns > TCG_MAX_INSNS) { max_insns = TCG_MAX_INSNS; } gen_tb_start(tb); tcg_clear_temp_count(); /* Set env in case of segfault during code fetch */ while (ctx.exception == POWERPC_EXCP_NONE && !tcg_op_buf_full()) { tcg_gen_insn_start(ctx.nip); num_insns++; if (unlikely(cpu_breakpoint_test(cs, ctx.nip, BP_ANY))) { gen_debug_exception(ctxp); /* The address covered by the breakpoint must be included in [tb->pc, tb->pc + tb->size) in order to for it to be properly cleared -- thus we increment the PC here so that the logic setting tb->size below does the right thing. */ ctx.nip += 4; break; } LOG_DISAS("----------------\n"); LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n", ctx.nip, ctx.mem_idx, (int)msr_ir); if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) gen_io_start(); if (unlikely(need_byteswap(&ctx))) { ctx.opcode = bswap32(cpu_ldl_code(env, ctx.nip)); } else { ctx.opcode = cpu_ldl_code(env, ctx.nip); } LOG_DISAS("translate opcode %08x (%02x %02x %02x) (%s)\n", ctx.opcode, opc1(ctx.opcode), opc2(ctx.opcode), opc3(ctx.opcode), ctx.le_mode ? "little" : "big"); ctx.nip += 4; table = env->opcodes; handler = table[opc1(ctx.opcode)]; if (is_indirect_opcode(handler)) { table = ind_table(handler); handler = table[opc2(ctx.opcode)]; if (is_indirect_opcode(handler)) { table = ind_table(handler); handler = table[opc3(ctx.opcode)]; } } /* Is opcode *REALLY* valid ? */ if (unlikely(handler->handler == &gen_invalid)) { qemu_log_mask(LOG_GUEST_ERROR, "invalid/unsupported opcode: " "%02x - %02x - %02x (%08x) " TARGET_FMT_lx " %d\n", opc1(ctx.opcode), opc2(ctx.opcode), opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir); } else { uint32_t inval; if (unlikely(handler->type & (PPC_SPE | PPC_SPE_SINGLE | PPC_SPE_DOUBLE) && Rc(ctx.opcode))) { inval = handler->inval2; } else { inval = handler->inval1; } if (unlikely((ctx.opcode & inval) != 0)) { qemu_log_mask(LOG_GUEST_ERROR, "invalid bits: %08x for opcode: " "%02x - %02x - %02x (%08x) " TARGET_FMT_lx "\n", ctx.opcode & inval, opc1(ctx.opcode), opc2(ctx.opcode), opc3(ctx.opcode), ctx.opcode, ctx.nip - 4); gen_inval_exception(ctxp, POWERPC_EXCP_INVAL_INVAL); break; } } (*(handler->handler))(&ctx); #if defined(DO_PPC_STATISTICS) handler->count++; #endif /* Check trace mode exceptions */ if (unlikely(ctx.singlestep_enabled & CPU_SINGLE_STEP && (ctx.nip <= 0x100 || ctx.nip > 0xF00) && ctx.exception != POWERPC_SYSCALL && ctx.exception != POWERPC_EXCP_TRAP && ctx.exception != POWERPC_EXCP_BRANCH)) { gen_exception(ctxp, POWERPC_EXCP_TRACE); } else if (unlikely(((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) || (cs->singlestep_enabled) || singlestep || num_insns >= max_insns)) { /* if we reach a page boundary or are single stepping, stop * generation */ break; } if (tcg_check_temp_count()) { fprintf(stderr, "Opcode %02x %02x %02x (%08x) leaked temporaries\n", opc1(ctx.opcode), opc2(ctx.opcode), opc3(ctx.opcode), ctx.opcode); exit(1); } } if (tb->cflags & CF_LAST_IO) gen_io_end(); if (ctx.exception == POWERPC_EXCP_NONE) { gen_goto_tb(&ctx, 0, ctx.nip); } else if (ctx.exception != POWERPC_EXCP_BRANCH) { if (unlikely(cs->singlestep_enabled)) { gen_debug_exception(ctxp); } /* Generate the return instruction */ tcg_gen_exit_tb(0); } gen_tb_end(tb, num_insns); tb->size = ctx.nip - pc_start; tb->icount = num_insns; #if defined(DEBUG_DISAS) if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) && qemu_log_in_addr_range(pc_start)) { int flags; flags = env->bfd_mach; flags |= ctx.le_mode << 16; qemu_log("IN: %s\n", lookup_symbol(pc_start)); log_target_disas(cs, pc_start, ctx.nip - pc_start, flags); qemu_log("\n"); } #endif }


static void smptebars_fill_picture(AVFilterContext *ctx, AVFrame *picref) { TestSourceContext *test = ctx->priv; FFDrawColor color; int r_w, r_h, w_h, p_w, p_h, i, tmp, x = 0; const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(picref->format); r_w = FFALIGN((test->w + 6) / 7, 1 << pixdesc->log2_chroma_w); r_h = FFALIGN(test->h * 2 / 3, 1 << pixdesc->log2_chroma_h); w_h = FFALIGN(test->h * 3 / 4 - r_h, 1 << pixdesc->log2_chroma_h); p_w = FFALIGN(r_w * 5 / 4, 1 << pixdesc->log2_chroma_w); p_h = test->h - w_h - r_h; #define DRAW_COLOR(rgba, x, y, w, h) \ ff_draw_color(&test->draw, &color, rgba); \ ff_fill_rectangle(&test->draw, &color, \ picref->data, picref->linesize, x, y, w, h) \ for (i = 0; i < 7; i++) { DRAW_COLOR(rainbow[i], x, 0, FFMIN(r_w, test->w - x), r_h); DRAW_COLOR(wobnair[i], x, r_h, FFMIN(r_w, test->w - x), w_h); x += r_w; } x = 0; DRAW_COLOR(i_pixel, x, r_h + w_h, p_w, p_h); x += p_w; DRAW_COLOR(white, x, r_h + w_h, p_w, p_h); x += p_w; DRAW_COLOR(q_pixel, x, r_h + w_h, p_w, p_h); x += p_w; tmp = FFALIGN(5 * r_w - x, 1 << pixdesc->log2_chroma_w); DRAW_COLOR(black, x, r_h + w_h, tmp, p_h); x += tmp; tmp = FFALIGN(r_w / 3, 1 << pixdesc->log2_chroma_w); DRAW_COLOR(neg4ire, x, r_h + w_h, tmp, p_h); x += tmp; DRAW_COLOR(black, x, r_h + w_h, tmp, p_h); x += tmp; DRAW_COLOR(pos4ire, x, r_h + w_h, tmp, p_h); x += tmp; DRAW_COLOR(black, x, r_h + w_h, test->w - x, p_h); }


static coroutine_fn void nbd_read_reply_entry(void *opaque) { NBDClientSession *s = opaque; uint64_t i; int ret; for (;;) { assert(s->reply.handle == 0); ret = nbd_receive_reply(s->ioc, &s->reply); if (ret < 0) { break; } /* There's no need for a mutex on the receive side, because the * handler acts as a synchronization point and ensures that only * one coroutine is called until the reply finishes. */ i = HANDLE_TO_INDEX(s, s->reply.handle); if (i >= MAX_NBD_REQUESTS || !s->recv_coroutine[i]) { break; } /* We're woken up by the recv_coroutine itself. Note that there * is no race between yielding and reentering read_reply_co. This * is because: * * - if recv_coroutine[i] runs on the same AioContext, it is only * entered after we yield * * - if recv_coroutine[i] runs on a different AioContext, reentering * read_reply_co happens through a bottom half, which can only * run after we yield. */ aio_co_wake(s->recv_coroutine[i]); qemu_coroutine_yield(); } s->read_reply_co = NULL; }


static int mp_pacl_removexattr(FsContext *ctx, const char *path, const char *name) { int ret; char buffer[PATH_MAX]; ret = lremovexattr(rpath(ctx, path, buffer), MAP_ACL_ACCESS); if (ret == -1 && errno == ENODATA) { /* * We don't get ENODATA error when trying to remove a * posix acl that is not present. So don't throw the error * even in case of mapped security model */ errno = 0; ret = 0; } return ret; }


float32 HELPER(ucf64_adds)(float32 a, float32 b, CPUUniCore32State *env) { return float32_add(a, b, &env->ucf64.fp_status); }


static void test_validate_fail_struct(TestInputVisitorData *data, const void *unused) { TestStruct *p = NULL; Error *err = NULL; Visitor *v; v = validate_test_init(data, "{ 'integer': -42, 'boolean': true, 'string': 'foo', 'extra': 42 }"); visit_type_TestStruct(v, NULL, &p, &err); error_free_or_abort(&err); g_assert(!p); }


static int ram_load_postcopy(QEMUFile *f) { int flags = 0, ret = 0; bool place_needed = false; bool matching_page_sizes = qemu_host_page_size == TARGET_PAGE_SIZE; MigrationIncomingState *mis = migration_incoming_get_current(); /* Temporary page that is later 'placed' */ void *postcopy_host_page = postcopy_get_tmp_page(mis); void *last_host = NULL; bool all_zero = false; while (!ret && !(flags & RAM_SAVE_FLAG_EOS)) { ram_addr_t addr; void *host = NULL; void *page_buffer = NULL; void *place_source = NULL; uint8_t ch; addr = qemu_get_be64(f); flags = addr & ~TARGET_PAGE_MASK; addr &= TARGET_PAGE_MASK; trace_ram_load_postcopy_loop((uint64_t)addr, flags); place_needed = false; if (flags & (RAM_SAVE_FLAG_COMPRESS | RAM_SAVE_FLAG_PAGE)) { host = host_from_stream_offset(f, addr, flags); if (!host) { error_report("Illegal RAM offset " RAM_ADDR_FMT, addr); ret = -EINVAL; break; } page_buffer = host; /* * Postcopy requires that we place whole host pages atomically. * To make it atomic, the data is read into a temporary page * that's moved into place later. * The migration protocol uses, possibly smaller, target-pages * however the source ensures it always sends all the components * of a host page in order. */ page_buffer = postcopy_host_page + ((uintptr_t)host & ~qemu_host_page_mask); /* If all TP are zero then we can optimise the place */ if (!((uintptr_t)host & ~qemu_host_page_mask)) { all_zero = true; } else { /* not the 1st TP within the HP */ if (host != (last_host + TARGET_PAGE_SIZE)) { error_report("Non-sequential target page %p/%p", host, last_host); ret = -EINVAL; break; } } /* * If it's the last part of a host page then we place the host * page */ place_needed = (((uintptr_t)host + TARGET_PAGE_SIZE) & ~qemu_host_page_mask) == 0; place_source = postcopy_host_page; } last_host = host; switch (flags & ~RAM_SAVE_FLAG_CONTINUE) { case RAM_SAVE_FLAG_COMPRESS: ch = qemu_get_byte(f); memset(page_buffer, ch, TARGET_PAGE_SIZE); if (ch) { all_zero = false; } break; case RAM_SAVE_FLAG_PAGE: all_zero = false; if (!place_needed || !matching_page_sizes) { qemu_get_buffer(f, page_buffer, TARGET_PAGE_SIZE); } else { /* Avoids the qemu_file copy during postcopy, which is * going to do a copy later; can only do it when we * do this read in one go (matching page sizes) */ qemu_get_buffer_in_place(f, (uint8_t **)&place_source, TARGET_PAGE_SIZE); } break; case RAM_SAVE_FLAG_EOS: /* normal exit */ break; default: error_report("Unknown combination of migration flags: %#x" " (postcopy mode)", flags); ret = -EINVAL; } if (place_needed) { /* This gets called at the last target page in the host page */ if (all_zero) { ret = postcopy_place_page_zero(mis, host + TARGET_PAGE_SIZE - qemu_host_page_size); } else { ret = postcopy_place_page(mis, host + TARGET_PAGE_SIZE - qemu_host_page_size, place_source); } } if (!ret) { ret = qemu_file_get_error(f); } } return ret; }


static uint64_t pmsav7_read(CPUARMState *env, const ARMCPRegInfo *ri) { uint32_t *u32p = *(uint32_t **)raw_ptr(env, ri); if (!u32p) { return 0; } u32p += env->pmsav7.rnr; return *u32p; }


static int gt64120_pci_init(PCIDevice *d) { /* FIXME: Malta specific hw assumptions ahead */ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MARVELL); pci_config_set_device_id(d->config, PCI_DEVICE_ID_MARVELL_GT6412X); pci_set_word(d->config + PCI_COMMAND, 0); pci_set_word(d->config + PCI_STATUS, PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM); pci_set_byte(d->config + PCI_CLASS_REVISION, 0x10); pci_config_set_prog_interface(d->config, 0); pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); pci_set_long(d->config + PCI_BASE_ADDRESS_0, 0x00000008); pci_set_long(d->config + PCI_BASE_ADDRESS_1, 0x01000008); pci_set_long(d->config + PCI_BASE_ADDRESS_2, 0x1c000000); pci_set_long(d->config + PCI_BASE_ADDRESS_3, 0x1f000000); pci_set_long(d->config + PCI_BASE_ADDRESS_4, 0x14000000); pci_set_long(d->config + PCI_BASE_ADDRESS_5, 0x14000001); pci_set_byte(d->config + 0x3d, 0x01); return 0; }


static int vtd_page_walk(VTDContextEntry *ce, uint64_t start, uint64_t end, vtd_page_walk_hook hook_fn, void *private, bool notify_unmap) { dma_addr_t addr = vtd_ce_get_slpt_base(ce); uint32_t level = vtd_ce_get_level(ce); if (!vtd_iova_range_check(start, ce)) { return -VTD_FR_ADDR_BEYOND_MGAW; } if (!vtd_iova_range_check(end, ce)) { /* Fix end so that it reaches the maximum */ end = vtd_iova_limit(ce); } return vtd_page_walk_level(addr, start, end, hook_fn, private, level, true, true, notify_unmap); }


static int omx_encode_frame(AVCodecContext *avctx, AVPacket *pkt, const AVFrame *frame, int *got_packet) { OMXCodecContext *s = avctx->priv_data; int ret = 0; OMX_BUFFERHEADERTYPE* buffer; OMX_ERRORTYPE err; if (frame) { uint8_t *dst[4]; int linesize[4]; int need_copy; buffer = get_buffer(&s->input_mutex, &s->input_cond, &s->num_free_in_buffers, s->free_in_buffers, 1); buffer->nFilledLen = av_image_fill_arrays(dst, linesize, buffer->pBuffer, avctx->pix_fmt, s->stride, s->plane_size, 1); if (s->input_zerocopy) { uint8_t *src[4] = { NULL }; int src_linesize[4]; av_image_fill_arrays(src, src_linesize, frame->data[0], avctx->pix_fmt, s->stride, s->plane_size, 1); if (frame->linesize[0] == src_linesize[0] && frame->linesize[1] == src_linesize[1] && frame->linesize[2] == src_linesize[2] && frame->data[1] == src[1] && frame->data[2] == src[2]) { // If the input frame happens to have all planes stored contiguously, // with the right strides, just clone the frame and set the OMX // buffer header to point to it AVFrame *local = av_frame_clone(frame); if (!local) { // Return the buffer to the queue so it's not lost append_buffer(&s->input_mutex, &s->input_cond, &s->num_free_in_buffers, s->free_in_buffers, buffer); return AVERROR(ENOMEM); } else { buffer->pAppPrivate = local; buffer->pOutputPortPrivate = NULL; buffer->pBuffer = local->data[0]; need_copy = 0; } } else { // If not, we need to allocate a new buffer with the right // size and copy the input frame into it. uint8_t *buf = av_malloc(av_image_get_buffer_size(avctx->pix_fmt, s->stride, s->plane_size, 1)); if (!buf) { // Return the buffer to the queue so it's not lost append_buffer(&s->input_mutex, &s->input_cond, &s->num_free_in_buffers, s->free_in_buffers, buffer); return AVERROR(ENOMEM); } else { buffer->pAppPrivate = buf; // Mark that pAppPrivate is an av_malloc'ed buffer, not an AVFrame buffer->pOutputPortPrivate = (void*) 1; buffer->pBuffer = buf; need_copy = 1; buffer->nFilledLen = av_image_fill_arrays(dst, linesize, buffer->pBuffer, avctx->pix_fmt, s->stride, s->plane_size, 1); } } } else { need_copy = 1; } if (need_copy) av_image_copy(dst, linesize, (const uint8_t**) frame->data, frame->linesize, avctx->pix_fmt, avctx->width, avctx->height); buffer->nFlags = OMX_BUFFERFLAG_ENDOFFRAME; buffer->nOffset = 0; // Convert the timestamps to microseconds; some encoders can ignore // the framerate and do VFR bit allocation based on timestamps. buffer->nTimeStamp = to_omx_ticks(av_rescale_q(frame->pts, avctx->time_base, AV_TIME_BASE_Q)); err = OMX_EmptyThisBuffer(s->handle, buffer); if (err != OMX_ErrorNone) { append_buffer(&s->input_mutex, &s->input_cond, &s->num_free_in_buffers, s->free_in_buffers, buffer); av_log(avctx, AV_LOG_ERROR, "OMX_EmptyThisBuffer failed: %x\n", err); return AVERROR_UNKNOWN; } s->num_in_frames++; } while (!*got_packet && ret == 0) { // Only wait for output if flushing and not all frames have been output buffer = get_buffer(&s->output_mutex, &s->output_cond, &s->num_done_out_buffers, s->done_out_buffers, !frame && s->num_out_frames < s->num_in_frames); if (!buffer) break; if (buffer->nFlags & OMX_BUFFERFLAG_CODECCONFIG && avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) { if ((ret = av_reallocp(&avctx->extradata, avctx->extradata_size + buffer->nFilledLen + AV_INPUT_BUFFER_PADDING_SIZE)) < 0) { avctx->extradata_size = 0; goto end; } memcpy(avctx->extradata + avctx->extradata_size, buffer->pBuffer + buffer->nOffset, buffer->nFilledLen); avctx->extradata_size += buffer->nFilledLen; memset(avctx->extradata + avctx->extradata_size, 0, AV_INPUT_BUFFER_PADDING_SIZE); } else { if (buffer->nFlags & OMX_BUFFERFLAG_ENDOFFRAME) s->num_out_frames++; if (!(buffer->nFlags & OMX_BUFFERFLAG_ENDOFFRAME) || !pkt->data) { // If the output packet isn't preallocated, just concatenate everything in our // own buffer int newsize = s->output_buf_size + buffer->nFilledLen + AV_INPUT_BUFFER_PADDING_SIZE; if ((ret = av_reallocp(&s->output_buf, newsize)) < 0) { s->output_buf_size = 0; goto end; } memcpy(s->output_buf + s->output_buf_size, buffer->pBuffer + buffer->nOffset, buffer->nFilledLen); s->output_buf_size += buffer->nFilledLen; if (buffer->nFlags & OMX_BUFFERFLAG_ENDOFFRAME) { if ((ret = av_packet_from_data(pkt, s->output_buf, s->output_buf_size)) < 0) { av_freep(&s->output_buf); s->output_buf_size = 0; goto end; } s->output_buf = NULL; s->output_buf_size = 0; } } else { // End of frame, and the caller provided a preallocated frame if ((ret = ff_alloc_packet2(avctx, pkt, s->output_buf_size + buffer->nFilledLen, 0)) < 0) { av_log(avctx, AV_LOG_ERROR, "Error getting output packet of size %d.\n", (int)(s->output_buf_size + buffer->nFilledLen)); goto end; } memcpy(pkt->data, s->output_buf, s->output_buf_size); memcpy(pkt->data + s->output_buf_size, buffer->pBuffer + buffer->nOffset, buffer->nFilledLen); av_freep(&s->output_buf); s->output_buf_size = 0; } if (buffer->nFlags & OMX_BUFFERFLAG_ENDOFFRAME) { pkt->pts = av_rescale_q(from_omx_ticks(buffer->nTimeStamp), AV_TIME_BASE_Q, avctx->time_base); // We don't currently enable B-frames for the encoders, so set // pkt->dts = pkt->pts. (The calling code behaves worse if the encoder // doesn't set the dts). pkt->dts = pkt->pts; if (buffer->nFlags & OMX_BUFFERFLAG_SYNCFRAME) pkt->flags |= AV_PKT_FLAG_KEY; *got_packet = 1; } } end: err = OMX_FillThisBuffer(s->handle, buffer); if (err != OMX_ErrorNone) { append_buffer(&s->output_mutex, &s->output_cond, &s->num_done_out_buffers, s->done_out_buffers, buffer); av_log(avctx, AV_LOG_ERROR, "OMX_FillThisBuffer failed: %x\n", err); ret = AVERROR_UNKNOWN; } } return ret; }


void kvm_arm_reset_vcpu(ARMCPU *cpu) { /* Feed the kernel back its initial register state */ memmove(cpu->cpreg_values, cpu->cpreg_reset_values, cpu->cpreg_array_len * sizeof(cpu->cpreg_values[0])); if (!write_list_to_kvmstate(cpu)) { abort(); } }


static void vmsvga_update_display(void *opaque) { struct vmsvga_state_s *s = opaque; DisplaySurface *surface; bool dirty = false; if (!s->enable) { s->vga.hw_ops->gfx_update(&s->vga); return; } vmsvga_check_size(s); surface = qemu_console_surface(s->vga.con); vmsvga_fifo_run(s); vmsvga_update_rect_flush(s); /* * Is it more efficient to look at vram VGA-dirty bits or wait * for the driver to issue SVGA_CMD_UPDATE? */ if (memory_region_is_logging(&s->vga.vram)) { vga_sync_dirty_bitmap(&s->vga); dirty = memory_region_get_dirty(&s->vga.vram, 0, surface_stride(surface) * surface_height(surface), DIRTY_MEMORY_VGA); } if (s->invalidated || dirty) { s->invalidated = 0; dpy_gfx_update(s->vga.con, 0, 0, surface_width(surface), surface_height(surface)); } if (dirty) { memory_region_reset_dirty(&s->vga.vram, 0, surface_stride(surface) * surface_height(surface), DIRTY_MEMORY_VGA); } }


static void bdrv_io_limits_intercept(BlockDriverState *bs, int nb_sectors, bool is_write) { /* does this io must wait */ bool must_wait = throttle_schedule_timer(&bs->throttle_state, is_write); /* if must wait or any request of this type throttled queue the IO */ if (must_wait || !qemu_co_queue_empty(&bs->throttled_reqs[is_write])) { qemu_co_queue_wait(&bs->throttled_reqs[is_write]); } /* the IO will be executed, do the accounting */ throttle_account(&bs->throttle_state, is_write, nb_sectors * BDRV_SECTOR_SIZE); /* if the next request must wait -> do nothing */ if (throttle_schedule_timer(&bs->throttle_state, is_write)) { return; } /* else queue next request for execution */ qemu_co_queue_next(&bs->throttled_reqs[is_write]); }


static void ide_cfata_identify(IDEState *s) { uint16_t *p; uint32_t cur_sec; p = (uint16_t *) s->identify_data; if (s->identify_set) goto fill_buffer; memset(p, 0, sizeof(s->identify_data)); cur_sec = s->cylinders * s->heads * s->sectors; put_le16(p + 0, 0x848a); /* CF Storage Card signature */ put_le16(p + 1, s->cylinders); /* Default cylinders */ put_le16(p + 3, s->heads); /* Default heads */ put_le16(p + 6, s->sectors); /* Default sectors per track */ put_le16(p + 7, s->nb_sectors >> 16); /* Sectors per card */ put_le16(p + 8, s->nb_sectors); /* Sectors per card */ padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */ put_le16(p + 22, 0x0004); /* ECC bytes */ padstr((char *) (p + 23), s->version, 8); /* Firmware Revision */ padstr((char *) (p + 27), "QEMU MICRODRIVE", 40);/* Model number */ #if MAX_MULT_SECTORS > 1 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS); #else put_le16(p + 47, 0x0000); #endif put_le16(p + 49, 0x0f00); /* Capabilities */ put_le16(p + 51, 0x0002); /* PIO cycle timing mode */ put_le16(p + 52, 0x0001); /* DMA cycle timing mode */ put_le16(p + 53, 0x0003); /* Translation params valid */ put_le16(p + 54, s->cylinders); /* Current cylinders */ put_le16(p + 55, s->heads); /* Current heads */ put_le16(p + 56, s->sectors); /* Current sectors */ put_le16(p + 57, cur_sec); /* Current capacity */ put_le16(p + 58, cur_sec >> 16); /* Current capacity */ if (s->mult_sectors) /* Multiple sector setting */ put_le16(p + 59, 0x100 | s->mult_sectors); put_le16(p + 60, s->nb_sectors); /* Total LBA sectors */ put_le16(p + 61, s->nb_sectors >> 16); /* Total LBA sectors */ put_le16(p + 63, 0x0203); /* Multiword DMA capability */ put_le16(p + 64, 0x0001); /* Flow Control PIO support */ put_le16(p + 65, 0x0096); /* Min. Multiword DMA cycle */ put_le16(p + 66, 0x0096); /* Rec. Multiword DMA cycle */ put_le16(p + 68, 0x00b4); /* Min. PIO cycle time */ put_le16(p + 82, 0x400c); /* Command Set supported */ put_le16(p + 83, 0x7068); /* Command Set supported */ put_le16(p + 84, 0x4000); /* Features supported */ put_le16(p + 85, 0x000c); /* Command Set enabled */ put_le16(p + 86, 0x7044); /* Command Set enabled */ put_le16(p + 87, 0x4000); /* Features enabled */ put_le16(p + 91, 0x4060); /* Current APM level */ put_le16(p + 129, 0x0002); /* Current features option */ put_le16(p + 130, 0x0005); /* Reassigned sectors */ put_le16(p + 131, 0x0001); /* Initial power mode */ put_le16(p + 132, 0x0000); /* User signature */ put_le16(p + 160, 0x8100); /* Power requirement */ put_le16(p + 161, 0x8001); /* CF command set */ s->identify_set = 1; fill_buffer: memcpy(s->io_buffer, p, sizeof(s->identify_data)); }


static void test_qga_file_ops(gconstpointer fix) { const TestFixture *fixture = fix; const unsigned char helloworld[] = "Hello World!\n"; const char *b64; gchar *cmd, *path, *enc; unsigned char *dec; QDict *ret, *val; int64_t id, eof; gsize count; FILE *f; char tmp[100]; /* open */ ret = qmp_fd(fixture->fd, "{'execute': 'guest-file-open'," " 'arguments': { 'path': 'foo', 'mode': 'w+' } }"); g_assert_nonnull(ret); qmp_assert_no_error(ret); id = qdict_get_int(ret, "return"); QDECREF(ret); enc = g_base64_encode(helloworld, sizeof(helloworld)); /* write */ cmd = g_strdup_printf("{'execute': 'guest-file-write'," " 'arguments': { 'handle': %" PRId64 "," " 'buf-b64': '%s' } }", id, enc); ret = qmp_fd(fixture->fd, cmd); g_assert_nonnull(ret); qmp_assert_no_error(ret); val = qdict_get_qdict(ret, "return"); count = qdict_get_int(val, "count"); eof = qdict_get_bool(val, "eof"); g_assert_cmpint(count, ==, sizeof(helloworld)); g_assert_cmpint(eof, ==, 0); QDECREF(ret); g_free(cmd); /* flush */ cmd = g_strdup_printf("{'execute': 'guest-file-flush'," " 'arguments': {'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); QDECREF(ret); g_free(cmd); /* close */ cmd = g_strdup_printf("{'execute': 'guest-file-close'," " 'arguments': {'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); QDECREF(ret); g_free(cmd); /* check content */ path = g_build_filename(fixture->test_dir, "foo", NULL); f = fopen(path, "r"); g_assert_nonnull(f); count = fread(tmp, 1, sizeof(tmp), f); g_assert_cmpint(count, ==, sizeof(helloworld)); tmp[count] = 0; g_assert_cmpstr(tmp, ==, (char *)helloworld); fclose(f); /* open */ ret = qmp_fd(fixture->fd, "{'execute': 'guest-file-open'," " 'arguments': { 'path': 'foo', 'mode': 'r' } }"); g_assert_nonnull(ret); qmp_assert_no_error(ret); id = qdict_get_int(ret, "return"); QDECREF(ret); /* read */ cmd = g_strdup_printf("{'execute': 'guest-file-read'," " 'arguments': { 'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); val = qdict_get_qdict(ret, "return"); count = qdict_get_int(val, "count"); eof = qdict_get_bool(val, "eof"); b64 = qdict_get_str(val, "buf-b64"); g_assert_cmpint(count, ==, sizeof(helloworld)); g_assert(eof); g_assert_cmpstr(b64, ==, enc); QDECREF(ret); g_free(cmd); g_free(enc); /* read eof */ cmd = g_strdup_printf("{'execute': 'guest-file-read'," " 'arguments': { 'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); val = qdict_get_qdict(ret, "return"); count = qdict_get_int(val, "count"); eof = qdict_get_bool(val, "eof"); b64 = qdict_get_str(val, "buf-b64"); g_assert_cmpint(count, ==, 0); g_assert(eof); g_assert_cmpstr(b64, ==, ""); QDECREF(ret); g_free(cmd); /* seek */ cmd = g_strdup_printf("{'execute': 'guest-file-seek'," " 'arguments': { 'handle': %" PRId64 ", " " 'offset': %d, 'whence': %d } }", id, 6, SEEK_SET); ret = qmp_fd(fixture->fd, cmd); qmp_assert_no_error(ret); val = qdict_get_qdict(ret, "return"); count = qdict_get_int(val, "position"); eof = qdict_get_bool(val, "eof"); g_assert_cmpint(count, ==, 6); g_assert(!eof); QDECREF(ret); g_free(cmd); /* partial read */ cmd = g_strdup_printf("{'execute': 'guest-file-read'," " 'arguments': { 'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); val = qdict_get_qdict(ret, "return"); count = qdict_get_int(val, "count"); eof = qdict_get_bool(val, "eof"); b64 = qdict_get_str(val, "buf-b64"); g_assert_cmpint(count, ==, sizeof(helloworld) - 6); g_assert(eof); dec = g_base64_decode(b64, &count); g_assert_cmpint(count, ==, sizeof(helloworld) - 6); g_assert_cmpmem(dec, count, helloworld + 6, sizeof(helloworld) - 6); g_free(dec); QDECREF(ret); g_free(cmd); /* close */ cmd = g_strdup_printf("{'execute': 'guest-file-close'," " 'arguments': {'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); QDECREF(ret); g_free(cmd); }


static inline uint64_t tcg_opc_movi_a(int qp, TCGReg dst, int64_t src) { assert(src == sextract64(src, 0, 22)); return tcg_opc_a5(qp, OPC_ADDL_A5, dst, src, TCG_REG_R0); }


bool qemu_clock_run_timers(QEMUClockType type) { return timerlist_run_timers(main_loop_tlg.tl[type]); }


static int net_slirp_init(VLANState *vlan, const char *model, const char *name) { if (!slirp_inited) { slirp_inited = 1; slirp_init(slirp_restrict, slirp_ip); } slirp_vc = qemu_new_vlan_client(vlan, model, name, slirp_receive, NULL, NULL, NULL); slirp_vc->info_str[0] = '\0'; return 0; }


static int assigned_device_pci_cap_init(PCIDevice *pci_dev, Error **errp) { AssignedDevice *dev = PCI_ASSIGN(pci_dev); PCIRegion *pci_region = dev->real_device.regions; int ret, pos; /* Clear initial capabilities pointer and status copied from hw */ pci_set_byte(pci_dev->config + PCI_CAPABILITY_LIST, 0); pci_set_word(pci_dev->config + PCI_STATUS, pci_get_word(pci_dev->config + PCI_STATUS) & ~PCI_STATUS_CAP_LIST); /* Expose MSI capability * MSI capability is the 1st capability in capability config */ pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_MSI, 0); if (pos != 0 && kvm_check_extension(kvm_state, KVM_CAP_ASSIGN_DEV_IRQ)) { if (verify_irqchip_in_kernel(errp) < 0) { return -ENOTSUP; } dev->dev.cap_present |= QEMU_PCI_CAP_MSI; dev->cap.available |= ASSIGNED_DEVICE_CAP_MSI; /* Only 32-bit/no-mask currently supported */ ret = pci_add_capability(pci_dev, PCI_CAP_ID_MSI, pos, 10, errp); if (ret < 0) { return ret; } pci_dev->msi_cap = pos; pci_set_word(pci_dev->config + pos + PCI_MSI_FLAGS, pci_get_word(pci_dev->config + pos + PCI_MSI_FLAGS) & PCI_MSI_FLAGS_QMASK); pci_set_long(pci_dev->config + pos + PCI_MSI_ADDRESS_LO, 0); pci_set_word(pci_dev->config + pos + PCI_MSI_DATA_32, 0); /* Set writable fields */ pci_set_word(pci_dev->wmask + pos + PCI_MSI_FLAGS, PCI_MSI_FLAGS_QSIZE | PCI_MSI_FLAGS_ENABLE); pci_set_long(pci_dev->wmask + pos + PCI_MSI_ADDRESS_LO, 0xfffffffc); pci_set_word(pci_dev->wmask + pos + PCI_MSI_DATA_32, 0xffff); } /* Expose MSI-X capability */ pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_MSIX, 0); if (pos != 0 && kvm_device_msix_supported(kvm_state)) { int bar_nr; uint32_t msix_table_entry; uint16_t msix_max; if (verify_irqchip_in_kernel(errp) < 0) { return -ENOTSUP; } dev->dev.cap_present |= QEMU_PCI_CAP_MSIX; dev->cap.available |= ASSIGNED_DEVICE_CAP_MSIX; ret = pci_add_capability(pci_dev, PCI_CAP_ID_MSIX, pos, 12, errp); if (ret < 0) { return ret; } pci_dev->msix_cap = pos; msix_max = (pci_get_word(pci_dev->config + pos + PCI_MSIX_FLAGS) & PCI_MSIX_FLAGS_QSIZE) + 1; msix_max = MIN(msix_max, KVM_MAX_MSIX_PER_DEV); pci_set_word(pci_dev->config + pos + PCI_MSIX_FLAGS, msix_max - 1); /* Only enable and function mask bits are writable */ pci_set_word(pci_dev->wmask + pos + PCI_MSIX_FLAGS, PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); msix_table_entry = pci_get_long(pci_dev->config + pos + PCI_MSIX_TABLE); bar_nr = msix_table_entry & PCI_MSIX_FLAGS_BIRMASK; msix_table_entry &= ~PCI_MSIX_FLAGS_BIRMASK; dev->msix_table_addr = pci_region[bar_nr].base_addr + msix_table_entry; dev->msix_table_size = msix_max * sizeof(MSIXTableEntry); dev->msix_max = msix_max; } /* Minimal PM support, nothing writable, device appears to NAK changes */ pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_PM, 0); if (pos) { uint16_t pmc; ret = pci_add_capability(pci_dev, PCI_CAP_ID_PM, pos, PCI_PM_SIZEOF, errp); if (ret < 0) { return ret; } assigned_dev_setup_cap_read(dev, pos, PCI_PM_SIZEOF); pmc = pci_get_word(pci_dev->config + pos + PCI_CAP_FLAGS); pmc &= (PCI_PM_CAP_VER_MASK | PCI_PM_CAP_DSI); pci_set_word(pci_dev->config + pos + PCI_CAP_FLAGS, pmc); /* assign_device will bring the device up to D0, so we don't need * to worry about doing that ourselves here. */ pci_set_word(pci_dev->config + pos + PCI_PM_CTRL, PCI_PM_CTRL_NO_SOFT_RESET); pci_set_byte(pci_dev->config + pos + PCI_PM_PPB_EXTENSIONS, 0); pci_set_byte(pci_dev->config + pos + PCI_PM_DATA_REGISTER, 0); } pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_EXP, 0); if (pos) { uint8_t version, size = 0; uint16_t type, devctl, lnksta; uint32_t devcap, lnkcap; version = pci_get_byte(pci_dev->config + pos + PCI_EXP_FLAGS); version &= PCI_EXP_FLAGS_VERS; if (version == 1) { size = 0x14; } else if (version == 2) { /* * Check for non-std size, accept reduced size to 0x34, * which is what bcm5761 implemented, violating the * PCIe v3.0 spec that regs should exist and be read as 0, * not optionally provided and shorten the struct size. */ size = MIN(0x3c, PCI_CONFIG_SPACE_SIZE - pos); if (size < 0x34) { error_setg(errp, "Invalid size PCIe cap-id 0x%x", PCI_CAP_ID_EXP); return -EINVAL; } else if (size != 0x3c) { error_report("WARNING, %s: PCIe cap-id 0x%x has " "non-standard size 0x%x; std size should be 0x3c", __func__, PCI_CAP_ID_EXP, size); } } else if (version == 0) { uint16_t vid, did; vid = pci_get_word(pci_dev->config + PCI_VENDOR_ID); did = pci_get_word(pci_dev->config + PCI_DEVICE_ID); if (vid == PCI_VENDOR_ID_INTEL && did == 0x10ed) { /* * quirk for Intel 82599 VF with invalid PCIe capability * version, should really be version 2 (same as PF) */ size = 0x3c; } } if (size == 0) { error_setg(errp, "Unsupported PCI express capability version %d", version); return -EINVAL; } ret = pci_add_capability(pci_dev, PCI_CAP_ID_EXP, pos, size, errp); if (ret < 0) { return ret; } assigned_dev_setup_cap_read(dev, pos, size); type = pci_get_word(pci_dev->config + pos + PCI_EXP_FLAGS); type = (type & PCI_EXP_FLAGS_TYPE) >> 4; if (type != PCI_EXP_TYPE_ENDPOINT && type != PCI_EXP_TYPE_LEG_END && type != PCI_EXP_TYPE_RC_END) { error_setg(errp, "Device assignment only supports endpoint " "assignment, device type %d", type); return -EINVAL; } /* capabilities, pass existing read-only copy * PCI_EXP_FLAGS_IRQ: updated by hardware, should be direct read */ /* device capabilities: hide FLR */ devcap = pci_get_long(pci_dev->config + pos + PCI_EXP_DEVCAP); devcap &= ~PCI_EXP_DEVCAP_FLR; pci_set_long(pci_dev->config + pos + PCI_EXP_DEVCAP, devcap); /* device control: clear all error reporting enable bits, leaving * only a few host values. Note, these are * all writable, but not passed to hw. */ devctl = pci_get_word(pci_dev->config + pos + PCI_EXP_DEVCTL); devctl = (devctl & (PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_PAYLOAD)) | PCI_EXP_DEVCTL_RELAX_EN | PCI_EXP_DEVCTL_NOSNOOP_EN; pci_set_word(pci_dev->config + pos + PCI_EXP_DEVCTL, devctl); devctl = PCI_EXP_DEVCTL_BCR_FLR | PCI_EXP_DEVCTL_AUX_PME; pci_set_word(pci_dev->wmask + pos + PCI_EXP_DEVCTL, ~devctl); /* Clear device status */ pci_set_word(pci_dev->config + pos + PCI_EXP_DEVSTA, 0); /* Link capabilities, expose links and latencues, clear reporting */ lnkcap = pci_get_long(pci_dev->config + pos + PCI_EXP_LNKCAP); lnkcap &= (PCI_EXP_LNKCAP_SLS | PCI_EXP_LNKCAP_MLW | PCI_EXP_LNKCAP_ASPMS | PCI_EXP_LNKCAP_L0SEL | PCI_EXP_LNKCAP_L1EL); pci_set_long(pci_dev->config + pos + PCI_EXP_LNKCAP, lnkcap); /* Link control, pass existing read-only copy. Should be writable? */ /* Link status, only expose current speed and width */ lnksta = pci_get_word(pci_dev->config + pos + PCI_EXP_LNKSTA); lnksta &= (PCI_EXP_LNKSTA_CLS | PCI_EXP_LNKSTA_NLW); pci_set_word(pci_dev->config + pos + PCI_EXP_LNKSTA, lnksta); if (version >= 2) { /* Slot capabilities, control, status - not needed for endpoints */ pci_set_long(pci_dev->config + pos + PCI_EXP_SLTCAP, 0); pci_set_word(pci_dev->config + pos + PCI_EXP_SLTCTL, 0); pci_set_word(pci_dev->config + pos + PCI_EXP_SLTSTA, 0); /* Root control, capabilities, status - not needed for endpoints */ pci_set_word(pci_dev->config + pos + PCI_EXP_RTCTL, 0); pci_set_word(pci_dev->config + pos + PCI_EXP_RTCAP, 0); pci_set_long(pci_dev->config + pos + PCI_EXP_RTSTA, 0); /* Device capabilities/control 2, pass existing read-only copy */ /* Link control 2, pass existing read-only copy */ } } pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_PCIX, 0); if (pos) { uint16_t cmd; uint32_t status; /* Only expose the minimum, 8 byte capability */ ret = pci_add_capability(pci_dev, PCI_CAP_ID_PCIX, pos, 8, errp); if (ret < 0) { return ret; } assigned_dev_setup_cap_read(dev, pos, 8); /* Command register, clear upper bits, including extended modes */ cmd = pci_get_word(pci_dev->config + pos + PCI_X_CMD); cmd &= (PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO | PCI_X_CMD_MAX_READ | PCI_X_CMD_MAX_SPLIT); pci_set_word(pci_dev->config + pos + PCI_X_CMD, cmd); /* Status register, update with emulated PCI bus location, clear * error bits, leave the rest. */ status = pci_get_long(pci_dev->config + pos + PCI_X_STATUS); status &= ~(PCI_X_STATUS_BUS | PCI_X_STATUS_DEVFN); status |= pci_get_bdf(pci_dev); status &= ~(PCI_X_STATUS_SPL_DISC | PCI_X_STATUS_UNX_SPL | PCI_X_STATUS_SPL_ERR); pci_set_long(pci_dev->config + pos + PCI_X_STATUS, status); } pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_VPD, 0); if (pos) { /* Direct R/W passthrough */ ret = pci_add_capability(pci_dev, PCI_CAP_ID_VPD, pos, 8, errp); if (ret < 0) { return ret; } assigned_dev_setup_cap_read(dev, pos, 8); /* direct write for cap content */ assigned_dev_direct_config_write(dev, pos + 2, 6); } /* Devices can have multiple vendor capabilities, get them all */ for (pos = 0; (pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_VNDR, pos)); pos += PCI_CAP_LIST_NEXT) { uint8_t len = pci_get_byte(pci_dev->config + pos + PCI_CAP_FLAGS); /* Direct R/W passthrough */ ret = pci_add_capability(pci_dev, PCI_CAP_ID_VNDR, pos, len, errp); if (ret < 0) { return ret; } assigned_dev_setup_cap_read(dev, pos, len); /* direct write for cap content */ assigned_dev_direct_config_write(dev, pos + 2, len - 2); } /* If real and virtual capability list status bits differ, virtualize the * access. */ if ((pci_get_word(pci_dev->config + PCI_STATUS) & PCI_STATUS_CAP_LIST) != (assigned_dev_pci_read_byte(pci_dev, PCI_STATUS) & PCI_STATUS_CAP_LIST)) { dev->emulate_config_read[PCI_STATUS] |= PCI_STATUS_CAP_LIST; } return 0; }


static inline void gen_intermediate_code_internal(UniCore32CPU *cpu, TranslationBlock *tb, bool search_pc) { CPUState *cs = CPU(cpu); CPUUniCore32State *env = &cpu->env; DisasContext dc1, *dc = &dc1; CPUBreakpoint *bp; uint16_t *gen_opc_end; int j, lj; target_ulong pc_start; uint32_t next_page_start; int num_insns; int max_insns; /* generate intermediate code */ num_temps = 0; pc_start = tb->pc; dc->tb = tb; gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; dc->is_jmp = DISAS_NEXT; dc->pc = pc_start; dc->singlestep_enabled = cs->singlestep_enabled; dc->condjmp = 0; cpu_F0s = tcg_temp_new_i32(); cpu_F1s = tcg_temp_new_i32(); cpu_F0d = tcg_temp_new_i64(); cpu_F1d = tcg_temp_new_i64(); next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; lj = -1; num_insns = 0; max_insns = tb->cflags & CF_COUNT_MASK; if (max_insns == 0) { max_insns = CF_COUNT_MASK; } #ifndef CONFIG_USER_ONLY if ((env->uncached_asr & ASR_M) == ASR_MODE_USER) { dc->user = 1; } else { dc->user = 0; } #endif gen_tb_start(); do { if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) { QTAILQ_FOREACH(bp, &cs->breakpoints, entry) { if (bp->pc == dc->pc) { gen_set_pc_im(dc->pc); gen_exception(EXCP_DEBUG); dc->is_jmp = DISAS_JUMP; /* Advance PC so that clearing the breakpoint will invalidate this TB. */ dc->pc += 2; /* FIXME */ goto done_generating; } } } if (search_pc) { j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; if (lj < j) { lj++; while (lj < j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; } } tcg_ctx.gen_opc_pc[lj] = dc->pc; tcg_ctx.gen_opc_instr_start[lj] = 1; tcg_ctx.gen_opc_icount[lj] = num_insns; } if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) { gen_io_start(); } disas_uc32_insn(env, dc); if (num_temps) { fprintf(stderr, "Internal resource leak before %08x\n", dc->pc); num_temps = 0; } if (dc->condjmp && !dc->is_jmp) { gen_set_label(dc->condlabel); dc->condjmp = 0; } /* Translation stops when a conditional branch is encountered. * Otherwise the subsequent code could get translated several times. * Also stop translation when a page boundary is reached. This * ensures prefetch aborts occur at the right place. */ num_insns++; } while (!dc->is_jmp && tcg_ctx.gen_opc_ptr < gen_opc_end && !cs->singlestep_enabled && !singlestep && dc->pc < next_page_start && num_insns < max_insns); if (tb->cflags & CF_LAST_IO) { if (dc->condjmp) { /* FIXME: This can theoretically happen with self-modifying code. */ cpu_abort(cs, "IO on conditional branch instruction"); } gen_io_end(); } /* At this stage dc->condjmp will only be set when the skipped instruction was a conditional branch or trap, and the PC has already been written. */ if (unlikely(cs->singlestep_enabled)) { /* Make sure the pc is updated, and raise a debug exception. */ if (dc->condjmp) { if (dc->is_jmp == DISAS_SYSCALL) { gen_exception(UC32_EXCP_PRIV); } else { gen_exception(EXCP_DEBUG); } gen_set_label(dc->condlabel); } if (dc->condjmp || !dc->is_jmp) { gen_set_pc_im(dc->pc); dc->condjmp = 0; } if (dc->is_jmp == DISAS_SYSCALL && !dc->condjmp) { gen_exception(UC32_EXCP_PRIV); } else { gen_exception(EXCP_DEBUG); } } else { /* While branches must always occur at the end of an IT block, there are a few other things that can cause us to terminate the TB in the middel of an IT block: - Exception generating instructions (bkpt, swi, undefined). - Page boundaries. - Hardware watchpoints. Hardware breakpoints have already been handled and skip this code. */ switch (dc->is_jmp) { case DISAS_NEXT: gen_goto_tb(dc, 1, dc->pc); break; default: case DISAS_JUMP: case DISAS_UPDATE: /* indicate that the hash table must be used to find the next TB */ tcg_gen_exit_tb(0); break; case DISAS_TB_JUMP: /* nothing more to generate */ break; case DISAS_SYSCALL: gen_exception(UC32_EXCP_PRIV); break; } if (dc->condjmp) { gen_set_label(dc->condlabel); gen_goto_tb(dc, 1, dc->pc); dc->condjmp = 0; } } done_generating: gen_tb_end(tb, num_insns); *tcg_ctx.gen_opc_ptr = INDEX_op_end; #ifdef DEBUG_DISAS if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { qemu_log("----------------\n"); qemu_log("IN: %s\n", lookup_symbol(pc_start)); log_target_disas(env, pc_start, dc->pc - pc_start, 0); qemu_log("\n"); } #endif if (search_pc) { j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; lj++; while (lj <= j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; } } else { tb->size = dc->pc - pc_start; tb->icount = num_insns; } }


static int commit_bitstream_and_slice_buffer(AVCodecContext *avctx, DECODER_BUFFER_DESC *bs, DECODER_BUFFER_DESC *sc) { const struct MpegEncContext *s = avctx->priv_data; AVDXVAContext *ctx = avctx->hwaccel_context; struct dxva2_picture_context *ctx_pic = s->current_picture_ptr->hwaccel_picture_private; const int is_field = s->picture_structure != PICT_FRAME; const unsigned mb_count = s->mb_width * (s->mb_height >> is_field); void *dxva_data_ptr; uint8_t *dxva_data, *current, *end; unsigned dxva_size; unsigned i; unsigned type; #if CONFIG_D3D11VA if (avctx->pix_fmt == AV_PIX_FMT_D3D11VA_VLD) { type = D3D11_VIDEO_DECODER_BUFFER_BITSTREAM; if (FAILED(ID3D11VideoContext_GetDecoderBuffer(D3D11VA_CONTEXT(ctx)->video_context, D3D11VA_CONTEXT(ctx)->decoder, type, &dxva_size, &dxva_data_ptr))) return -1; } #endif #if CONFIG_DXVA2 if (avctx->pix_fmt == AV_PIX_FMT_DXVA2_VLD) { type = DXVA2_BitStreamDateBufferType; if (FAILED(IDirectXVideoDecoder_GetBuffer(DXVA2_CONTEXT(ctx)->decoder, type, &dxva_data_ptr, &dxva_size))) return -1; } #endif dxva_data = dxva_data_ptr; current = dxva_data; end = dxva_data + dxva_size; for (i = 0; i < ctx_pic->slice_count; i++) { DXVA_SliceInfo *slice = &ctx_pic->slice[i]; unsigned position = slice->dwSliceDataLocation; unsigned size = slice->dwSliceBitsInBuffer / 8; if (size > end - current) { av_log(avctx, AV_LOG_ERROR, "Failed to build bitstream"); break; } slice->dwSliceDataLocation = current - dxva_data; if (i < ctx_pic->slice_count - 1) slice->wNumberMBsInSlice = slice[1].wNumberMBsInSlice - slice[0].wNumberMBsInSlice; else slice->wNumberMBsInSlice = mb_count - slice[0].wNumberMBsInSlice; memcpy(current, &ctx_pic->bitstream[position], size); current += size; } #if CONFIG_D3D11VA if (avctx->pix_fmt == AV_PIX_FMT_D3D11VA_VLD) if (FAILED(ID3D11VideoContext_ReleaseDecoderBuffer(D3D11VA_CONTEXT(ctx)->video_context, D3D11VA_CONTEXT(ctx)->decoder, type))) return -1; #endif #if CONFIG_DXVA2 if (avctx->pix_fmt == AV_PIX_FMT_DXVA2_VLD) if (FAILED(IDirectXVideoDecoder_ReleaseBuffer(DXVA2_CONTEXT(ctx)->decoder, type))) return -1; #endif if (i < ctx_pic->slice_count) return -1; #if CONFIG_D3D11VA if (avctx->pix_fmt == AV_PIX_FMT_D3D11VA_VLD) { D3D11_VIDEO_DECODER_BUFFER_DESC *dsc11 = bs; memset(dsc11, 0, sizeof(*dsc11)); dsc11->BufferType = type; dsc11->DataSize = current - dxva_data; dsc11->NumMBsInBuffer = mb_count; type = D3D11_VIDEO_DECODER_BUFFER_SLICE_CONTROL; } #endif #if CONFIG_DXVA2 if (avctx->pix_fmt == AV_PIX_FMT_DXVA2_VLD) { DXVA2_DecodeBufferDesc *dsc2 = bs; memset(dsc2, 0, sizeof(*dsc2)); dsc2->CompressedBufferType = type; dsc2->DataSize = current - dxva_data; dsc2->NumMBsInBuffer = mb_count; type = DXVA2_SliceControlBufferType; } #endif return ff_dxva2_commit_buffer(avctx, ctx, sc, type, ctx_pic->slice, ctx_pic->slice_count * sizeof(*ctx_pic->slice), mb_count); }


static void piix4_reset(void *opaque) { PIIX4PMState *s = opaque; uint8_t *pci_conf = s->dev.config; pci_conf[0x58] = 0; pci_conf[0x59] = 0; pci_conf[0x5a] = 0; pci_conf[0x5b] = 0; }


static void vgafb_write(void *opaque, target_phys_addr_t addr, uint64_t value, unsigned size) { MilkymistVgafbState *s = opaque; trace_milkymist_vgafb_memory_write(addr, value); addr >>= 2; switch (addr) { case R_CTRL: s->regs[addr] = value; vgafb_resize(s); break; case R_HSYNC_START: case R_HSYNC_END: case R_HSCAN: case R_VSYNC_START: case R_VSYNC_END: case R_VSCAN: case R_BURST_COUNT: case R_DDC: case R_SOURCE_CLOCK: s->regs[addr] = value; break; case R_BASEADDRESS: if (value & 0x1f) { error_report("milkymist_vgafb: framebuffer base address have to " "be 32 byte aligned"); break; } s->regs[addr] = value & s->fb_mask; s->invalidate = 1; break; case R_HRES: case R_VRES: s->regs[addr] = value; vgafb_resize(s); break; case R_BASEADDRESS_ACT: error_report("milkymist_vgafb: write to read-only register 0x" TARGET_FMT_plx, addr << 2); break; default: error_report("milkymist_vgafb: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } }


static int get_phys_addr_v5(CPUARMState *env, uint32_t address, int access_type, ARMMMUIdx mmu_idx, hwaddr *phys_ptr, int *prot, target_ulong *page_size) { CPUState *cs = CPU(arm_env_get_cpu(env)); int code; uint32_t table; uint32_t desc; int type; int ap; int domain = 0; int domain_prot; hwaddr phys_addr; uint32_t dacr; /* Pagetable walk. */ /* Lookup l1 descriptor. */ if (!get_level1_table_address(env, mmu_idx, &table, address)) { /* Section translation fault if page walk is disabled by PD0 or PD1 */ code = 5; goto do_fault; } desc = ldl_phys(cs->as, table); type = (desc & 3); domain = (desc >> 5) & 0x0f; if (regime_el(env, mmu_idx) == 1) { dacr = env->cp15.dacr_ns; } else { dacr = env->cp15.dacr_s; } domain_prot = (dacr >> (domain * 2)) & 3; if (type == 0) { /* Section translation fault. */ code = 5; goto do_fault; } if (domain_prot == 0 || domain_prot == 2) { if (type == 2) code = 9; /* Section domain fault. */ else code = 11; /* Page domain fault. */ goto do_fault; } if (type == 2) { /* 1Mb section. */ phys_addr = (desc & 0xfff00000) | (address & 0x000fffff); ap = (desc >> 10) & 3; code = 13; *page_size = 1024 * 1024; } else { /* Lookup l2 entry. */ if (type == 1) { /* Coarse pagetable. */ table = (desc & 0xfffffc00) | ((address >> 10) & 0x3fc); } else { /* Fine pagetable. */ table = (desc & 0xfffff000) | ((address >> 8) & 0xffc); } desc = ldl_phys(cs->as, table); switch (desc & 3) { case 0: /* Page translation fault. */ code = 7; goto do_fault; case 1: /* 64k page. */ phys_addr = (desc & 0xffff0000) | (address & 0xffff); ap = (desc >> (4 + ((address >> 13) & 6))) & 3; *page_size = 0x10000; break; case 2: /* 4k page. */ phys_addr = (desc & 0xfffff000) | (address & 0xfff); ap = (desc >> (4 + ((address >> 9) & 6))) & 3; *page_size = 0x1000; break; case 3: /* 1k page. */ if (type == 1) { if (arm_feature(env, ARM_FEATURE_XSCALE)) { phys_addr = (desc & 0xfffff000) | (address & 0xfff); } else { /* Page translation fault. */ code = 7; goto do_fault; } } else { phys_addr = (desc & 0xfffffc00) | (address & 0x3ff); } ap = (desc >> 4) & 3; *page_size = 0x400; break; default: /* Never happens, but compiler isn't smart enough to tell. */ abort(); } code = 15; } *prot = check_ap(env, mmu_idx, ap, domain_prot, access_type); if (!*prot) { /* Access permission fault. */ goto do_fault; } *prot |= PAGE_EXEC; *phys_ptr = phys_addr; return 0; do_fault: return code | (domain << 4); }


static void qjson_initfn(Object *obj) { QJSON *json = QJSON(obj); json->str = qstring_from_str("{ "); json->omit_comma = true; }


cac_applet_pki_reset(VCard *card, int channel) { VCardAppletPrivate *applet_private = NULL; CACPKIAppletData *pki_applet = NULL; applet_private = vcard_get_current_applet_private(card, channel); assert(applet_private); pki_applet = &(applet_private->u.pki_data); pki_applet->cert_buffer = NULL; if (pki_applet->sign_buffer) { g_free(pki_applet->sign_buffer); pki_applet->sign_buffer = NULL; } pki_applet->cert_buffer_len = 0; pki_applet->sign_buffer_len = 0; return VCARD_DONE; }


static void coroutine_fn bdrv_rw_co_entry(void *opaque) { RwCo *rwco = opaque; if (!rwco->is_write) { rwco->ret = bdrv_co_do_preadv(rwco->bs, rwco->offset, rwco->qiov->size, rwco->qiov, rwco->flags); } else { rwco->ret = bdrv_co_do_pwritev(rwco->bs, rwco->offset, rwco->qiov->size, rwco->qiov, rwco->flags); } }


static void do_help(int argc, const char **argv) { help_cmd(argv[1]); }


int main(int argc, char **argv, char **envp) { const char *gdbstub_dev = NULL; int i; int snapshot, linux_boot; const char *icount_option = NULL; const char *initrd_filename; const char *kernel_filename, *kernel_cmdline; char boot_devices[33] = "cad"; /* default to HD->floppy->CD-ROM */ DisplayState *ds; DisplayChangeListener *dcl; int cyls, heads, secs, translation; QemuOpts *hda_opts = NULL, *opts; QemuOptsList *olist; int optind; const char *optarg; const char *loadvm = NULL; QEMUMachine *machine; const char *cpu_model; const char *pid_file = NULL; const char *incoming = NULL; #ifdef CONFIG_VNC int show_vnc_port = 0; #endif int defconfig = 1; const char *log_mask = NULL; const char *log_file = NULL; GMemVTable mem_trace = { .malloc = malloc_and_trace, .realloc = realloc_and_trace, .free = free_and_trace, }; const char *trace_events = NULL; const char *trace_file = NULL; atexit(qemu_run_exit_notifiers); error_set_progname(argv[0]); g_mem_set_vtable(&mem_trace); if (!g_thread_supported()) { #if !GLIB_CHECK_VERSION(2, 31, 0) g_thread_init(NULL); #else fprintf(stderr, "glib threading failed to initialize.\n"); exit(1); #endif } runstate_init(); init_clocks(); rtc_clock = host_clock; qemu_cache_utils_init(envp); QLIST_INIT (&vm_change_state_head); os_setup_early_signal_handling(); module_call_init(MODULE_INIT_MACHINE); machine = find_default_machine(); cpu_model = NULL; initrd_filename = NULL; ram_size = 0; snapshot = 0; kernel_filename = NULL; kernel_cmdline = ""; cyls = heads = secs = 0; translation = BIOS_ATA_TRANSLATION_AUTO; for (i = 0; i < MAX_NODES; i++) { node_mem[i] = 0; node_cpumask[i] = 0; } nb_numa_nodes = 0; nb_nics = 0; autostart= 1; /* first pass of option parsing */ optind = 1; while (optind < argc) { if (argv[optind][0] != '-') { /* disk image */ optind++; continue; } else { const QEMUOption *popt; popt = lookup_opt(argc, argv, &optarg, &optind); switch (popt->index) { case QEMU_OPTION_nodefconfig: defconfig=0; break; } } } if (defconfig) { int ret; ret = qemu_read_config_file(CONFIG_QEMU_CONFDIR "/qemu.conf"); if (ret < 0 && ret != -ENOENT) { exit(1); } ret = qemu_read_config_file(arch_config_name); if (ret < 0 && ret != -ENOENT) { exit(1); } } cpudef_init(); /* second pass of option parsing */ optind = 1; for(;;) { if (optind >= argc) break; if (argv[optind][0] != '-') { hda_opts = drive_add(IF_DEFAULT, 0, argv[optind++], HD_OPTS); } else { const QEMUOption *popt; popt = lookup_opt(argc, argv, &optarg, &optind); if (!(popt->arch_mask & arch_type)) { printf("Option %s not supported for this target\n", popt->name); exit(1); } switch(popt->index) { case QEMU_OPTION_M: machine = machine_parse(optarg); break; case QEMU_OPTION_cpu: /* hw initialization will check this */ if (*optarg == '?') { list_cpus(stdout, &fprintf, optarg); exit(0); } else { cpu_model = optarg; } break; case QEMU_OPTION_initrd: initrd_filename = optarg; break; case QEMU_OPTION_hda: { char buf[256]; if (cyls == 0) snprintf(buf, sizeof(buf), "%s", HD_OPTS); else snprintf(buf, sizeof(buf), "%s,cyls=%d,heads=%d,secs=%d%s", HD_OPTS , cyls, heads, secs, translation == BIOS_ATA_TRANSLATION_LBA ? ",trans=lba" : translation == BIOS_ATA_TRANSLATION_NONE ? ",trans=none" : ""); drive_add(IF_DEFAULT, 0, optarg, buf); break; } case QEMU_OPTION_hdb: case QEMU_OPTION_hdc: case QEMU_OPTION_hdd: drive_add(IF_DEFAULT, popt->index - QEMU_OPTION_hda, optarg, HD_OPTS); break; case QEMU_OPTION_drive: if (drive_def(optarg) == NULL) { exit(1); } break; case QEMU_OPTION_set: if (qemu_set_option(optarg) != 0) exit(1); break; case QEMU_OPTION_global: if (qemu_global_option(optarg) != 0) exit(1); break; case QEMU_OPTION_mtdblock: drive_add(IF_MTD, -1, optarg, MTD_OPTS); break; case QEMU_OPTION_sd: drive_add(IF_SD, 0, optarg, SD_OPTS); break; case QEMU_OPTION_pflash: drive_add(IF_PFLASH, -1, optarg, PFLASH_OPTS); break; case QEMU_OPTION_snapshot: snapshot = 1; break; case QEMU_OPTION_hdachs: { const char *p; p = optarg; cyls = strtol(p, (char **)&p, 0); if (cyls < 1 || cyls > 16383) goto chs_fail; if (*p != ',') goto chs_fail; p++; heads = strtol(p, (char **)&p, 0); if (heads < 1 || heads > 16) goto chs_fail; if (*p != ',') goto chs_fail; p++; secs = strtol(p, (char **)&p, 0); if (secs < 1 || secs > 63) goto chs_fail; if (*p == ',') { p++; if (!strcmp(p, "none")) translation = BIOS_ATA_TRANSLATION_NONE; else if (!strcmp(p, "lba")) translation = BIOS_ATA_TRANSLATION_LBA; else if (!strcmp(p, "auto")) translation = BIOS_ATA_TRANSLATION_AUTO; else goto chs_fail; } else if (*p != '\0') { chs_fail: fprintf(stderr, "qemu: invalid physical CHS format\n"); exit(1); } if (hda_opts != NULL) { char num[16]; snprintf(num, sizeof(num), "%d", cyls); qemu_opt_set(hda_opts, "cyls", num); snprintf(num, sizeof(num), "%d", heads); qemu_opt_set(hda_opts, "heads", num); snprintf(num, sizeof(num), "%d", secs); qemu_opt_set(hda_opts, "secs", num); if (translation == BIOS_ATA_TRANSLATION_LBA) qemu_opt_set(hda_opts, "trans", "lba"); if (translation == BIOS_ATA_TRANSLATION_NONE) qemu_opt_set(hda_opts, "trans", "none"); } } break; case QEMU_OPTION_numa: if (nb_numa_nodes >= MAX_NODES) { fprintf(stderr, "qemu: too many NUMA nodes\n"); exit(1); } numa_add(optarg); break; case QEMU_OPTION_display: display_type = select_display(optarg); break; case QEMU_OPTION_nographic: display_type = DT_NOGRAPHIC; break; case QEMU_OPTION_curses: #ifdef CONFIG_CURSES display_type = DT_CURSES; #else fprintf(stderr, "Curses support is disabled\n"); exit(1); #endif break; case QEMU_OPTION_portrait: graphic_rotate = 90; break; case QEMU_OPTION_rotate: graphic_rotate = strtol(optarg, (char **) &optarg, 10); if (graphic_rotate != 0 && graphic_rotate != 90 && graphic_rotate != 180 && graphic_rotate != 270) { fprintf(stderr, "qemu: only 90, 180, 270 deg rotation is available\n"); exit(1); } break; case QEMU_OPTION_kernel: kernel_filename = optarg; break; case QEMU_OPTION_append: kernel_cmdline = optarg; break; case QEMU_OPTION_cdrom: drive_add(IF_DEFAULT, 2, optarg, CDROM_OPTS); break; case QEMU_OPTION_boot: { static const char * const params[] = { "order", "once", "menu", "splash", "splash-time", NULL }; char buf[sizeof(boot_devices)]; char *standard_boot_devices; int legacy = 0; if (!strchr(optarg, '=')) { legacy = 1; pstrcpy(buf, sizeof(buf), optarg); } else if (check_params(buf, sizeof(buf), params, optarg) < 0) { fprintf(stderr, "qemu: unknown boot parameter '%s' in '%s'\n", buf, optarg); exit(1); } if (legacy || get_param_value(buf, sizeof(buf), "order", optarg)) { validate_bootdevices(buf); pstrcpy(boot_devices, sizeof(boot_devices), buf); } if (!legacy) { if (get_param_value(buf, sizeof(buf), "once", optarg)) { validate_bootdevices(buf); standard_boot_devices = g_strdup(boot_devices); pstrcpy(boot_devices, sizeof(boot_devices), buf); qemu_register_reset(restore_boot_devices, standard_boot_devices); } if (get_param_value(buf, sizeof(buf), "menu", optarg)) { if (!strcmp(buf, "on")) { boot_menu = 1; } else if (!strcmp(buf, "off")) { boot_menu = 0; } else { fprintf(stderr, "qemu: invalid option value '%s'\n", buf); exit(1); } } qemu_opts_parse(qemu_find_opts("boot-opts"), optarg, 0); } } break; case QEMU_OPTION_fda: case QEMU_OPTION_fdb: drive_add(IF_FLOPPY, popt->index - QEMU_OPTION_fda, optarg, FD_OPTS); break; case QEMU_OPTION_no_fd_bootchk: fd_bootchk = 0; break; case QEMU_OPTION_netdev: if (net_client_parse(qemu_find_opts("netdev"), optarg) == -1) { exit(1); } break; case QEMU_OPTION_net: if (net_client_parse(qemu_find_opts("net"), optarg) == -1) { exit(1); } break; #ifdef CONFIG_SLIRP case QEMU_OPTION_tftp: legacy_tftp_prefix = optarg; break; case QEMU_OPTION_bootp: legacy_bootp_filename = optarg; break; case QEMU_OPTION_redir: if (net_slirp_redir(optarg) < 0) exit(1); break; #endif case QEMU_OPTION_bt: add_device_config(DEV_BT, optarg); break; case QEMU_OPTION_audio_help: if (!(audio_available())) { printf("Option %s not supported for this target\n", popt->name); exit(1); } AUD_help (); exit (0); break; case QEMU_OPTION_soundhw: if (!(audio_available())) { printf("Option %s not supported for this target\n", popt->name); exit(1); } select_soundhw (optarg); break; case QEMU_OPTION_h: help(0); break; case QEMU_OPTION_version: version(); exit(0); break; case QEMU_OPTION_m: { int64_t value; char *end; value = strtosz(optarg, &end); if (value < 0 || *end) { fprintf(stderr, "qemu: invalid ram size: %s\n", optarg); exit(1); } if (value != (uint64_t)(ram_addr_t)value) { fprintf(stderr, "qemu: ram size too large\n"); exit(1); } ram_size = value; break; } case QEMU_OPTION_mempath: mem_path = optarg; break; #ifdef MAP_POPULATE case QEMU_OPTION_mem_prealloc: mem_prealloc = 1; break; #endif case QEMU_OPTION_d: log_mask = optarg; break; case QEMU_OPTION_D: log_file = optarg; break; case QEMU_OPTION_s: gdbstub_dev = "tcp::" DEFAULT_GDBSTUB_PORT; break; case QEMU_OPTION_gdb: gdbstub_dev = optarg; break; case QEMU_OPTION_L: data_dir = optarg; break; case QEMU_OPTION_bios: bios_name = optarg; break; case QEMU_OPTION_singlestep: singlestep = 1; break; case QEMU_OPTION_S: autostart = 0; break; case QEMU_OPTION_k: keyboard_layout = optarg; break; case QEMU_OPTION_localtime: rtc_utc = 0; break; case QEMU_OPTION_vga: select_vgahw (optarg); break; case QEMU_OPTION_g: { const char *p; int w, h, depth; p = optarg; w = strtol(p, (char **)&p, 10); if (w <= 0) { graphic_error: fprintf(stderr, "qemu: invalid resolution or depth\n"); exit(1); } if (*p != 'x') goto graphic_error; p++; h = strtol(p, (char **)&p, 10); if (h <= 0) goto graphic_error; if (*p == 'x') { p++; depth = strtol(p, (char **)&p, 10); if (depth != 8 && depth != 15 && depth != 16 && depth != 24 && depth != 32) goto graphic_error; } else if (*p == '\0') { depth = graphic_depth; } else { goto graphic_error; } graphic_width = w; graphic_height = h; graphic_depth = depth; } break; case QEMU_OPTION_echr: { char *r; term_escape_char = strtol(optarg, &r, 0); if (r == optarg) printf("Bad argument to echr\n"); break; } case QEMU_OPTION_monitor: monitor_parse(optarg, "readline"); default_monitor = 0; break; case QEMU_OPTION_qmp: monitor_parse(optarg, "control"); default_monitor = 0; break; case QEMU_OPTION_mon: opts = qemu_opts_parse(qemu_find_opts("mon"), optarg, 1); if (!opts) { exit(1); } default_monitor = 0; break; case QEMU_OPTION_chardev: opts = qemu_opts_parse(qemu_find_opts("chardev"), optarg, 1); if (!opts) { exit(1); } break; case QEMU_OPTION_fsdev: olist = qemu_find_opts("fsdev"); if (!olist) { fprintf(stderr, "fsdev is not supported by this qemu build.\n"); exit(1); } opts = qemu_opts_parse(olist, optarg, 1); if (!opts) { fprintf(stderr, "parse error: %s\n", optarg); exit(1); } break; case QEMU_OPTION_virtfs: { QemuOpts *fsdev; QemuOpts *device; const char *writeout; olist = qemu_find_opts("virtfs"); if (!olist) { fprintf(stderr, "virtfs is not supported by this qemu build.\n"); exit(1); } opts = qemu_opts_parse(olist, optarg, 1); if (!opts) { fprintf(stderr, "parse error: %s\n", optarg); exit(1); } if (qemu_opt_get(opts, "fsdriver") == NULL || qemu_opt_get(opts, "mount_tag") == NULL || qemu_opt_get(opts, "path") == NULL) { fprintf(stderr, "Usage: -virtfs fsdriver,path=/share_path/," "[security_model={mapped|passthrough|none}]," "mount_tag=tag.\n"); exit(1); } fsdev = qemu_opts_create(qemu_find_opts("fsdev"), qemu_opt_get(opts, "mount_tag"), 1); if (!fsdev) { fprintf(stderr, "duplicate fsdev id: %s\n", qemu_opt_get(opts, "mount_tag")); exit(1); } writeout = qemu_opt_get(opts, "writeout"); if (writeout) { #ifdef CONFIG_SYNC_FILE_RANGE qemu_opt_set(fsdev, "writeout", writeout); #else fprintf(stderr, "writeout=immediate not supported on " "this platform\n"); exit(1); #endif } qemu_opt_set(fsdev, "fsdriver", qemu_opt_get(opts, "fsdriver")); qemu_opt_set(fsdev, "path", qemu_opt_get(opts, "path")); qemu_opt_set(fsdev, "security_model", qemu_opt_get(opts, "security_model")); qemu_opt_set_bool(fsdev, "readonly", qemu_opt_get_bool(opts, "readonly", 0)); device = qemu_opts_create(qemu_find_opts("device"), NULL, 0); qemu_opt_set(device, "driver", "virtio-9p-pci"); qemu_opt_set(device, "fsdev", qemu_opt_get(opts, "mount_tag")); qemu_opt_set(device, "mount_tag", qemu_opt_get(opts, "mount_tag")); break; } case QEMU_OPTION_virtfs_synth: { QemuOpts *fsdev; QemuOpts *device; fsdev = qemu_opts_create(qemu_find_opts("fsdev"), "v_synth", 1); if (!fsdev) { fprintf(stderr, "duplicate option: %s\n", "virtfs_synth"); exit(1); } qemu_opt_set(fsdev, "fsdriver", "synth"); qemu_opt_set(fsdev, "path", "/"); /* ignored */ device = qemu_opts_create(qemu_find_opts("device"), NULL, 0); qemu_opt_set(device, "driver", "virtio-9p-pci"); qemu_opt_set(device, "fsdev", "v_synth"); qemu_opt_set(device, "mount_tag", "v_synth"); break; } case QEMU_OPTION_serial: add_device_config(DEV_SERIAL, optarg); default_serial = 0; if (strncmp(optarg, "mon:", 4) == 0) { default_monitor = 0; } break; case QEMU_OPTION_watchdog: if (watchdog) { fprintf(stderr, "qemu: only one watchdog option may be given\n"); return 1; } watchdog = optarg; break; case QEMU_OPTION_watchdog_action: if (select_watchdog_action(optarg) == -1) { fprintf(stderr, "Unknown -watchdog-action parameter\n"); exit(1); } break; case QEMU_OPTION_virtiocon: add_device_config(DEV_VIRTCON, optarg); default_virtcon = 0; if (strncmp(optarg, "mon:", 4) == 0) { default_monitor = 0; } break; case QEMU_OPTION_parallel: add_device_config(DEV_PARALLEL, optarg); default_parallel = 0; if (strncmp(optarg, "mon:", 4) == 0) { default_monitor = 0; } break; case QEMU_OPTION_debugcon: add_device_config(DEV_DEBUGCON, optarg); break; case QEMU_OPTION_loadvm: loadvm = optarg; break; case QEMU_OPTION_full_screen: full_screen = 1; break; #ifdef CONFIG_SDL case QEMU_OPTION_no_frame: no_frame = 1; break; case QEMU_OPTION_alt_grab: alt_grab = 1; break; case QEMU_OPTION_ctrl_grab: ctrl_grab = 1; break; case QEMU_OPTION_no_quit: no_quit = 1; break; case QEMU_OPTION_sdl: display_type = DT_SDL; break; #else case QEMU_OPTION_no_frame: case QEMU_OPTION_alt_grab: case QEMU_OPTION_ctrl_grab: case QEMU_OPTION_no_quit: case QEMU_OPTION_sdl: fprintf(stderr, "SDL support is disabled\n"); exit(1); #endif case QEMU_OPTION_pidfile: pid_file = optarg; break; case QEMU_OPTION_win2k_hack: win2k_install_hack = 1; break; case QEMU_OPTION_rtc_td_hack: rtc_td_hack = 1; break; case QEMU_OPTION_acpitable: do_acpitable_option(optarg); break; case QEMU_OPTION_smbios: do_smbios_option(optarg); break; case QEMU_OPTION_enable_kvm: olist = qemu_find_opts("machine"); qemu_opts_reset(olist); qemu_opts_parse(olist, "accel=kvm", 0); break; case QEMU_OPTION_machine: olist = qemu_find_opts("machine"); qemu_opts_reset(olist); opts = qemu_opts_parse(olist, optarg, 1); if (!opts) { fprintf(stderr, "parse error: %s\n", optarg); exit(1); } optarg = qemu_opt_get(opts, "type"); if (optarg) { machine = machine_parse(optarg); } break; case QEMU_OPTION_usb: usb_enabled = 1; break; case QEMU_OPTION_usbdevice: usb_enabled = 1; add_device_config(DEV_USB, optarg); break; case QEMU_OPTION_device: if (!qemu_opts_parse(qemu_find_opts("device"), optarg, 1)) { exit(1); } break; case QEMU_OPTION_smp: smp_parse(optarg); if (smp_cpus < 1) { fprintf(stderr, "Invalid number of CPUs\n"); exit(1); } if (max_cpus < smp_cpus) { fprintf(stderr, "maxcpus must be equal to or greater than " "smp\n"); exit(1); } if (max_cpus > 255) { fprintf(stderr, "Unsupported number of maxcpus\n"); exit(1); } break; case QEMU_OPTION_vnc: #ifdef CONFIG_VNC display_remote++; vnc_display = optarg; #else fprintf(stderr, "VNC support is disabled\n"); exit(1); #endif break; case QEMU_OPTION_no_acpi: acpi_enabled = 0; break; case QEMU_OPTION_no_hpet: no_hpet = 1; break; case QEMU_OPTION_balloon: if (balloon_parse(optarg) < 0) { fprintf(stderr, "Unknown -balloon argument %s\n", optarg); exit(1); } break; case QEMU_OPTION_no_reboot: no_reboot = 1; break; case QEMU_OPTION_no_shutdown: no_shutdown = 1; break; case QEMU_OPTION_show_cursor: cursor_hide = 0; break; case QEMU_OPTION_uuid: if(qemu_uuid_parse(optarg, qemu_uuid) < 0) { fprintf(stderr, "Fail to parse UUID string." " Wrong format.\n"); exit(1); } break; case QEMU_OPTION_option_rom: if (nb_option_roms >= MAX_OPTION_ROMS) { fprintf(stderr, "Too many option ROMs\n"); exit(1); } opts = qemu_opts_parse(qemu_find_opts("option-rom"), optarg, 1); option_rom[nb_option_roms].name = qemu_opt_get(opts, "romfile"); option_rom[nb_option_roms].bootindex = qemu_opt_get_number(opts, "bootindex", -1); if (!option_rom[nb_option_roms].name) { fprintf(stderr, "Option ROM file is not specified\n"); exit(1); } nb_option_roms++; break; case QEMU_OPTION_semihosting: semihosting_enabled = 1; break; case QEMU_OPTION_name: qemu_name = g_strdup(optarg); { char *p = strchr(qemu_name, ','); if (p != NULL) { *p++ = 0; if (strncmp(p, "process=", 8)) { fprintf(stderr, "Unknown subargument %s to -name\n", p); exit(1); } p += 8; os_set_proc_name(p); } } break; case QEMU_OPTION_prom_env: if (nb_prom_envs >= MAX_PROM_ENVS) { fprintf(stderr, "Too many prom variables\n"); exit(1); } prom_envs[nb_prom_envs] = optarg; nb_prom_envs++; break; case QEMU_OPTION_old_param: old_param = 1; break; case QEMU_OPTION_clock: configure_alarms(optarg); break; case QEMU_OPTION_startdate: configure_rtc_date_offset(optarg, 1); break; case QEMU_OPTION_rtc: opts = qemu_opts_parse(qemu_find_opts("rtc"), optarg, 0); if (!opts) { exit(1); } configure_rtc(opts); break; case QEMU_OPTION_tb_size: tcg_tb_size = strtol(optarg, NULL, 0); if (tcg_tb_size < 0) { tcg_tb_size = 0; } break; case QEMU_OPTION_icount: icount_option = optarg; break; case QEMU_OPTION_incoming: incoming = optarg; break; case QEMU_OPTION_nodefaults: default_serial = 0; default_parallel = 0; default_virtcon = 0; default_monitor = 0; default_vga = 0; default_net = 0; default_floppy = 0; default_cdrom = 0; default_sdcard = 0; break; case QEMU_OPTION_xen_domid: if (!(xen_available())) { printf("Option %s not supported for this target\n", popt->name); exit(1); } xen_domid = atoi(optarg); break; case QEMU_OPTION_xen_create: if (!(xen_available())) { printf("Option %s not supported for this target\n", popt->name); exit(1); } xen_mode = XEN_CREATE; break; case QEMU_OPTION_xen_attach: if (!(xen_available())) { printf("Option %s not supported for this target\n", popt->name); exit(1); } xen_mode = XEN_ATTACH; break; case QEMU_OPTION_trace: { opts = qemu_opts_parse(qemu_find_opts("trace"), optarg, 0); if (!opts) { exit(1); } trace_events = qemu_opt_get(opts, "events"); trace_file = qemu_opt_get(opts, "file"); break; } case QEMU_OPTION_readconfig: { int ret = qemu_read_config_file(optarg); if (ret < 0) { fprintf(stderr, "read config %s: %s\n", optarg, strerror(-ret)); exit(1); } break; } case QEMU_OPTION_spice: olist = qemu_find_opts("spice"); if (!olist) { fprintf(stderr, "spice is not supported by this qemu build.\n"); exit(1); } opts = qemu_opts_parse(olist, optarg, 0); if (!opts) { fprintf(stderr, "parse error: %s\n", optarg); exit(1); } break; case QEMU_OPTION_writeconfig: { FILE *fp; if (strcmp(optarg, "-") == 0) { fp = stdout; } else { fp = fopen(optarg, "w"); if (fp == NULL) { fprintf(stderr, "open %s: %s\n", optarg, strerror(errno)); exit(1); } } qemu_config_write(fp); fclose(fp); break; } default: os_parse_cmd_args(popt->index, optarg); } } } loc_set_none(); /* Open the logfile at this point, if necessary. We can't open the logfile * when encountering either of the logging options (-d or -D) because the * other one may be encountered later on the command line, changing the * location or level of logging. */ if (log_mask) { if (log_file) { set_cpu_log_filename(log_file); } set_cpu_log(log_mask); } if (!trace_backend_init(trace_events, trace_file)) { exit(1); } /* If no data_dir is specified then try to find it relative to the executable path. */ if (!data_dir) { data_dir = os_find_datadir(argv[0]); } /* If all else fails use the install path specified when building. */ if (!data_dir) { data_dir = CONFIG_QEMU_DATADIR; } if (machine == NULL) { fprintf(stderr, "No machine found.\n"); exit(1); } /* * Default to max_cpus = smp_cpus, in case the user doesn't * specify a max_cpus value. */ if (!max_cpus) max_cpus = smp_cpus; machine->max_cpus = machine->max_cpus ?: 1; /* Default to UP */ if (smp_cpus > machine->max_cpus) { fprintf(stderr, "Number of SMP cpus requested (%d), exceeds max cpus " "supported by machine `%s' (%d)\n", smp_cpus, machine->name, machine->max_cpus); exit(1); } /* * Get the default machine options from the machine if it is not already * specified either by the configuration file or by the command line. */ if (machine->default_machine_opts) { QemuOptsList *list = qemu_find_opts("machine"); const char *p = NULL; if (!QTAILQ_EMPTY(&list->head)) { p = qemu_opt_get(QTAILQ_FIRST(&list->head), "accel"); } if (p == NULL) { qemu_opts_reset(list); opts = qemu_opts_parse(list, machine->default_machine_opts, 0); if (!opts) { fprintf(stderr, "parse error for machine %s: %s\n", machine->name, machine->default_machine_opts); exit(1); } } } qemu_opts_foreach(qemu_find_opts("device"), default_driver_check, NULL, 0); qemu_opts_foreach(qemu_find_opts("global"), default_driver_check, NULL, 0); if (machine->no_serial) { default_serial = 0; } if (machine->no_parallel) { default_parallel = 0; } if (!machine->use_virtcon) { default_virtcon = 0; } if (machine->no_vga) { default_vga = 0; } if (machine->no_floppy) { default_floppy = 0; } if (machine->no_cdrom) { default_cdrom = 0; } if (machine->no_sdcard) { default_sdcard = 0; } if (display_type == DT_NOGRAPHIC) { if (default_parallel) add_device_config(DEV_PARALLEL, "null"); if (default_serial && default_monitor) { add_device_config(DEV_SERIAL, "mon:stdio"); } else if (default_virtcon && default_monitor) { add_device_config(DEV_VIRTCON, "mon:stdio"); } else { if (default_serial) add_device_config(DEV_SERIAL, "stdio"); if (default_virtcon) add_device_config(DEV_VIRTCON, "stdio"); if (default_monitor) monitor_parse("stdio", "readline"); } } else { if (default_serial) add_device_config(DEV_SERIAL, "vc:80Cx24C"); if (default_parallel) add_device_config(DEV_PARALLEL, "vc:80Cx24C"); if (default_monitor) monitor_parse("vc:80Cx24C", "readline"); if (default_virtcon) add_device_config(DEV_VIRTCON, "vc:80Cx24C"); } if (default_vga) vga_interface_type = VGA_CIRRUS; socket_init(); if (qemu_opts_foreach(qemu_find_opts("chardev"), chardev_init_func, NULL, 1) != 0) exit(1); #ifdef CONFIG_VIRTFS if (qemu_opts_foreach(qemu_find_opts("fsdev"), fsdev_init_func, NULL, 1) != 0) { exit(1); } #endif os_daemonize(); if (pid_file && qemu_create_pidfile(pid_file) != 0) { os_pidfile_error(); exit(1); } /* init the memory */ if (ram_size == 0) { ram_size = DEFAULT_RAM_SIZE * 1024 * 1024; } configure_accelerator(); qemu_init_cpu_loop(); if (qemu_init_main_loop()) { fprintf(stderr, "qemu_init_main_loop failed\n"); exit(1); } linux_boot = (kernel_filename != NULL); if (!linux_boot && *kernel_cmdline != '\0') { fprintf(stderr, "-append only allowed with -kernel option\n"); exit(1); } if (!linux_boot && initrd_filename != NULL) { fprintf(stderr, "-initrd only allowed with -kernel option\n"); exit(1); } os_set_line_buffering(); if (init_timer_alarm() < 0) { fprintf(stderr, "could not initialize alarm timer\n"); exit(1); } if (icount_option && (kvm_enabled() || xen_enabled())) { fprintf(stderr, "-icount is not allowed with kvm or xen\n"); exit(1); } configure_icount(icount_option); if (net_init_clients() < 0) { exit(1); } /* init the bluetooth world */ if (foreach_device_config(DEV_BT, bt_parse)) exit(1); if (!xen_enabled()) { /* On 32-bit hosts, QEMU is limited by virtual address space */ if (ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { fprintf(stderr, "qemu: at most 2047 MB RAM can be simulated\n"); exit(1); } } cpu_exec_init_all(); bdrv_init_with_whitelist(); blk_mig_init(); /* open the virtual block devices */ if (snapshot) qemu_opts_foreach(qemu_find_opts("drive"), drive_enable_snapshot, NULL, 0); if (qemu_opts_foreach(qemu_find_opts("drive"), drive_init_func, &machine->use_scsi, 1) != 0) exit(1); default_drive(default_cdrom, snapshot, machine->use_scsi, IF_DEFAULT, 2, CDROM_OPTS); default_drive(default_floppy, snapshot, machine->use_scsi, IF_FLOPPY, 0, FD_OPTS); default_drive(default_sdcard, snapshot, machine->use_scsi, IF_SD, 0, SD_OPTS); register_savevm_live(NULL, "ram", 0, 4, NULL, ram_save_live, NULL, ram_load, NULL); if (nb_numa_nodes > 0) { int i; if (nb_numa_nodes > MAX_NODES) { nb_numa_nodes = MAX_NODES; } /* If no memory size if given for any node, assume the default case * and distribute the available memory equally across all nodes */ for (i = 0; i < nb_numa_nodes; i++) { if (node_mem[i] != 0) break; } if (i == nb_numa_nodes) { uint64_t usedmem = 0; /* On Linux, the each node's border has to be 8MB aligned, * the final node gets the rest. */ for (i = 0; i < nb_numa_nodes - 1; i++) { node_mem[i] = (ram_size / nb_numa_nodes) & ~((1 << 23UL) - 1); usedmem += node_mem[i]; } node_mem[i] = ram_size - usedmem; } for (i = 0; i < nb_numa_nodes; i++) { if (node_cpumask[i] != 0) break; } /* assigning the VCPUs round-robin is easier to implement, guest OSes * must cope with this anyway, because there are BIOSes out there in * real machines which also use this scheme. */ if (i == nb_numa_nodes) { for (i = 0; i < max_cpus; i++) { node_cpumask[i % nb_numa_nodes] |= 1 << i; } } } if (qemu_opts_foreach(qemu_find_opts("mon"), mon_init_func, NULL, 1) != 0) { exit(1); } if (foreach_device_config(DEV_SERIAL, serial_parse) < 0) exit(1); if (foreach_device_config(DEV_PARALLEL, parallel_parse) < 0) exit(1); if (foreach_device_config(DEV_VIRTCON, virtcon_parse) < 0) exit(1); if (foreach_device_config(DEV_DEBUGCON, debugcon_parse) < 0) exit(1); module_call_init(MODULE_INIT_DEVICE); if (qemu_opts_foreach(qemu_find_opts("device"), device_help_func, NULL, 0) != 0) exit(0); if (watchdog) { i = select_watchdog(watchdog); if (i > 0) exit (i == 1 ? 1 : 0); } if (machine->compat_props) { qdev_prop_register_global_list(machine->compat_props); } qemu_add_globals(); qdev_machine_init(); machine->init(ram_size, boot_devices, kernel_filename, kernel_cmdline, initrd_filename, cpu_model); cpu_synchronize_all_post_init(); set_numa_modes(); current_machine = machine; /* init USB devices */ if (usb_enabled) { if (foreach_device_config(DEV_USB, usb_parse) < 0) exit(1); } /* init generic devices */ if (qemu_opts_foreach(qemu_find_opts("device"), device_init_func, NULL, 1) != 0) exit(1); net_check_clients(); /* just use the first displaystate for the moment */ ds = get_displaystate(); if (using_spice) display_remote++; if (display_type == DT_DEFAULT && !display_remote) { #if defined(CONFIG_SDL) || defined(CONFIG_COCOA) display_type = DT_SDL; #elif defined(CONFIG_VNC) vnc_display = "localhost:0,to=99"; show_vnc_port = 1; #else display_type = DT_NONE; #endif } /* init local displays */ switch (display_type) { case DT_NOGRAPHIC: break; #if defined(CONFIG_CURSES) case DT_CURSES: curses_display_init(ds, full_screen); break; #endif #if defined(CONFIG_SDL) case DT_SDL: sdl_display_init(ds, full_screen, no_frame); break; #elif defined(CONFIG_COCOA) case DT_SDL: cocoa_display_init(ds, full_screen); break; #endif default: break; } /* must be after terminal init, SDL library changes signal handlers */ os_setup_signal_handling(); #ifdef CONFIG_VNC /* init remote displays */ if (vnc_display) { vnc_display_init(ds); if (vnc_display_open(ds, vnc_display) < 0) exit(1); if (show_vnc_port) { printf("VNC server running on `%s'\n", vnc_display_local_addr(ds)); } } #endif #ifdef CONFIG_SPICE if (using_spice && !qxl_enabled) { qemu_spice_display_init(ds); } #endif /* display setup */ dpy_resize(ds); dcl = ds->listeners; while (dcl != NULL) { if (dcl->dpy_refresh != NULL) { ds->gui_timer = qemu_new_timer_ms(rt_clock, gui_update, ds); qemu_mod_timer(ds->gui_timer, qemu_get_clock_ms(rt_clock)); break; } dcl = dcl->next; } text_consoles_set_display(ds); if (gdbstub_dev && gdbserver_start(gdbstub_dev) < 0) { fprintf(stderr, "qemu: could not open gdbserver on device '%s'\n", gdbstub_dev); exit(1); } qdev_machine_creation_done(); if (rom_load_all() != 0) { fprintf(stderr, "rom loading failed\n"); exit(1); } /* TODO: once all bus devices are qdevified, this should be done * when bus is created by qdev.c */ qemu_register_reset(qbus_reset_all_fn, sysbus_get_default()); qemu_run_machine_init_done_notifiers(); qemu_system_reset(VMRESET_SILENT); if (loadvm) { if (load_vmstate(loadvm) < 0) { autostart = 0; } } if (incoming) { runstate_set(RUN_STATE_INMIGRATE); int ret = qemu_start_incoming_migration(incoming); if (ret < 0) { fprintf(stderr, "Migration failed. Exit code %s(%d), exiting.\n", incoming, ret); exit(ret); } } else if (autostart) { vm_start(); } os_setup_post(); resume_all_vcpus(); main_loop(); bdrv_close_all(); pause_all_vcpus(); net_cleanup(); res_free(); return 0; }


static int tcp_read(URLContext *h, uint8_t *buf, int size) { TCPContext *s = h->priv_data; int size1, len, fd_max; fd_set rfds; struct timeval tv; size1 = size; while (size > 0) { if (url_interrupt_cb()) return -EINTR; fd_max = s->fd; FD_ZERO(&rfds); FD_SET(s->fd, &rfds); tv.tv_sec = 0; tv.tv_usec = 100 * 1000; select(fd_max + 1, &rfds, NULL, NULL, &tv); #ifdef __BEOS__ len = recv(s->fd, buf, size, 0); #else len = read(s->fd, buf, size); #endif if (len < 0) { if (errno != EINTR && errno != EAGAIN) #ifdef __BEOS__ return errno; #else return -errno; #endif else continue; } else if (len == 0) { break; } size -= len; buf += len; } return size1 - size; }


static int hda_codec_dev_exit(DeviceState *qdev) { HDACodecDevice *dev = HDA_CODEC_DEVICE(qdev); HDACodecDeviceClass *cdc = HDA_CODEC_DEVICE_GET_CLASS(dev); if (cdc->exit) { cdc->exit(dev); } return 0; }


static bool virtqueue_map_desc(VirtIODevice *vdev, unsigned int *p_num_sg, hwaddr *addr, struct iovec *iov, unsigned int max_num_sg, bool is_write, hwaddr pa, size_t sz) { bool ok = false; unsigned num_sg = *p_num_sg; assert(num_sg <= max_num_sg); if (!sz) { virtio_error(vdev, "virtio: zero sized buffers are not allowed"); goto out; } while (sz) { hwaddr len = sz; if (num_sg == max_num_sg) { virtio_error(vdev, "virtio: too many write descriptors in " "indirect table"); goto out; } iov[num_sg].iov_base = cpu_physical_memory_map(pa, &len, is_write); if (!iov[num_sg].iov_base) { virtio_error(vdev, "virtio: bogus descriptor or out of resources"); goto out; } iov[num_sg].iov_len = len; addr[num_sg] = pa; sz -= len; pa += len; num_sg++; } ok = true; out: *p_num_sg = num_sg; return ok; }


void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out) { ISAKBDState *isa = I8042(dev); KBDState *s = &isa->kbd; s->a20_out = a20_out; }


static int swf_read_header(AVFormatContext *s, AVFormatParameters *ap) { SWFContext *swf = 0; ByteIOContext *pb = &s->pb; int nbits, len, frame_rate, tag, v; offset_t firstTagOff; AVStream *ast = 0; AVStream *vst = 0; swf = av_malloc(sizeof(SWFContext)); if (!swf) return -1; s->priv_data = swf; tag = get_be32(pb) & 0xffffff00; if (tag == MKBETAG('C', 'W', 'S', 0)) { av_log(s, AV_LOG_ERROR, "Compressed SWF format not supported\n"); return AVERROR_IO; } if (tag != MKBETAG('F', 'W', 'S', 0)) return AVERROR_IO; get_le32(pb); /* skip rectangle size */ nbits = get_byte(pb) >> 3; len = (4 * nbits - 3 + 7) / 8; url_fskip(pb, len); frame_rate = get_le16(pb); get_le16(pb); /* frame count */ /* The Flash Player converts 8.8 frame rates to milliseconds internally. Do the same to get a correct framerate */ swf->ms_per_frame = ( 1000 * 256 ) / frame_rate; swf->samples_per_frame = 0; swf->ch_id = -1; firstTagOff = url_ftell(pb); for(;;) { tag = get_swf_tag(pb, &len); if (tag < 0) { if ( ast || vst ) { if ( vst && ast ) { vst->codec->time_base.den = ast->codec->sample_rate / swf->samples_per_frame; vst->codec->time_base.num = 1; } break; } av_log(s, AV_LOG_ERROR, "No media found in SWF\n"); return AVERROR_IO; } if ( tag == TAG_VIDEOSTREAM && !vst) { int codec_id; swf->ch_id = get_le16(pb); get_le16(pb); get_le16(pb); get_le16(pb); get_byte(pb); /* Check for FLV1 */ codec_id = codec_get_id(swf_codec_tags, get_byte(pb)); if ( codec_id ) { vst = av_new_stream(s, 0); av_set_pts_info(vst, 24, 1, 1000); /* 24 bit pts in ms */ vst->codec->codec_type = CODEC_TYPE_VIDEO; vst->codec->codec_id = codec_id; if ( swf->samples_per_frame ) { vst->codec->time_base.den = 1000. / swf->ms_per_frame; vst->codec->time_base.num = 1; } } } else if ( ( tag == TAG_STREAMHEAD || tag == TAG_STREAMHEAD2 ) && !ast) { /* streaming found */ get_byte(pb); v = get_byte(pb); swf->samples_per_frame = get_le16(pb); if (len!=4) url_fskip(pb,len-4); /* if mp3 streaming found, OK */ if ((v & 0x20) != 0) { if ( tag == TAG_STREAMHEAD2 ) { get_le16(pb); } ast = av_new_stream(s, 1); av_set_pts_info(ast, 24, 1, 1000); /* 24 bit pts in ms */ if (!ast) return -ENOMEM; if (v & 0x01) ast->codec->channels = 2; else ast->codec->channels = 1; switch((v>> 2) & 0x03) { case 1: ast->codec->sample_rate = 11025; break; case 2: ast->codec->sample_rate = 22050; break; case 3: ast->codec->sample_rate = 44100; break; default: av_free(ast); return AVERROR_IO; } ast->codec->codec_type = CODEC_TYPE_AUDIO; ast->codec->codec_id = CODEC_ID_MP3; } } else { url_fskip(pb, len); } } url_fseek(pb, firstTagOff, SEEK_SET); return 0; }


void ff_weight_h264_pixels16_8_msa(uint8_t *src, int stride, int height, int log2_denom, int weight_src, int offset) { avc_wgt_16width_msa(src, stride, height, log2_denom, weight_src, offset); }


static int decode_dvd_subtitles(DVDSubContext *ctx, AVSubtitle *sub_header, const uint8_t *buf, int buf_size) { int cmd_pos, pos, cmd, x1, y1, x2, y2, offset1, offset2, next_cmd_pos; int big_offsets, offset_size, is_8bit = 0; const uint8_t *yuv_palette = 0; uint8_t colormap[4] = { 0 }, alpha[256] = { 0 }; int date; int i; int is_menu = 0; if (buf_size < 10) return -1; memset(sub_header, 0, sizeof(*sub_header)); if (AV_RB16(buf) == 0) { /* HD subpicture with 4-byte offsets */ big_offsets = 1; offset_size = 4; cmd_pos = 6; } else { big_offsets = 0; offset_size = 2; cmd_pos = 2; } cmd_pos = READ_OFFSET(buf + cmd_pos); while (cmd_pos > 0 && cmd_pos < buf_size - 2 - offset_size) { date = AV_RB16(buf + cmd_pos); next_cmd_pos = READ_OFFSET(buf + cmd_pos + 2); av_dlog(NULL, "cmd_pos=0x%04x next=0x%04x date=%d\n", cmd_pos, next_cmd_pos, date); pos = cmd_pos + 2 + offset_size; offset1 = -1; offset2 = -1; x1 = y1 = x2 = y2 = 0; while (pos < buf_size) { cmd = buf[pos++]; av_dlog(NULL, "cmd=%02x\n", cmd); switch(cmd) { case 0x00: /* menu subpicture */ is_menu = 1; break; case 0x01: /* set start date */ sub_header->start_display_time = (date << 10) / 90; break; case 0x02: /* set end date */ sub_header->end_display_time = (date << 10) / 90; break; case 0x03: /* set colormap */ if ((buf_size - pos) < 2) goto fail; colormap[3] = buf[pos] >> 4; colormap[2] = buf[pos] & 0x0f; colormap[1] = buf[pos + 1] >> 4; colormap[0] = buf[pos + 1] & 0x0f; pos += 2; break; case 0x04: /* set alpha */ if ((buf_size - pos) < 2) goto fail; alpha[3] = buf[pos] >> 4; alpha[2] = buf[pos] & 0x0f; alpha[1] = buf[pos + 1] >> 4; alpha[0] = buf[pos + 1] & 0x0f; pos += 2; av_dlog(NULL, "alpha=%x%x%x%x\n", alpha[0],alpha[1],alpha[2],alpha[3]); break; case 0x05: case 0x85: if ((buf_size - pos) < 6) goto fail; x1 = (buf[pos] << 4) | (buf[pos + 1] >> 4); x2 = ((buf[pos + 1] & 0x0f) << 8) | buf[pos + 2]; y1 = (buf[pos + 3] << 4) | (buf[pos + 4] >> 4); y2 = ((buf[pos + 4] & 0x0f) << 8) | buf[pos + 5]; if (cmd & 0x80) is_8bit = 1; av_dlog(NULL, "x1=%d x2=%d y1=%d y2=%d\n", x1, x2, y1, y2); pos += 6; break; case 0x06: if ((buf_size - pos) < 4) goto fail; offset1 = AV_RB16(buf + pos); offset2 = AV_RB16(buf + pos + 2); av_dlog(NULL, "offset1=0x%04x offset2=0x%04x\n", offset1, offset2); pos += 4; break; case 0x86: if ((buf_size - pos) < 8) goto fail; offset1 = AV_RB32(buf + pos); offset2 = AV_RB32(buf + pos + 4); av_dlog(NULL, "offset1=0x%04x offset2=0x%04x\n", offset1, offset2); pos += 8; break; case 0x83: /* HD set palette */ if ((buf_size - pos) < 768) goto fail; yuv_palette = buf + pos; pos += 768; break; case 0x84: /* HD set contrast (alpha) */ if ((buf_size - pos) < 256) goto fail; for (i = 0; i < 256; i++) alpha[i] = 0xFF - buf[pos+i]; pos += 256; break; case 0xff: goto the_end; default: av_dlog(NULL, "unrecognised subpicture command 0x%x\n", cmd); goto the_end; } } the_end: if (offset1 >= 0) { int w, h; uint8_t *bitmap; /* decode the bitmap */ w = x2 - x1 + 1; if (w < 0) w = 0; h = y2 - y1; if (h < 0) h = 0; if (w > 0 && h > 0) { if (sub_header->rects != NULL) { for (i = 0; i < sub_header->num_rects; i++) { av_freep(&sub_header->rects[i]->pict.data[0]); av_freep(&sub_header->rects[i]->pict.data[1]); av_freep(&sub_header->rects[i]); } av_freep(&sub_header->rects); sub_header->num_rects = 0; } bitmap = av_malloc(w * h); sub_header->rects = av_mallocz(sizeof(*sub_header->rects)); sub_header->rects[0] = av_mallocz(sizeof(AVSubtitleRect)); sub_header->num_rects = 1; sub_header->rects[0]->pict.data[0] = bitmap; decode_rle(bitmap, w * 2, w, (h + 1) / 2, buf, offset1, buf_size, is_8bit); decode_rle(bitmap + w, w * 2, w, h / 2, buf, offset2, buf_size, is_8bit); sub_header->rects[0]->pict.data[1] = av_mallocz(AVPALETTE_SIZE); if (is_8bit) { if (yuv_palette == 0) goto fail; sub_header->rects[0]->nb_colors = 256; yuv_a_to_rgba(yuv_palette, alpha, (uint32_t*)sub_header->rects[0]->pict.data[1], 256); } else { sub_header->rects[0]->nb_colors = 4; guess_palette(ctx, (uint32_t*)sub_header->rects[0]->pict.data[1], colormap, alpha, 0xffff00); } sub_header->rects[0]->x = x1; sub_header->rects[0]->y = y1; sub_header->rects[0]->w = w; sub_header->rects[0]->h = h; sub_header->rects[0]->type = SUBTITLE_BITMAP; sub_header->rects[0]->pict.linesize[0] = w; } } if (next_cmd_pos == cmd_pos) break; cmd_pos = next_cmd_pos; } if (sub_header->num_rects > 0) return is_menu; fail: if (sub_header->rects != NULL) { for (i = 0; i < sub_header->num_rects; i++) { av_freep(&sub_header->rects[i]->pict.data[0]); av_freep(&sub_header->rects[i]->pict.data[1]); av_freep(&sub_header->rects[i]); } av_freep(&sub_header->rects); sub_header->num_rects = 0; } return -1; }


static int format_name(char *buf, int buf_len, int index) { const char *proto, *dir; char *orig_buf_dup = NULL, *mod_buf_dup = NULL; int ret = 0; if (!av_stristr(buf, "%v")) return ret; orig_buf_dup = av_strdup(buf); if (!orig_buf_dup) { ret = AVERROR(ENOMEM); goto fail; } if (replace_int_data_in_filename(buf, buf_len, orig_buf_dup, 'v', index) < 1) { ret = AVERROR(EINVAL); goto fail; } proto = avio_find_protocol_name(orig_buf_dup); dir = av_dirname(orig_buf_dup); /* if %v is present in the file's directory, create sub-directory */ if (av_stristr(dir, "%v") && proto && !strcmp(proto, "file")) { mod_buf_dup = av_strdup(buf); if (!mod_buf_dup) { ret = AVERROR(ENOMEM); goto fail; } dir = av_dirname(mod_buf_dup); if (mkdir_p(dir) == -1 && errno != EEXIST) { ret = AVERROR(errno); goto fail; } } fail: av_freep(&orig_buf_dup); av_freep(&mod_buf_dup); return ret; }


void cpu_reset(CPUSPARCState *env) { if (qemu_loglevel_mask(CPU_LOG_RESET)) { qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); log_cpu_state(env, 0); } tlb_flush(env, 1); env->cwp = 0; #ifndef TARGET_SPARC64 env->wim = 1; #endif env->regwptr = env->regbase + (env->cwp * 16); #if defined(CONFIG_USER_ONLY) #ifdef TARGET_SPARC64 env->cleanwin = env->nwindows - 2; env->cansave = env->nwindows - 2; env->pstate = PS_RMO | PS_PEF | PS_IE; env->asi = 0x82; // Primary no-fault #endif #else #if !defined(TARGET_SPARC64) env->psret = 0; #endif env->psrs = 1; env->psrps = 1; CC_OP = CC_OP_FLAGS; #ifdef TARGET_SPARC64 env->pstate = PS_PRIV; env->hpstate = HS_PRIV; env->tsptr = &env->ts[env->tl & MAXTL_MASK]; env->lsu = 0; #else env->mmuregs[0] &= ~(MMU_E | MMU_NF); env->mmuregs[0] |= env->def->mmu_bm; #endif env->pc = 0; env->npc = env->pc + 4; #endif }


net_rx_pkt_pull_data(struct NetRxPkt *pkt, const struct iovec *iov, int iovcnt, size_t ploff) { if (pkt->vlan_stripped) { net_rx_pkt_iovec_realloc(pkt, iovcnt + 1); pkt->vec[0].iov_base = pkt->ehdr_buf; pkt->vec[0].iov_len = sizeof(pkt->ehdr_buf); pkt->tot_len = iov_size(iov, iovcnt) - ploff + sizeof(struct eth_header); pkt->vec_len = iov_copy(pkt->vec + 1, pkt->vec_len_total - 1, iov, iovcnt, ploff, pkt->tot_len); } else { net_rx_pkt_iovec_realloc(pkt, iovcnt); pkt->tot_len = iov_size(iov, iovcnt) - ploff; pkt->vec_len = iov_copy(pkt->vec, pkt->vec_len_total, iov, iovcnt, ploff, pkt->tot_len); } eth_get_protocols(pkt->vec, pkt->vec_len, &pkt->isip4, &pkt->isip6, &pkt->isudp, &pkt->istcp, &pkt->l3hdr_off, &pkt->l4hdr_off, &pkt->l5hdr_off, &pkt->ip6hdr_info, &pkt->ip4hdr_info, &pkt->l4hdr_info); trace_net_rx_pkt_parsed(pkt->isip4, pkt->isip6, pkt->isudp, pkt->istcp, pkt->l3hdr_off, pkt->l4hdr_off, pkt->l5hdr_off); }


MigrationState *tcp_start_outgoing_migration(Monitor *mon, const char *host_port, int64_t bandwidth_limit, int detach, int blk, int inc) { struct sockaddr_in addr; FdMigrationState *s; int ret; if (parse_host_port(&addr, host_port) < 0) return NULL; s = qemu_mallocz(sizeof(*s)); s->get_error = socket_errno; s->write = socket_write; s->close = tcp_close; s->mig_state.cancel = migrate_fd_cancel; s->mig_state.get_status = migrate_fd_get_status; s->mig_state.release = migrate_fd_release; s->mig_state.blk = blk; s->mig_state.shared = inc; s->state = MIG_STATE_ACTIVE; s->mon = NULL; s->bandwidth_limit = bandwidth_limit; s->fd = socket(PF_INET, SOCK_STREAM, 0); if (s->fd == -1) { qemu_free(s); return NULL; } socket_set_nonblock(s->fd); if (!detach) { migrate_fd_monitor_suspend(s, mon); } do { ret = connect(s->fd, (struct sockaddr *)&addr, sizeof(addr)); if (ret == -1) ret = -(s->get_error(s)); if (ret == -EINPROGRESS || ret == -EWOULDBLOCK) qemu_set_fd_handler2(s->fd, NULL, NULL, tcp_wait_for_connect, s); } while (ret == -EINTR); if (ret < 0 && ret != -EINPROGRESS && ret != -EWOULDBLOCK) { dprintf("connect failed\n"); close(s->fd); qemu_free(s); return NULL; } else if (ret >= 0) migrate_fd_connect(s); return &s->mig_state; }


int main_loop(void *opaque) { struct pollfd ufds[2], *pf, *serial_ufd, *net_ufd, *gdb_ufd; int ret, n, timeout; uint8_t ch; CPUState *env = global_env; if (!term_inited) { /* initialize terminal only there so that the user has a chance to stop QEMU with Ctrl-C before the gdb connection is launched */ term_inited = 1; term_init(); } for(;;) { ret = cpu_x86_exec(env); if (reset_requested) break; if (ret == EXCP_DEBUG) return EXCP_DEBUG; /* if hlt instruction, we wait until the next IRQ */ if (ret == EXCP_HLT) timeout = 10; else timeout = 0; /* poll any events */ serial_ufd = NULL; pf = ufds; if (!(serial_ports[0].lsr & UART_LSR_DR)) { serial_ufd = pf; pf->fd = 0; pf->events = POLLIN; pf++; } net_ufd = NULL; if (net_fd > 0 && ne2000_can_receive(&ne2000_state)) { net_ufd = pf; pf->fd = net_fd; pf->events = POLLIN; pf++; } gdb_ufd = NULL; if (gdbstub_fd > 0) { gdb_ufd = pf; pf->fd = gdbstub_fd; pf->events = POLLIN; pf++; } ret = poll(ufds, pf - ufds, timeout); if (ret > 0) { if (serial_ufd && (serial_ufd->revents & POLLIN)) { n = read(0, &ch, 1); if (n == 1) { serial_received_byte(&serial_ports[0], ch); } } if (net_ufd && (net_ufd->revents & POLLIN)) { uint8_t buf[MAX_ETH_FRAME_SIZE]; n = read(net_fd, buf, MAX_ETH_FRAME_SIZE); if (n > 0) { if (n < 60) { memset(buf + n, 0, 60 - n); n = 60; } ne2000_receive(&ne2000_state, buf, n); } } if (gdb_ufd && (gdb_ufd->revents & POLLIN)) { uint8_t buf[1]; /* stop emulation if requested by gdb */ n = read(gdbstub_fd, buf, 1); if (n == 1) break; } } /* timer IRQ */ if (timer_irq_pending) { pic_set_irq(0, 1); pic_set_irq(0, 0); timer_irq_pending = 0; } /* VGA */ if (gui_refresh_pending) { display_state.dpy_refresh(&display_state); gui_refresh_pending = 0; } } return EXCP_INTERRUPT; }


static int ehci_state_executing(EHCIQueue *q) { EHCIPacket *p = QTAILQ_FIRST(&q->packets); assert(p != NULL); assert(p->qtdaddr == q->qtdaddr); ehci_execute_complete(q); // 4.10.3 if (!q->async) { int transactCtr = get_field(q->qh.epcap, QH_EPCAP_MULT); transactCtr--; set_field(&q->qh.epcap, transactCtr, QH_EPCAP_MULT); // 4.10.3, bottom of page 82, should exit this state when transaction // counter decrements to 0 } /* 4.10.5 */ if (p->usb_status == USB_RET_NAK) { ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH); } else { ehci_set_state(q->ehci, q->async, EST_WRITEBACK); } ehci_flush_qh(q); return 1; }


static int decode(MimicContext *ctx, int quality, int num_coeffs, int is_iframe) { int y, x, plane, cur_row = 0; for(plane = 0; plane < 3; plane++) { const int is_chroma = !!plane; const int qscale = av_clip(10000-quality,is_chroma?1000:2000,10000)<<2; const int stride = ctx->flipped_ptrs[ctx->cur_index].linesize[plane]; const uint8_t *src = ctx->flipped_ptrs[ctx->prev_index].data[plane]; uint8_t *dst = ctx->flipped_ptrs[ctx->cur_index ].data[plane]; for(y = 0; y < ctx->num_vblocks[plane]; y++) { for(x = 0; x < ctx->num_hblocks[plane]; x++) { /* Check for a change condition in the current block. * - iframes always change. * - Luma plane changes on get_bits1 == 0 * - Chroma planes change on get_bits1 == 1 */ if(is_iframe || get_bits1(&ctx->gb) == is_chroma) { /* Luma planes may use a backreference from the 15 last * frames preceding the previous. (get_bits1 == 1) * Chroma planes don't use backreferences. */ if(is_chroma || is_iframe || !get_bits1(&ctx->gb)) { if(!vlc_decode_block(ctx, num_coeffs, qscale)) return 0; ctx->dsp.idct_put(dst, stride, ctx->dct_block); } else { unsigned int backref = get_bits(&ctx->gb, 4); int index = (ctx->cur_index+backref)&15; uint8_t *p = ctx->flipped_ptrs[index].data[0]; ff_thread_await_progress(&ctx->buf_ptrs[index], cur_row, 0); if(p) { p += src - ctx->flipped_ptrs[ctx->prev_index].data[plane]; ctx->dsp.put_pixels_tab[1][0](dst, p, stride, 8); } else { av_log(ctx->avctx, AV_LOG_ERROR, "No such backreference! Buggy sample.\n"); } } } else { ff_thread_await_progress(&ctx->buf_ptrs[ctx->prev_index], cur_row, 0); ctx->dsp.put_pixels_tab[1][0](dst, src, stride, 8); } src += 8; dst += 8; } src += (stride - ctx->num_hblocks[plane])<<3; dst += (stride - ctx->num_hblocks[plane])<<3; ff_thread_report_progress(&ctx->buf_ptrs[ctx->cur_index], cur_row++, 0); } } return 1; }


static av_cold int init(AVFilterContext *ctx, const char *args, void *opaque) { UnsharpContext *unsharp = ctx->priv; int lmsize_x = 5, cmsize_x = 0; int lmsize_y = 5, cmsize_y = 0; double lamount = 1.0f, camount = 0.0f; if (args) sscanf(args, "%d:%d:%lf:%d:%d:%lf", &lmsize_x, &lmsize_y, &lamount, &cmsize_x, &cmsize_y, &camount); if (lmsize_x < 2 || lmsize_y < 2 || cmsize_x < 2 || cmsize_y < 2) { av_log(ctx, AV_LOG_ERROR, "Invalid value <2 for lmsize_x:%d or lmsize_y:%d or cmsize_x:%d or cmsize_y:%d\n", lmsize_x, lmsize_y, cmsize_x, cmsize_y); return AVERROR(EINVAL); } set_filter_param(&unsharp->luma, lmsize_x, lmsize_y, lamount); set_filter_param(&unsharp->chroma, cmsize_x, cmsize_y, camount); return 0; }


static int mxf_decrypt_triplet(AVFormatContext *s, AVPacket *pkt, KLVPacket *klv) { static const uint8_t checkv[16] = {0x43, 0x48, 0x55, 0x4b, 0x43, 0x48, 0x55, 0x4b, 0x43, 0x48, 0x55, 0x4b, 0x43, 0x48, 0x55, 0x4b}; MXFContext *mxf = s->priv_data; AVIOContext *pb = s->pb; int64_t end = avio_tell(pb) + klv->length; uint64_t size; uint64_t orig_size; uint64_t plaintext_size; uint8_t ivec[16]; uint8_t tmpbuf[16]; int index; if (!mxf->aesc && s->key && s->keylen == 16) { mxf->aesc = av_malloc(av_aes_size); if (!mxf->aesc) return -1; av_aes_init(mxf->aesc, s->key, 128, 1); } // crypto context avio_skip(pb, klv_decode_ber_length(pb)); // plaintext offset klv_decode_ber_length(pb); plaintext_size = avio_rb64(pb); // source klv key klv_decode_ber_length(pb); avio_read(pb, klv->key, 16); if (!IS_KLV_KEY(klv, mxf_essence_element_key)) return -1; index = mxf_get_stream_index(s, klv); if (index < 0) return -1; // source size klv_decode_ber_length(pb); orig_size = avio_rb64(pb); if (orig_size < plaintext_size) return -1; // enc. code size = klv_decode_ber_length(pb); if (size < 32 || size - 32 < orig_size) return -1; avio_read(pb, ivec, 16); avio_read(pb, tmpbuf, 16); if (mxf->aesc) av_aes_crypt(mxf->aesc, tmpbuf, tmpbuf, 1, ivec, 1); if (memcmp(tmpbuf, checkv, 16)) av_log(s, AV_LOG_ERROR, "probably incorrect decryption key\n"); size -= 32; size = av_get_packet(pb, pkt, size); if (size < 0) return size; else if (size < plaintext_size) return AVERROR_INVALIDDATA; size -= plaintext_size; if (mxf->aesc) av_aes_crypt(mxf->aesc, &pkt->data[plaintext_size], &pkt->data[plaintext_size], size >> 4, ivec, 1); av_shrink_packet(pkt, orig_size); pkt->stream_index = index; avio_skip(pb, end - avio_tell(pb)); return 0; }


static int libx265_encode_frame(AVCodecContext *avctx, AVPacket *pkt, const AVFrame *pic, int *got_packet) { libx265Context *ctx = avctx->priv_data; x265_picture x265pic; x265_picture x265pic_out = { { 0 } }; x265_nal *nal; uint8_t *dst; int payload = 0; int nnal; int ret; int i; if (pic) { for (i = 0; i < 3; i++) { x265pic.planes[i] = pic->data[i]; x265pic.stride[i] = pic->linesize[i]; } x265pic.pts = pic->pts; } ret = x265_encoder_encode(ctx->encoder, &nal, &nnal, pic ? &x265pic : NULL, &x265pic_out); if (ret < 0) return AVERROR_UNKNOWN; if (!nnal) return 0; for (i = 0; i < nnal; i++) payload += nal[i].sizeBytes; payload += ctx->header_size; ret = ff_alloc_packet(pkt, payload); if (ret < 0) { av_log(avctx, AV_LOG_ERROR, "Error getting output packet.\n"); return ret; } dst = pkt->data; if (ctx->header) { memcpy(dst, ctx->header, ctx->header_size); dst += ctx->header_size; av_freep(&ctx->header); ctx->header_size = 0; } for (i = 0; i < nnal; i++) { memcpy(dst, nal[i].payload, nal[i].sizeBytes); dst += nal[i].sizeBytes; if (is_keyframe(nal[i].type)) pkt->flags |= AV_PKT_FLAG_KEY; } pkt->pts = x265pic_out.pts; pkt->dts = x265pic_out.dts; *got_packet = 1; return 0; }


static inline TCGv gen_ld16u(TCGv addr, int index) { TCGv tmp = new_tmp(); tcg_gen_qemu_ld16u(tmp, addr, index); return tmp; }