static int get_whole_cluster(BlockDriverState *bs, VmdkExtent *extent, uint64_t cluster_offset, uint64_t offset, bool allocate) { /* 128 sectors * 512 bytes each = grain size 64KB */ uint8_t whole_grain[extent->cluster_sectors * 512]; /* we will be here if it's first write on non-exist grain(cluster). * try to read from parent image, if exist */ if (bs->backing_hd) { int ret; if (!vmdk_is_cid_valid(bs)) return -1; /* floor offset to cluster */ offset -= offset % (extent->cluster_sectors * 512); ret = bdrv_read(bs->backing_hd, offset >> 9, whole_grain, extent->cluster_sectors); if (ret < 0) { return -1; } /* Write grain only into the active image */ ret = bdrv_write(extent->file, cluster_offset, whole_grain, extent->cluster_sectors); if (ret < 0) { return -1; } } return 0; }


static void virtio_pci_reset(DeviceState *qdev) { VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); VirtioBusState *bus = VIRTIO_BUS(&proxy->bus); virtio_pci_stop_ioeventfd(proxy); virtio_bus_reset(bus); msix_unuse_all_vectors(&proxy->pci_dev); proxy->flags &= ~VIRTIO_PCI_FLAG_BUS_MASTER_BUG; }


void nbd_client_session_attach_aio_context(NbdClientSession *client, AioContext *new_context) { aio_set_fd_handler(new_context, client->sock, nbd_reply_ready, NULL, client); }


int ram_save_live(Monitor *mon, QEMUFile *f, int stage, void *opaque) { ram_addr_t addr; uint64_t bytes_transferred_last; double bwidth = 0; uint64_t expected_time = 0; if (stage < 0) { cpu_physical_memory_set_dirty_tracking(0); return 0; } if (cpu_physical_sync_dirty_bitmap(0, TARGET_PHYS_ADDR_MAX) != 0) { qemu_file_set_error(f, -EINVAL); return 0; } if (stage == 1) { RAMBlock *block; bytes_transferred = 0; last_block = NULL; last_offset = 0; sort_ram_list(); /* Make sure all dirty bits are set */ QLIST_FOREACH(block, &ram_list.blocks, next) { for (addr = block->offset; addr < block->offset + block->length; addr += TARGET_PAGE_SIZE) { if (!cpu_physical_memory_get_dirty(addr, MIGRATION_DIRTY_FLAG)) { cpu_physical_memory_set_dirty(addr); } } } /* Enable dirty memory tracking */ cpu_physical_memory_set_dirty_tracking(1); qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE); QLIST_FOREACH(block, &ram_list.blocks, next) { qemu_put_byte(f, strlen(block->idstr)); qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr)); qemu_put_be64(f, block->length); } } bytes_transferred_last = bytes_transferred; bwidth = qemu_get_clock_ns(rt_clock); while (!qemu_file_rate_limit(f)) { int bytes_sent; bytes_sent = ram_save_block(f); bytes_transferred += bytes_sent; if (bytes_sent == 0) { /* no more blocks */ break; } } bwidth = qemu_get_clock_ns(rt_clock) - bwidth; bwidth = (bytes_transferred - bytes_transferred_last) / bwidth; /* if we haven't transferred anything this round, force expected_time to a * a very high value, but without crashing */ if (bwidth == 0) { bwidth = 0.000001; } /* try transferring iterative blocks of memory */ if (stage == 3) { int bytes_sent; /* flush all remaining blocks regardless of rate limiting */ while ((bytes_sent = ram_save_block(f)) != 0) { bytes_transferred += bytes_sent; } cpu_physical_memory_set_dirty_tracking(0); } qemu_put_be64(f, RAM_SAVE_FLAG_EOS); expected_time = ram_save_remaining() * TARGET_PAGE_SIZE / bwidth; return (stage == 2) && (expected_time <= migrate_max_downtime()); }


static void test_submit(void) { WorkerTestData data = { .n = 0 }; thread_pool_submit(worker_cb, &data); qemu_aio_flush(); g_assert_cmpint(data.n, ==, 1); }


int bdrv_commit(BlockDriverState *bs) { BlockDriver *drv = bs->drv; int64_t sector, total_sectors, length, backing_length; int n, ro, open_flags; int ret = 0; uint8_t *buf = NULL; char filename[PATH_MAX]; if (!drv) return -ENOMEDIUM; if (!bs->backing_hd) { return -ENOTSUP; } if (bdrv_in_use(bs) || bdrv_in_use(bs->backing_hd)) { return -EBUSY; } ro = bs->backing_hd->read_only; /* Use pstrcpy (not strncpy): filename must be NUL-terminated. */ pstrcpy(filename, sizeof(filename), bs->backing_hd->filename); open_flags = bs->backing_hd->open_flags; if (ro) { if (bdrv_reopen(bs->backing_hd, open_flags | BDRV_O_RDWR, NULL)) { return -EACCES; } } length = bdrv_getlength(bs); if (length < 0) { ret = length; goto ro_cleanup; } backing_length = bdrv_getlength(bs->backing_hd); if (backing_length < 0) { ret = backing_length; goto ro_cleanup; } /* If our top snapshot is larger than the backing file image, * grow the backing file image if possible. If not possible, * we must return an error */ if (length > backing_length) { ret = bdrv_truncate(bs->backing_hd, length); if (ret < 0) { goto ro_cleanup; } } total_sectors = length >> BDRV_SECTOR_BITS; buf = g_malloc(COMMIT_BUF_SECTORS * BDRV_SECTOR_SIZE); for (sector = 0; sector < total_sectors; sector += n) { ret = bdrv_is_allocated(bs, sector, COMMIT_BUF_SECTORS, &n); if (ret < 0) { goto ro_cleanup; } if (ret) { ret = bdrv_read(bs, sector, buf, n); if (ret < 0) { goto ro_cleanup; } ret = bdrv_write(bs->backing_hd, sector, buf, n); if (ret < 0) { goto ro_cleanup; } } } if (drv->bdrv_make_empty) { ret = drv->bdrv_make_empty(bs); if (ret < 0) { goto ro_cleanup; } bdrv_flush(bs); } /* * Make sure all data we wrote to the backing device is actually * stable on disk. */ if (bs->backing_hd) { bdrv_flush(bs->backing_hd); } ret = 0; ro_cleanup: g_free(buf); if (ro) { /* ignoring error return here */ bdrv_reopen(bs->backing_hd, open_flags & ~BDRV_O_RDWR, NULL); } return ret; }


static inline uint32_t search_chunk(BDRVDMGState* s,int sector_num) { /* binary search */ uint32_t chunk1=0,chunk2=s->n_chunks,chunk3; while(chunk1!=chunk2) { chunk3 = (chunk1+chunk2)/2; if(s->sectors[chunk3]>sector_num) chunk2 = chunk3; else if(s->sectors[chunk3]+s->sectorcounts[chunk3]>sector_num) return chunk3; else chunk1 = chunk3; } return s->n_chunks; /* error */ }


static inline void RENAME(rgb32tobgr16)(const uint8_t *src, uint8_t *dst, long src_size) { const uint8_t *s = src; const uint8_t *end; #ifdef HAVE_MMX const uint8_t *mm_end; #endif uint16_t *d = (uint16_t *)dst; end = s + src_size; #ifdef HAVE_MMX __asm __volatile(PREFETCH" %0"::"m"(*src):"memory"); __asm __volatile( "movq %0, %%mm7\n\t" "movq %1, %%mm6\n\t" ::"m"(red_16mask),"m"(green_16mask)); mm_end = end - 15; while(s < mm_end) { __asm __volatile( PREFETCH" 32%1\n\t" "movd %1, %%mm0\n\t" "movd 4%1, %%mm3\n\t" "punpckldq 8%1, %%mm0\n\t" "punpckldq 12%1, %%mm3\n\t" "movq %%mm0, %%mm1\n\t" "movq %%mm0, %%mm2\n\t" "movq %%mm3, %%mm4\n\t" "movq %%mm3, %%mm5\n\t" "psllq $8, %%mm0\n\t" "psllq $8, %%mm3\n\t" "pand %%mm7, %%mm0\n\t" "pand %%mm7, %%mm3\n\t" "psrlq $5, %%mm1\n\t" "psrlq $5, %%mm4\n\t" "pand %%mm6, %%mm1\n\t" "pand %%mm6, %%mm4\n\t" "psrlq $19, %%mm2\n\t" "psrlq $19, %%mm5\n\t" "pand %2, %%mm2\n\t" "pand %2, %%mm5\n\t" "por %%mm1, %%mm0\n\t" "por %%mm4, %%mm3\n\t" "por %%mm2, %%mm0\n\t" "por %%mm5, %%mm3\n\t" "psllq $16, %%mm3\n\t" "por %%mm3, %%mm0\n\t" MOVNTQ" %%mm0, %0\n\t" :"=m"(*d):"m"(*s),"m"(blue_16mask):"memory"); d += 4; s += 16; } __asm __volatile(SFENCE:::"memory"); __asm __volatile(EMMS:::"memory"); #endif while(s < end) { register int rgb = *(uint32_t*)s; s += 4; *d++ = ((rgb&0xF8)<<8) + ((rgb&0xFC00)>>5) + ((rgb&0xF80000)>>19); } }


static void conv411(uint8_t *dst, int dst_wrap, uint8_t *src, int src_wrap, int width, int height) { int w, c; uint8_t *s1, *s2, *d; for(;height > 0; height--) { s1 = src; s2 = src + src_wrap; d = dst; for(w = width;w > 0; w--) { c = (s1[0] + s2[0]) >> 1; d[0] = c; d[1] = c; s1++; s2++; d += 2; } src += src_wrap * 2; dst += dst_wrap; } }


static void *acpi_set_bsel(PCIBus *bus, void *opaque) { unsigned *bsel_alloc = opaque; unsigned *bus_bsel; if (qbus_is_hotpluggable(BUS(bus))) { bus_bsel = g_malloc(sizeof *bus_bsel); *bus_bsel = (*bsel_alloc)++; object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, bus_bsel, NULL); } return bsel_alloc; }


static void vncws_send_handshake_response(VncState *vs, const char* key) { char combined_key[WS_CLIENT_KEY_LEN + WS_GUID_LEN + 1]; char hash[SHA1_DIGEST_LEN]; size_t hash_size = SHA1_DIGEST_LEN; char *accept = NULL, *response = NULL; gnutls_datum_t in; g_strlcpy(combined_key, key, WS_CLIENT_KEY_LEN + 1); g_strlcat(combined_key, WS_GUID, WS_CLIENT_KEY_LEN + WS_GUID_LEN + 1); /* hash and encode it */ in.data = (void *)combined_key; in.size = WS_CLIENT_KEY_LEN + WS_GUID_LEN; if (gnutls_fingerprint(GNUTLS_DIG_SHA1, &in, hash, &hash_size) == GNUTLS_E_SUCCESS) { accept = g_base64_encode((guchar *)hash, SHA1_DIGEST_LEN); } if (accept == NULL) { VNC_DEBUG("Hashing Websocket combined key failed\n"); vnc_client_error(vs); return; } response = g_strdup_printf(WS_HANDSHAKE, accept); vnc_write(vs, response, strlen(response)); vnc_flush(vs); g_free(accept); g_free(response); vs->encode_ws = 1; vnc_init_state(vs); }


int ff_audio_mix_set_matrix(AudioMix *am, const double *matrix, int stride) { int i, o, i0, o0, ret; char in_layout_name[128]; char out_layout_name[128]; if ( am->in_channels <= 0 || am->in_channels > AVRESAMPLE_MAX_CHANNELS || am->out_channels <= 0 || am->out_channels > AVRESAMPLE_MAX_CHANNELS) { av_log(am->avr, AV_LOG_ERROR, "Invalid channel counts\n"); return AVERROR(EINVAL); } if (am->matrix) { av_free(am->matrix[0]); am->matrix = NULL; } am->in_matrix_channels = am->in_channels; am->out_matrix_channels = am->out_channels; reduce_matrix(am, matrix, stride); #define CONVERT_MATRIX(type, expr) \ am->matrix_## type[0] = av_mallocz(am->out_matrix_channels * \ am->in_matrix_channels * \ sizeof(*am->matrix_## type[0])); \ if (!am->matrix_## type[0]) \ return AVERROR(ENOMEM); \ for (o = 0, o0 = 0; o < am->out_channels; o++) { \ if (am->output_zero[o] || am->output_skip[o]) \ continue; \ if (o0 > 0) \ am->matrix_## type[o0] = am->matrix_## type[o0 - 1] + \ am->in_matrix_channels; \ for (i = 0, i0 = 0; i < am->in_channels; i++) { \ double v; \ if (am->input_skip[i]) \ continue; \ v = matrix[o * stride + i]; \ am->matrix_## type[o0][i0] = expr; \ i0++; \ } \ o0++; \ } \ am->matrix = (void **)am->matrix_## type; if (am->in_matrix_channels && am->out_matrix_channels) { switch (am->coeff_type) { case AV_MIX_COEFF_TYPE_Q8: CONVERT_MATRIX(q8, av_clip_int16(lrint(256.0 * v))) break; case AV_MIX_COEFF_TYPE_Q15: CONVERT_MATRIX(q15, av_clipl_int32(llrint(32768.0 * v))) break; case AV_MIX_COEFF_TYPE_FLT: CONVERT_MATRIX(flt, v) break; default: av_log(am->avr, AV_LOG_ERROR, "Invalid mix coeff type\n"); return AVERROR(EINVAL); } } ret = mix_function_init(am); if (ret < 0) return ret; av_get_channel_layout_string(in_layout_name, sizeof(in_layout_name), am->in_channels, am->in_layout); av_get_channel_layout_string(out_layout_name, sizeof(out_layout_name), am->out_channels, am->out_layout); av_log(am->avr, AV_LOG_DEBUG, "audio_mix: %s to %s\n", in_layout_name, out_layout_name); av_log(am->avr, AV_LOG_DEBUG, "matrix size: %d x %d\n", am->in_matrix_channels, am->out_matrix_channels); for (o = 0; o < am->out_channels; o++) { for (i = 0; i < am->in_channels; i++) { if (am->output_zero[o]) av_log(am->avr, AV_LOG_DEBUG, " (ZERO)"); else if (am->input_skip[i] || am->output_skip[o]) av_log(am->avr, AV_LOG_DEBUG, " (SKIP)"); else av_log(am->avr, AV_LOG_DEBUG, " %0.3f ", matrix[o * am->in_channels + i]); } av_log(am->avr, AV_LOG_DEBUG, "\n"); } return 0; }


BlockBackend *blk_new_open(const char *filename, const char *reference, QDict *options, int flags, Error **errp) { BlockBackend *blk; BlockDriverState *bs; uint64_t perm; /* blk_new_open() is mainly used in .bdrv_create implementations and the * tools where sharing isn't a concern because the BDS stays private, so we * just request permission according to the flags. * * The exceptions are xen_disk and blockdev_init(); in these cases, the * caller of blk_new_open() doesn't make use of the permissions, but they * shouldn't hurt either. We can still share everything here because the * guest devices will add their own blockers if they can't share. */ perm = BLK_PERM_CONSISTENT_READ; if (flags & BDRV_O_RDWR) { perm |= BLK_PERM_WRITE; } if (flags & BDRV_O_RESIZE) { perm |= BLK_PERM_RESIZE; } blk = blk_new(perm, BLK_PERM_ALL); bs = bdrv_open(filename, reference, options, flags, errp); if (!bs) { blk_unref(blk); return NULL; } blk->root = bdrv_root_attach_child(bs, "root", &child_root, perm, BLK_PERM_ALL, blk, &error_abort); return blk; }


static int pci_dec_21154_init_device(SysBusDevice *dev) { UNINState *s; int pci_mem_config, pci_mem_data; /* Uninorth bridge */ s = FROM_SYSBUS(UNINState, dev); // XXX: s = &pci_bridge[2]; pci_mem_config = cpu_register_io_memory(pci_unin_config_read, pci_unin_config_write, s); pci_mem_data = cpu_register_io_memory(pci_unin_main_read, pci_unin_main_write, &s->host_state); sysbus_init_mmio(dev, 0x1000, pci_mem_config); sysbus_init_mmio(dev, 0x1000, pci_mem_data); return 0; }


static uint32_t rtas_set_isolation_state(uint32_t idx, uint32_t state) { sPAPRDRConnector *drc = spapr_drc_by_index(idx); sPAPRDRConnectorClass *drck; if (!drc) { return RTAS_OUT_PARAM_ERROR; } drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); return drck->set_isolation_state(drc, state); }


static int64_t nfs_get_allocated_file_size(BlockDriverState *bs) { NFSClient *client = bs->opaque; NFSRPC task = {0}; struct stat st; if (bdrv_is_read_only(bs) && !(bs->open_flags & BDRV_O_NOCACHE)) { return client->st_blocks * 512; } task.st = &st; if (nfs_fstat_async(client->context, client->fh, nfs_co_generic_cb, &task) != 0) { return -ENOMEM; } while (!task.complete) { nfs_set_events(client); aio_poll(client->aio_context, true); } return (task.ret < 0 ? task.ret : st.st_blocks * 512); }


static CadenceTimerState *cadence_timer_from_addr(void *opaque, target_phys_addr_t offset) { unsigned int index; CadenceTTCState *s = (CadenceTTCState *)opaque; index = (offset >> 2) % 3; return &s->timer[index]; }


static ssize_t net_rx_packet(NetClientState *nc, const uint8_t *buf, size_t size) { struct XenNetDev *netdev = qemu_get_nic_opaque(nc); netif_rx_request_t rxreq; RING_IDX rc, rp; void *page; if (netdev->xendev.be_state != XenbusStateConnected) { return -1; } rc = netdev->rx_ring.req_cons; rp = netdev->rx_ring.sring->req_prod; xen_rmb(); /* Ensure we see queued requests up to 'rp'. */ if (rc == rp || RING_REQUEST_CONS_OVERFLOW(&netdev->rx_ring, rc)) { xen_be_printf(&netdev->xendev, 2, "no buffer, drop packet\n"); return -1; } if (size > XC_PAGE_SIZE - NET_IP_ALIGN) { xen_be_printf(&netdev->xendev, 0, "packet too big (%lu > %ld)", (unsigned long)size, XC_PAGE_SIZE - NET_IP_ALIGN); return -1; } memcpy(&rxreq, RING_GET_REQUEST(&netdev->rx_ring, rc), sizeof(rxreq)); netdev->rx_ring.req_cons = ++rc; page = xc_gnttab_map_grant_ref(netdev->xendev.gnttabdev, netdev->xendev.dom, rxreq.gref, PROT_WRITE); if (page == NULL) { xen_be_printf(&netdev->xendev, 0, "error: rx gref dereference failed (%d)\n", rxreq.gref); net_rx_response(netdev, &rxreq, NETIF_RSP_ERROR, 0, 0, 0); return -1; } memcpy(page + NET_IP_ALIGN, buf, size); xc_gnttab_munmap(netdev->xendev.gnttabdev, page, 1); net_rx_response(netdev, &rxreq, NETIF_RSP_OKAY, NET_IP_ALIGN, size, 0); return size; }


static void mb_add_mod(MultibootState *s, target_phys_addr_t start, target_phys_addr_t end, target_phys_addr_t cmdline_phys) { char *p; assert(s->mb_mods_count < s->mb_mods_avail); p = (char *)s->mb_buf + s->offset_mbinfo + MB_MOD_SIZE * s->mb_mods_count; stl_p(p + MB_MOD_START, start); stl_p(p + MB_MOD_END, end); stl_p(p + MB_MOD_CMDLINE, cmdline_phys); mb_debug("mod%02d: "TARGET_FMT_plx" - "TARGET_FMT_plx"\n", s->mb_mods_count, start, end); s->mb_mods_count++; }


static void vnc_init_basic_info_from_server_addr(QIOChannelSocket *ioc, VncBasicInfo *info, Error **errp) { SocketAddress *addr = NULL; if (!ioc) { error_setg(errp, "No listener socket available"); return; } addr = qio_channel_socket_get_local_address(ioc, errp); if (!addr) { return; } vnc_init_basic_info(addr, info, errp); qapi_free_SocketAddress(addr); }


static void nbd_teardown_connection(NbdClientSession *client) { /* finish any pending coroutines */ shutdown(client->sock, 2); nbd_recv_coroutines_enter_all(client); nbd_client_session_detach_aio_context(client); closesocket(client->sock); client->sock = -1; }


static int usb_uhci_common_initfn(UHCIState *s) { uint8_t *pci_conf = s->dev.config; int i; pci_conf[PCI_REVISION_ID] = 0x01; // revision number pci_conf[PCI_CLASS_PROG] = 0x00; pci_config_set_class(pci_conf, PCI_CLASS_SERIAL_USB); /* TODO: reset value should be 0. */ pci_conf[PCI_INTERRUPT_PIN] = 4; // interrupt pin 3 pci_conf[0x60] = 0x10; // release number usb_bus_new(&s->bus, &s->dev.qdev); for(i = 0; i < NB_PORTS; i++) { usb_register_port(&s->bus, &s->ports[i].port, s, i, &uhci_port_ops, USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL); usb_port_location(&s->ports[i].port, NULL, i+1); } s->frame_timer = qemu_new_timer_ns(vm_clock, uhci_frame_timer, s); s->expire_time = qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / FRAME_TIMER_FREQ); s->num_ports_vmstate = NB_PORTS; qemu_register_reset(uhci_reset, s); /* Use region 4 for consistency with real hardware. BSD guests seem to rely on this. */ pci_register_bar(&s->dev, 4, 0x20, PCI_BASE_ADDRESS_SPACE_IO, uhci_map); return 0; }


Object *user_creatable_add_opts(QemuOpts *opts, Error **errp) { Visitor *v; QDict *pdict; Object *obj; const char *id = qemu_opts_id(opts); const char *type = qemu_opt_get(opts, "qom-type"); if (!type) { error_setg(errp, QERR_MISSING_PARAMETER, "qom-type"); return NULL; } if (!id) { error_setg(errp, QERR_MISSING_PARAMETER, "id"); return NULL; } pdict = qemu_opts_to_qdict(opts, NULL); qdict_del(pdict, "qom-type"); qdict_del(pdict, "id"); v = opts_visitor_new(opts); obj = user_creatable_add_type(type, id, pdict, v, errp); visit_free(v); QDECREF(pdict); return obj; }


int ff_generate_sliding_window_mmcos(H264Context *h, int first_slice) { MMCO mmco_temp[MAX_MMCO_COUNT], *mmco = first_slice ? h->mmco : mmco_temp; int mmco_index = 0, i = 0; assert(h->long_ref_count + h->short_ref_count <= h->sps.ref_frame_count); if (h->short_ref_count && h->long_ref_count + h->short_ref_count == h->sps.ref_frame_count && !(FIELD_PICTURE(h) && !h->first_field && h->cur_pic_ptr->reference)) { mmco[0].opcode = MMCO_SHORT2UNUSED; mmco[0].short_pic_num = h->short_ref[h->short_ref_count - 1]->frame_num; mmco_index = 1; if (FIELD_PICTURE(h)) { mmco[0].short_pic_num *= 2; mmco[1].opcode = MMCO_SHORT2UNUSED; mmco[1].short_pic_num = mmco[0].short_pic_num + 1; mmco_index = 2; } } if (first_slice) { h->mmco_index = mmco_index; } else if (!first_slice && mmco_index >= 0 && (mmco_index != h->mmco_index || (i = check_opcodes(h->mmco, mmco_temp, mmco_index)))) { av_log(h->avctx, AV_LOG_ERROR, "Inconsistent MMCO state between slices [%d, %d, %d]\n", mmco_index, h->mmco_index, i); return AVERROR_INVALIDDATA; } return 0; }


static int do_alloc_cluster_offset(BlockDriverState *bs, uint64_t guest_offset, uint64_t *host_offset, unsigned int *nb_clusters) { BDRVQcowState *s = bs->opaque; int ret; trace_qcow2_do_alloc_clusters_offset(qemu_coroutine_self(), guest_offset, *host_offset, *nb_clusters); ret = handle_dependencies(bs, guest_offset, nb_clusters); if (ret < 0) { return ret; } /* Allocate new clusters */ trace_qcow2_cluster_alloc_phys(qemu_coroutine_self()); if (*host_offset == 0) { int64_t cluster_offset = qcow2_alloc_clusters(bs, *nb_clusters * s->cluster_size); if (cluster_offset < 0) { return cluster_offset; } *host_offset = cluster_offset; return 0; } else { ret = qcow2_alloc_clusters_at(bs, *host_offset, *nb_clusters); if (ret < 0) { return ret; } *nb_clusters = ret; return 0; } }


static int pit_initfn(ISADevice *dev) { PITState *pit = DO_UPCAST(PITState, dev, dev); PITChannelState *s; s = &pit->channels[0]; /* the timer 0 is connected to an IRQ */ s->irq_timer = qemu_new_timer(vm_clock, pit_irq_timer, s); s->irq = isa_reserve_irq(pit->irq); register_ioport_write(pit->iobase, 4, 1, pit_ioport_write, pit); register_ioport_read(pit->iobase, 3, 1, pit_ioport_read, pit); isa_init_ioport(dev, pit->iobase); return 0; }


int64_t bdrv_get_block_status_above(BlockDriverState *bs, BlockDriverState *base, int64_t sector_num, int nb_sectors, int *pnum) { Coroutine *co; BdrvCoGetBlockStatusData data = { .bs = bs, .base = base, .sector_num = sector_num, .nb_sectors = nb_sectors, .pnum = pnum, .done = false, }; if (qemu_in_coroutine()) { /* Fast-path if already in coroutine context */ bdrv_get_block_status_above_co_entry(&data); } else { AioContext *aio_context = bdrv_get_aio_context(bs); co = qemu_coroutine_create(bdrv_get_block_status_above_co_entry); qemu_coroutine_enter(co, &data); while (!data.done) { aio_poll(aio_context, true); } } return data.ret; }


static int usb_linux_update_endp_table(USBHostDevice *s) { uint8_t *descriptors; uint8_t devep, type, alt_interface; int interface, length, i, ep, pid; struct endp_data *epd; for (i = 0; i < MAX_ENDPOINTS; i++) { s->ep_in[i].type = INVALID_EP_TYPE; s->ep_out[i].type = INVALID_EP_TYPE; } if (s->configuration == 0) { /* not configured yet -- leave all endpoints disabled */ return 0; } /* get the desired configuration, interface, and endpoint descriptors * from device description */ descriptors = &s->descr[18]; length = s->descr_len - 18; i = 0; if (descriptors[i + 1] != USB_DT_CONFIG || descriptors[i + 5] != s->configuration) { fprintf(stderr, "invalid descriptor data - configuration %d\n", s->configuration); return 1; } i += descriptors[i]; while (i < length) { if (descriptors[i + 1] != USB_DT_INTERFACE || (descriptors[i + 1] == USB_DT_INTERFACE && descriptors[i + 4] == 0)) { i += descriptors[i]; continue; } interface = descriptors[i + 2]; alt_interface = usb_linux_get_alt_setting(s, s->configuration, interface); /* the current interface descriptor is the active interface * and has endpoints */ if (descriptors[i + 3] != alt_interface) { i += descriptors[i]; continue; } /* advance to the endpoints */ while (i < length && descriptors[i +1] != USB_DT_ENDPOINT) { i += descriptors[i]; } if (i >= length) break; while (i < length) { if (descriptors[i + 1] != USB_DT_ENDPOINT) { break; } devep = descriptors[i + 2]; pid = (devep & USB_DIR_IN) ? USB_TOKEN_IN : USB_TOKEN_OUT; ep = devep & 0xf; if (ep == 0) { fprintf(stderr, "usb-linux: invalid ep descriptor, ep == 0\n"); return 1; } switch (descriptors[i + 3] & 0x3) { case 0x00: type = USBDEVFS_URB_TYPE_CONTROL; break; case 0x01: type = USBDEVFS_URB_TYPE_ISO; set_max_packet_size(s, pid, ep, descriptors + i); break; case 0x02: type = USBDEVFS_URB_TYPE_BULK; break; case 0x03: type = USBDEVFS_URB_TYPE_INTERRUPT; break; default: DPRINTF("usb_host: malformed endpoint type\n"); type = USBDEVFS_URB_TYPE_BULK; } epd = get_endp(s, pid, ep); assert(epd->type == INVALID_EP_TYPE); epd->type = type; epd->halted = 0; i += descriptors[i]; } } return 0; }


pvscsi_ring_init_msg(PVSCSIRingInfo *m, PVSCSICmdDescSetupMsgRing *ri) { int i; uint32_t len_log2; uint32_t ring_size; if (ri->numPages > PVSCSI_SETUP_MSG_RING_MAX_NUM_PAGES) { return -1; } ring_size = ri->numPages * PVSCSI_MAX_NUM_MSG_ENTRIES_PER_PAGE; len_log2 = pvscsi_log2(ring_size - 1); m->msg_len_mask = MASK(len_log2); m->filled_msg_ptr = 0; for (i = 0; i < ri->numPages; i++) { m->msg_ring_pages_pa[i] = ri->ringPPNs[i] << VMW_PAGE_SHIFT; } RS_SET_FIELD(m, msgProdIdx, 0); RS_SET_FIELD(m, msgConsIdx, 0); RS_SET_FIELD(m, msgNumEntriesLog2, len_log2); trace_pvscsi_ring_init_msg(len_log2); /* Flush ring state page changes */ smp_wmb(); return 0; }


void ppc_hash64_stop_access(PowerPCCPU *cpu, uint64_t token) { if (cpu->env.external_htab == MMU_HASH64_KVM_MANAGED_HPT) { kvmppc_hash64_free_pteg(token); } }


static void puv3_load_kernel(const char *kernel_filename) { int size; assert(kernel_filename != NULL); /* only zImage format supported */ size = load_image_targphys(kernel_filename, KERNEL_LOAD_ADDR, KERNEL_MAX_SIZE); if (size < 0) { hw_error("Load kernel error: '%s'\n", kernel_filename); } /* cheat curses that we have a graphic console, only under ocd console */ graphic_console_init(NULL, NULL, NULL, NULL, NULL); }


static int qemu_rdma_write_one(QEMUFile *f, RDMAContext *rdma, int current_index, uint64_t current_addr, uint64_t length) { struct ibv_sge sge; struct ibv_send_wr send_wr = { 0 }; struct ibv_send_wr *bad_wr; int reg_result_idx, ret, count = 0; uint64_t chunk, chunks; uint8_t *chunk_start, *chunk_end; RDMALocalBlock *block = &(rdma->local_ram_blocks.block[current_index]); RDMARegister reg; RDMARegisterResult *reg_result; RDMAControlHeader resp = { .type = RDMA_CONTROL_REGISTER_RESULT }; RDMAControlHeader head = { .len = sizeof(RDMARegister), .type = RDMA_CONTROL_REGISTER_REQUEST, .repeat = 1, }; retry: sge.addr = (uint64_t)(block->local_host_addr + (current_addr - block->offset)); sge.length = length; chunk = ram_chunk_index(block->local_host_addr, (uint8_t *) sge.addr); chunk_start = ram_chunk_start(block, chunk); if (block->is_ram_block) { chunks = length / (1UL << RDMA_REG_CHUNK_SHIFT); if (chunks && ((length % (1UL << RDMA_REG_CHUNK_SHIFT)) == 0)) { chunks--; } } else { chunks = block->length / (1UL << RDMA_REG_CHUNK_SHIFT); if (chunks && ((block->length % (1UL << RDMA_REG_CHUNK_SHIFT)) == 0)) { chunks--; } } DDPRINTF("Writing %" PRIu64 " chunks, (%" PRIu64 " MB)\n", chunks + 1, (chunks + 1) * (1UL << RDMA_REG_CHUNK_SHIFT) / 1024 / 1024); chunk_end = ram_chunk_end(block, chunk + chunks); if (!rdma->pin_all) { #ifdef RDMA_UNREGISTRATION_EXAMPLE qemu_rdma_unregister_waiting(rdma); #endif } while (test_bit(chunk, block->transit_bitmap)) { (void)count; DDPRINTF("(%d) Not clobbering: block: %d chunk %" PRIu64 " current %" PRIu64 " len %" PRIu64 " %d %d\n", count++, current_index, chunk, sge.addr, length, rdma->nb_sent, block->nb_chunks); ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_RDMA_WRITE); if (ret < 0) { fprintf(stderr, "Failed to Wait for previous write to complete " "block %d chunk %" PRIu64 " current %" PRIu64 " len %" PRIu64 " %d\n", current_index, chunk, sge.addr, length, rdma->nb_sent); return ret; } } if (!rdma->pin_all || !block->is_ram_block) { if (!block->remote_keys[chunk]) { /* * This chunk has not yet been registered, so first check to see * if the entire chunk is zero. If so, tell the other size to * memset() + madvise() the entire chunk without RDMA. */ if (can_use_buffer_find_nonzero_offset((void *)sge.addr, length) && buffer_find_nonzero_offset((void *)sge.addr, length) == length) { RDMACompress comp = { .offset = current_addr, .value = 0, .block_idx = current_index, .length = length, }; head.len = sizeof(comp); head.type = RDMA_CONTROL_COMPRESS; DDPRINTF("Entire chunk is zero, sending compress: %" PRIu64 " for %d " "bytes, index: %d, offset: %" PRId64 "...\n", chunk, sge.length, current_index, current_addr); compress_to_network(&comp); ret = qemu_rdma_exchange_send(rdma, &head, (uint8_t *) &comp, NULL, NULL, NULL); if (ret < 0) { return -EIO; } acct_update_position(f, sge.length, true); return 1; } /* * Otherwise, tell other side to register. */ reg.current_index = current_index; if (block->is_ram_block) { reg.key.current_addr = current_addr; } else { reg.key.chunk = chunk; } reg.chunks = chunks; DDPRINTF("Sending registration request chunk %" PRIu64 " for %d " "bytes, index: %d, offset: %" PRId64 "...\n", chunk, sge.length, current_index, current_addr); register_to_network(&reg); ret = qemu_rdma_exchange_send(rdma, &head, (uint8_t *) &reg, &resp, &reg_result_idx, NULL); if (ret < 0) { return ret; } /* try to overlap this single registration with the one we sent. */ if (qemu_rdma_register_and_get_keys(rdma, block, (uint8_t *) sge.addr, &sge.lkey, NULL, chunk, chunk_start, chunk_end)) { fprintf(stderr, "cannot get lkey!\n"); return -EINVAL; } reg_result = (RDMARegisterResult *) rdma->wr_data[reg_result_idx].control_curr; network_to_result(reg_result); DDPRINTF("Received registration result:" " my key: %x their key %x, chunk %" PRIu64 "\n", block->remote_keys[chunk], reg_result->rkey, chunk); block->remote_keys[chunk] = reg_result->rkey; block->remote_host_addr = reg_result->host_addr; } else { /* already registered before */ if (qemu_rdma_register_and_get_keys(rdma, block, (uint8_t *)sge.addr, &sge.lkey, NULL, chunk, chunk_start, chunk_end)) { fprintf(stderr, "cannot get lkey!\n"); return -EINVAL; } } send_wr.wr.rdma.rkey = block->remote_keys[chunk]; } else { send_wr.wr.rdma.rkey = block->remote_rkey; if (qemu_rdma_register_and_get_keys(rdma, block, (uint8_t *)sge.addr, &sge.lkey, NULL, chunk, chunk_start, chunk_end)) { fprintf(stderr, "cannot get lkey!\n"); return -EINVAL; } } /* * Encode the ram block index and chunk within this wrid. * We will use this information at the time of completion * to figure out which bitmap to check against and then which * chunk in the bitmap to look for. */ send_wr.wr_id = qemu_rdma_make_wrid(RDMA_WRID_RDMA_WRITE, current_index, chunk); send_wr.opcode = IBV_WR_RDMA_WRITE; send_wr.send_flags = IBV_SEND_SIGNALED; send_wr.sg_list = &sge; send_wr.num_sge = 1; send_wr.wr.rdma.remote_addr = block->remote_host_addr + (current_addr - block->offset); DDDPRINTF("Posting chunk: %" PRIu64 ", addr: %lx" " remote: %lx, bytes %" PRIu32 "\n", chunk, sge.addr, send_wr.wr.rdma.remote_addr, sge.length); /* * ibv_post_send() does not return negative error numbers, * per the specification they are positive - no idea why. */ ret = ibv_post_send(rdma->qp, &send_wr, &bad_wr); if (ret == ENOMEM) { DDPRINTF("send queue is full. wait a little....\n"); ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_RDMA_WRITE); if (ret < 0) { fprintf(stderr, "rdma migration: failed to make " "room in full send queue! %d\n", ret); return ret; } goto retry; } else if (ret > 0) { perror("rdma migration: post rdma write failed"); return -ret; } set_bit(chunk, block->transit_bitmap); acct_update_position(f, sge.length, false); rdma->total_writes++; return 0; }


void qmp_block_commit(bool has_job_id, const char *job_id, const char *device, bool has_base, const char *base, bool has_top, const char *top, bool has_backing_file, const char *backing_file, bool has_speed, int64_t speed, Error **errp) { BlockDriverState *bs; BlockDriverState *base_bs, *top_bs; AioContext *aio_context; Error *local_err = NULL; /* This will be part of the QMP command, if/when the * BlockdevOnError change for blkmirror makes it in */ BlockdevOnError on_error = BLOCKDEV_ON_ERROR_REPORT; if (!has_speed) { speed = 0; } /* Important Note: * libvirt relies on the DeviceNotFound error class in order to probe for * live commit feature versions; for this to work, we must make sure to * perform the device lookup before any generic errors that may occur in a * scenario in which all optional arguments are omitted. */ bs = qmp_get_root_bs(device, &local_err); if (!bs) { bs = bdrv_lookup_bs(device, device, NULL); if (!bs) { error_free(local_err); error_set(errp, ERROR_CLASS_DEVICE_NOT_FOUND, "Device '%s' not found", device); } else { error_propagate(errp, local_err); } return; } aio_context = bdrv_get_aio_context(bs); aio_context_acquire(aio_context); if (bdrv_op_is_blocked(bs, BLOCK_OP_TYPE_COMMIT_SOURCE, errp)) { goto out; } /* default top_bs is the active layer */ top_bs = bs; if (has_top && top) { if (strcmp(bs->filename, top) != 0) { top_bs = bdrv_find_backing_image(bs, top); } } if (top_bs == NULL) { error_setg(errp, "Top image file %s not found", top ? top : "NULL"); goto out; } assert(bdrv_get_aio_context(top_bs) == aio_context); if (has_base && base) { base_bs = bdrv_find_backing_image(top_bs, base); } else { base_bs = bdrv_find_base(top_bs); } if (base_bs == NULL) { error_setg(errp, QERR_BASE_NOT_FOUND, base ? base : "NULL"); goto out; } assert(bdrv_get_aio_context(base_bs) == aio_context); if (bdrv_op_is_blocked(base_bs, BLOCK_OP_TYPE_COMMIT_TARGET, errp)) { goto out; } /* Do not allow attempts to commit an image into itself */ if (top_bs == base_bs) { error_setg(errp, "cannot commit an image into itself"); goto out; } if (top_bs == bs) { if (has_backing_file) { error_setg(errp, "'backing-file' specified," " but 'top' is the active layer"); goto out; } commit_active_start(has_job_id ? job_id : NULL, bs, base_bs, speed, on_error, block_job_cb, bs, &local_err, false); } else { commit_start(has_job_id ? job_id : NULL, bs, base_bs, top_bs, speed, on_error, block_job_cb, bs, has_backing_file ? backing_file : NULL, &local_err); } if (local_err != NULL) { error_propagate(errp, local_err); goto out; } out: aio_context_release(aio_context); }


static void ffmpeg_cleanup(int ret) { int i, j; if (do_benchmark) { int maxrss = getmaxrss() / 1024; printf("bench: maxrss=%ikB\n", maxrss); } for (i = 0; i < nb_filtergraphs; i++) { FilterGraph *fg = filtergraphs[i]; avfilter_graph_free(&fg->graph); for (j = 0; j < fg->nb_inputs; j++) { av_freep(&fg->inputs[j]->name); av_freep(&fg->inputs[j]); } av_freep(&fg->inputs); for (j = 0; j < fg->nb_outputs; j++) { av_freep(&fg->outputs[j]->name); av_freep(&fg->outputs[j]); } av_freep(&fg->outputs); av_freep(&fg->graph_desc); av_freep(&filtergraphs[i]); } av_freep(&filtergraphs); av_freep(&subtitle_out); /* close files */ for (i = 0; i < nb_output_files; i++) { OutputFile *of = output_files[i]; AVFormatContext *s = of->ctx; if (s && s->oformat && !(s->oformat->flags & AVFMT_NOFILE) && s->pb) avio_closep(&s->pb); avformat_free_context(s); av_dict_free(&of->opts); av_freep(&output_files[i]); } for (i = 0; i < nb_output_streams; i++) { OutputStream *ost = output_streams[i]; AVBitStreamFilterContext *bsfc = ost->bitstream_filters; while (bsfc) { AVBitStreamFilterContext *next = bsfc->next; av_bitstream_filter_close(bsfc); bsfc = next; } ost->bitstream_filters = NULL; av_frame_free(&ost->filtered_frame); av_frame_free(&ost->last_frame); av_parser_close(ost->parser); av_freep(&ost->forced_keyframes); av_expr_free(ost->forced_keyframes_pexpr); av_freep(&ost->avfilter); av_freep(&ost->logfile_prefix); av_freep(&ost->audio_channels_map); ost->audio_channels_mapped = 0; avcodec_free_context(&ost->enc_ctx); av_freep(&output_streams[i]); } #if HAVE_PTHREADS free_input_threads(); #endif for (i = 0; i < nb_input_files; i++) { avformat_close_input(&input_files[i]->ctx); av_freep(&input_files[i]); } for (i = 0; i < nb_input_streams; i++) { InputStream *ist = input_streams[i]; av_frame_free(&ist->decoded_frame); av_frame_free(&ist->filter_frame); av_dict_free(&ist->decoder_opts); avsubtitle_free(&ist->prev_sub.subtitle); av_frame_free(&ist->sub2video.frame); av_freep(&ist->filters); av_freep(&ist->hwaccel_device); avcodec_free_context(&ist->dec_ctx); av_freep(&input_streams[i]); } if (vstats_file) fclose(vstats_file); av_freep(&vstats_filename); av_freep(&input_streams); av_freep(&input_files); av_freep(&output_streams); av_freep(&output_files); uninit_opts(); avformat_network_deinit(); if (received_sigterm) { av_log(NULL, AV_LOG_INFO, "Received signal %d: terminating.\n", (int) received_sigterm); } else if (ret && transcode_init_done) { av_log(NULL, AV_LOG_INFO, "Conversion failed!\n"); } term_exit(); }


Aml *aml_local(int num) { Aml *var; uint8_t op = 0x60 /* Local0Op */ + num; assert(num <= 7); var = aml_opcode(op); return var; }


static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) { static const TCGTargetOpDef r = { .args_ct_str = { "r" } }; static const TCGTargetOpDef r_r = { .args_ct_str = { "r", "r" } }; static const TCGTargetOpDef r_L = { .args_ct_str = { "r", "L" } }; static const TCGTargetOpDef L_L = { .args_ct_str = { "L", "L" } }; static const TCGTargetOpDef r_ri = { .args_ct_str = { "r", "ri" } }; static const TCGTargetOpDef r_rC = { .args_ct_str = { "r", "rC" } }; static const TCGTargetOpDef r_rZ = { .args_ct_str = { "r", "rZ" } }; static const TCGTargetOpDef r_r_ri = { .args_ct_str = { "r", "r", "ri" } }; static const TCGTargetOpDef r_0_ri = { .args_ct_str = { "r", "0", "ri" } }; static const TCGTargetOpDef r_0_rI = { .args_ct_str = { "r", "0", "rI" } }; static const TCGTargetOpDef r_0_rJ = { .args_ct_str = { "r", "0", "rJ" } }; static const TCGTargetOpDef r_0_rO = { .args_ct_str = { "r", "0", "rO" } }; static const TCGTargetOpDef r_0_rX = { .args_ct_str = { "r", "0", "rX" } }; switch (op) { case INDEX_op_goto_ptr: return &r; case INDEX_op_ld8u_i32: case INDEX_op_ld8u_i64: case INDEX_op_ld8s_i32: case INDEX_op_ld8s_i64: case INDEX_op_ld16u_i32: case INDEX_op_ld16u_i64: case INDEX_op_ld16s_i32: case INDEX_op_ld16s_i64: case INDEX_op_ld_i32: case INDEX_op_ld32u_i64: case INDEX_op_ld32s_i64: case INDEX_op_ld_i64: case INDEX_op_st8_i32: case INDEX_op_st8_i64: case INDEX_op_st16_i32: case INDEX_op_st16_i64: case INDEX_op_st_i32: case INDEX_op_st32_i64: case INDEX_op_st_i64: return &r_r; case INDEX_op_add_i32: case INDEX_op_add_i64: return &r_r_ri; case INDEX_op_sub_i32: case INDEX_op_sub_i64: return &r_0_ri; case INDEX_op_mul_i32: /* If we have the general-instruction-extensions, then we have MULTIPLY SINGLE IMMEDIATE with a signed 32-bit, otherwise we have only MULTIPLY HALFWORD IMMEDIATE, with a signed 16-bit. */ return (s390_facilities & FACILITY_GEN_INST_EXT ? &r_0_ri : &r_0_rI); case INDEX_op_mul_i64: return (s390_facilities & FACILITY_GEN_INST_EXT ? &r_0_rJ : &r_0_rI); case INDEX_op_or_i32: case INDEX_op_or_i64: return &r_0_rO; case INDEX_op_xor_i32: case INDEX_op_xor_i64: return &r_0_rX; case INDEX_op_and_i32: case INDEX_op_and_i64: return &r_0_ri; case INDEX_op_shl_i32: case INDEX_op_shr_i32: case INDEX_op_sar_i32: return &r_0_ri; case INDEX_op_shl_i64: case INDEX_op_shr_i64: case INDEX_op_sar_i64: return &r_r_ri; case INDEX_op_rotl_i32: case INDEX_op_rotl_i64: case INDEX_op_rotr_i32: case INDEX_op_rotr_i64: return &r_r_ri; case INDEX_op_brcond_i32: /* Without EXT_IMM, only the LOAD AND TEST insn is available. */ return (s390_facilities & FACILITY_EXT_IMM ? &r_ri : &r_rZ); case INDEX_op_brcond_i64: return (s390_facilities & FACILITY_EXT_IMM ? &r_rC : &r_rZ); case INDEX_op_bswap16_i32: case INDEX_op_bswap16_i64: case INDEX_op_bswap32_i32: case INDEX_op_bswap32_i64: case INDEX_op_bswap64_i64: case INDEX_op_neg_i32: case INDEX_op_neg_i64: case INDEX_op_ext8s_i32: case INDEX_op_ext8s_i64: case INDEX_op_ext8u_i32: case INDEX_op_ext8u_i64: case INDEX_op_ext16s_i32: case INDEX_op_ext16s_i64: case INDEX_op_ext16u_i32: case INDEX_op_ext16u_i64: case INDEX_op_ext32s_i64: case INDEX_op_ext32u_i64: case INDEX_op_ext_i32_i64: case INDEX_op_extu_i32_i64: case INDEX_op_extract_i32: case INDEX_op_extract_i64: return &r_r; case INDEX_op_clz_i64: return &r_r_ri; case INDEX_op_qemu_ld_i32: case INDEX_op_qemu_ld_i64: return &r_L; case INDEX_op_qemu_st_i64: case INDEX_op_qemu_st_i32: return &L_L; case INDEX_op_deposit_i32: case INDEX_op_deposit_i64: { static const TCGTargetOpDef dep = { .args_ct_str = { "r", "rZ", "r" } }; return &dep; } case INDEX_op_setcond_i32: case INDEX_op_setcond_i64: { /* Without EXT_IMM, only the LOAD AND TEST insn is available. */ static const TCGTargetOpDef setc_z = { .args_ct_str = { "r", "r", "rZ" } }; static const TCGTargetOpDef setc_c = { .args_ct_str = { "r", "r", "rC" } }; return (s390_facilities & FACILITY_EXT_IMM ? &setc_c : &setc_z); } case INDEX_op_movcond_i32: case INDEX_op_movcond_i64: { /* Without EXT_IMM, only the LOAD AND TEST insn is available. */ static const TCGTargetOpDef movc_z = { .args_ct_str = { "r", "r", "rZ", "r", "0" } }; static const TCGTargetOpDef movc_c = { .args_ct_str = { "r", "r", "rC", "r", "0" } }; return (s390_facilities & FACILITY_EXT_IMM ? &movc_c : &movc_z); } case INDEX_op_div2_i32: case INDEX_op_div2_i64: case INDEX_op_divu2_i32: case INDEX_op_divu2_i64: { static const TCGTargetOpDef div2 = { .args_ct_str = { "b", "a", "0", "1", "r" } }; return &div2; } case INDEX_op_mulu2_i64: { static const TCGTargetOpDef mul2 = { .args_ct_str = { "b", "a", "0", "r" } }; return &mul2; } case INDEX_op_add2_i32: case INDEX_op_add2_i64: case INDEX_op_sub2_i32: case INDEX_op_sub2_i64: { static const TCGTargetOpDef arith2 = { .args_ct_str = { "r", "r", "0", "1", "rA", "r" } }; return &arith2; } default: break; } return NULL; }


void portio_list_del(PortioList *piolist) { MemoryRegion *mr, *alias; unsigned i; for (i = 0; i < piolist->nr; ++i) { mr = piolist->regions[i]; alias = piolist->aliases[i]; memory_region_del_subregion(piolist->address_space, alias); memory_region_destroy(alias); memory_region_destroy(mr); g_free((MemoryRegionOps *)mr->ops); g_free(mr); g_free(alias); piolist->regions[i] = NULL; piolist->aliases[i] = NULL; } }


static void set_gsi(KVMState *s, unsigned int gsi) { assert(gsi < s->max_gsi); s->used_gsi_bitmap[gsi / 32] |= 1U << (gsi % 32); }


void arm_cpu_do_interrupt(CPUState *cs) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; uint32_t addr; uint32_t mask; int new_mode; uint32_t offset; uint32_t moe; assert(!IS_M(env)); arm_log_exception(cs->exception_index); if (arm_is_psci_call(cpu, cs->exception_index)) { arm_handle_psci_call(cpu); qemu_log_mask(CPU_LOG_INT, "...handled as PSCI call\n"); return; } /* If this is a debug exception we must update the DBGDSCR.MOE bits */ switch (env->exception.syndrome >> ARM_EL_EC_SHIFT) { case EC_BREAKPOINT: case EC_BREAKPOINT_SAME_EL: moe = 1; break; case EC_WATCHPOINT: case EC_WATCHPOINT_SAME_EL: moe = 10; break; case EC_AA32_BKPT: moe = 3; break; case EC_VECTORCATCH: moe = 5; break; default: moe = 0; break; } if (moe) { env->cp15.mdscr_el1 = deposit64(env->cp15.mdscr_el1, 2, 4, moe); } /* TODO: Vectored interrupt controller. */ switch (cs->exception_index) { case EXCP_UDEF: new_mode = ARM_CPU_MODE_UND; addr = 0x04; mask = CPSR_I; if (env->thumb) offset = 2; else offset = 4; break; case EXCP_SWI: if (semihosting_enabled) { /* Check for semihosting interrupt. */ if (env->thumb) { mask = arm_lduw_code(env, env->regs[15] - 2, env->bswap_code) & 0xff; } else { mask = arm_ldl_code(env, env->regs[15] - 4, env->bswap_code) & 0xffffff; } /* Only intercept calls from privileged modes, to provide some semblance of security. */ if (((mask == 0x123456 && !env->thumb) || (mask == 0xab && env->thumb)) && (env->uncached_cpsr & CPSR_M) != ARM_CPU_MODE_USR) { env->regs[0] = do_arm_semihosting(env); qemu_log_mask(CPU_LOG_INT, "...handled as semihosting call\n"); return; } } new_mode = ARM_CPU_MODE_SVC; addr = 0x08; mask = CPSR_I; /* The PC already points to the next instruction. */ offset = 0; break; case EXCP_BKPT: /* See if this is a semihosting syscall. */ if (env->thumb && semihosting_enabled) { mask = arm_lduw_code(env, env->regs[15], env->bswap_code) & 0xff; if (mask == 0xab && (env->uncached_cpsr & CPSR_M) != ARM_CPU_MODE_USR) { env->regs[15] += 2; env->regs[0] = do_arm_semihosting(env); qemu_log_mask(CPU_LOG_INT, "...handled as semihosting call\n"); return; } } env->exception.fsr = 2; /* Fall through to prefetch abort. */ case EXCP_PREFETCH_ABORT: env->cp15.ifsr_el2 = env->exception.fsr; env->cp15.far_el[1] = deposit64(env->cp15.far_el[1], 32, 32, env->exception.vaddress); qemu_log_mask(CPU_LOG_INT, "...with IFSR 0x%x IFAR 0x%x\n", env->cp15.ifsr_el2, (uint32_t)env->exception.vaddress); new_mode = ARM_CPU_MODE_ABT; addr = 0x0c; mask = CPSR_A | CPSR_I; offset = 4; break; case EXCP_DATA_ABORT: env->cp15.esr_el[1] = env->exception.fsr; env->cp15.far_el[1] = deposit64(env->cp15.far_el[1], 0, 32, env->exception.vaddress); qemu_log_mask(CPU_LOG_INT, "...with DFSR 0x%x DFAR 0x%x\n", (uint32_t)env->cp15.esr_el[1], (uint32_t)env->exception.vaddress); new_mode = ARM_CPU_MODE_ABT; addr = 0x10; mask = CPSR_A | CPSR_I; offset = 8; break; case EXCP_IRQ: new_mode = ARM_CPU_MODE_IRQ; addr = 0x18; /* Disable IRQ and imprecise data aborts. */ mask = CPSR_A | CPSR_I; offset = 4; if (env->cp15.scr_el3 & SCR_IRQ) { /* IRQ routed to monitor mode */ new_mode = ARM_CPU_MODE_MON; mask |= CPSR_F; } break; case EXCP_FIQ: new_mode = ARM_CPU_MODE_FIQ; addr = 0x1c; /* Disable FIQ, IRQ and imprecise data aborts. */ mask = CPSR_A | CPSR_I | CPSR_F; if (env->cp15.scr_el3 & SCR_FIQ) { /* FIQ routed to monitor mode */ new_mode = ARM_CPU_MODE_MON; } offset = 4; break; case EXCP_SMC: new_mode = ARM_CPU_MODE_MON; addr = 0x08; mask = CPSR_A | CPSR_I | CPSR_F; offset = 0; break; default: cpu_abort(cs, "Unhandled exception 0x%x\n", cs->exception_index); return; /* Never happens. Keep compiler happy. */ } if (new_mode == ARM_CPU_MODE_MON) { addr += env->cp15.mvbar; } else if (A32_BANKED_CURRENT_REG_GET(env, sctlr) & SCTLR_V) { /* High vectors. When enabled, base address cannot be remapped. */ addr += 0xffff0000; } else { /* ARM v7 architectures provide a vector base address register to remap * the interrupt vector table. * This register is only followed in non-monitor mode, and is banked. * Note: only bits 31:5 are valid. */ addr += env->cp15.vbar_el[1]; } if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON) { env->cp15.scr_el3 &= ~SCR_NS; } switch_mode (env, new_mode); /* For exceptions taken to AArch32 we must clear the SS bit in both * PSTATE and in the old-state value we save to SPSR_<mode>, so zero it now. */ env->uncached_cpsr &= ~PSTATE_SS; env->spsr = cpsr_read(env); /* Clear IT bits. */ env->condexec_bits = 0; /* Switch to the new mode, and to the correct instruction set. */ env->uncached_cpsr = (env->uncached_cpsr & ~CPSR_M) | new_mode; env->daif |= mask; /* this is a lie, as the was no c1_sys on V4T/V5, but who cares * and we should just guard the thumb mode on V4 */ if (arm_feature(env, ARM_FEATURE_V4T)) { env->thumb = (A32_BANKED_CURRENT_REG_GET(env, sctlr) & SCTLR_TE) != 0; } env->regs[14] = env->regs[15] + offset; env->regs[15] = addr; cs->interrupt_request |= CPU_INTERRUPT_EXITTB; }


static void fdt_add_gic_node(VirtBoardInfo *vbi) { vbi->gic_phandle = qemu_fdt_alloc_phandle(vbi->fdt); qemu_fdt_setprop_cell(vbi->fdt, "/", "interrupt-parent", vbi->gic_phandle); qemu_fdt_add_subnode(vbi->fdt, "/intc"); /* 'cortex-a15-gic' means 'GIC v2' */ qemu_fdt_setprop_string(vbi->fdt, "/intc", "compatible", "arm,cortex-a15-gic"); qemu_fdt_setprop_cell(vbi->fdt, "/intc", "#interrupt-cells", 3); qemu_fdt_setprop(vbi->fdt, "/intc", "interrupt-controller", NULL, 0); qemu_fdt_setprop_sized_cells(vbi->fdt, "/intc", "reg", 2, vbi->memmap[VIRT_GIC_DIST].base, 2, vbi->memmap[VIRT_GIC_DIST].size, 2, vbi->memmap[VIRT_GIC_CPU].base, 2, vbi->memmap[VIRT_GIC_CPU].size); qemu_fdt_setprop_cell(vbi->fdt, "/intc", "#address-cells", 0x2); qemu_fdt_setprop_cell(vbi->fdt, "/intc", "#size-cells", 0x2); qemu_fdt_setprop(vbi->fdt, "/intc", "ranges", NULL, 0); qemu_fdt_setprop_cell(vbi->fdt, "/intc", "phandle", vbi->gic_phandle); }


static int sad_hpel_motion_search(MpegEncContext * s, int *mx_ptr, int *my_ptr, int dmin, int src_index, int ref_index, int size, int h) { MotionEstContext * const c= &s->me; const int penalty_factor= c->sub_penalty_factor; int mx, my, dminh; uint8_t *pix, *ptr; int stride= c->stride; LOAD_COMMON av_assert2(c->sub_flags == 0); if(c->skip){ *mx_ptr = 0; *my_ptr = 0; return dmin; } pix = c->src[src_index][0]; mx = *mx_ptr; my = *my_ptr; ptr = c->ref[ref_index][0] + (my * stride) + mx; dminh = dmin; if (mx > xmin && mx < xmax && my > ymin && my < ymax) { int dx=0, dy=0; int d, pen_x, pen_y; const int index= (my<<ME_MAP_SHIFT) + mx; const int t= score_map[(index-(1<<ME_MAP_SHIFT))&(ME_MAP_SIZE-1)]; const int l= score_map[(index- 1 )&(ME_MAP_SIZE-1)]; const int r= score_map[(index+ 1 )&(ME_MAP_SIZE-1)]; const int b= score_map[(index+(1<<ME_MAP_SHIFT))&(ME_MAP_SIZE-1)]; mx<<=1; my<<=1; pen_x= pred_x + mx; pen_y= pred_y + my; ptr-= stride; if(t<=b){ CHECK_SAD_HALF_MV(y2 , 0, -1) if(l<=r){ CHECK_SAD_HALF_MV(xy2, -1, -1) if(t+r<=b+l){ CHECK_SAD_HALF_MV(xy2, +1, -1) ptr+= stride; }else{ ptr+= stride; CHECK_SAD_HALF_MV(xy2, -1, +1) } CHECK_SAD_HALF_MV(x2 , -1, 0) }else{ CHECK_SAD_HALF_MV(xy2, +1, -1) if(t+l<=b+r){ CHECK_SAD_HALF_MV(xy2, -1, -1) ptr+= stride; }else{ ptr+= stride; CHECK_SAD_HALF_MV(xy2, +1, +1) } CHECK_SAD_HALF_MV(x2 , +1, 0) } }else{ if(l<=r){ if(t+l<=b+r){ CHECK_SAD_HALF_MV(xy2, -1, -1) ptr+= stride; }else{ ptr+= stride; CHECK_SAD_HALF_MV(xy2, +1, +1) } CHECK_SAD_HALF_MV(x2 , -1, 0) CHECK_SAD_HALF_MV(xy2, -1, +1) }else{ if(t+r<=b+l){ CHECK_SAD_HALF_MV(xy2, +1, -1) ptr+= stride; }else{ ptr+= stride; CHECK_SAD_HALF_MV(xy2, -1, +1) } CHECK_SAD_HALF_MV(x2 , +1, 0) CHECK_SAD_HALF_MV(xy2, +1, +1) } CHECK_SAD_HALF_MV(y2 , 0, +1) } mx+=dx; my+=dy; }else{ mx<<=1; my<<=1; } *mx_ptr = mx; *my_ptr = my; return dminh; }


int kvm_arch_on_sigbus_vcpu(CPUState *env, int code, void *addr) { #ifdef KVM_CAP_MCE void *vaddr; ram_addr_t ram_addr; target_phys_addr_t paddr; if ((env->mcg_cap & MCG_SER_P) && addr && (code == BUS_MCEERR_AR || code == BUS_MCEERR_AO)) { vaddr = (void *)addr; if (qemu_ram_addr_from_host(vaddr, &ram_addr) || !kvm_physical_memory_addr_from_ram(env->kvm_state, ram_addr, &paddr)) { fprintf(stderr, "Hardware memory error for memory used by " "QEMU itself instead of guest system!\n"); /* Hope we are lucky for AO MCE */ if (code == BUS_MCEERR_AO) { return 0; } else { hardware_memory_error(); } } if (code == BUS_MCEERR_AR) { /* Fake an Intel architectural Data Load SRAR UCR */ kvm_mce_inj_srar_dataload(env, paddr); } else { /* * If there is an MCE excpetion being processed, ignore * this SRAO MCE */ if (!kvm_mce_in_progress(env)) { /* Fake an Intel architectural Memory scrubbing UCR */ kvm_mce_inj_srao_memscrub(env, paddr); } } } else #endif /* KVM_CAP_MCE */ { if (code == BUS_MCEERR_AO) { return 0; } else if (code == BUS_MCEERR_AR) { hardware_memory_error(); } else { return 1; } } return 0; }


void ff_flac_compute_autocorr(const int32_t *data, int len, int lag, double *autoc) { int i, j; double tmp[len + lag + 1]; double *data1= tmp + lag; apply_welch_window(data, len, data1); for(j=0; j<lag; j++) data1[j-lag]= 0.0; data1[len] = 0.0; for(j=0; j<lag; j+=2){ double sum0 = 1.0, sum1 = 1.0; for(i=0; i<len; i++){ sum0 += data1[i] * data1[i-j]; sum1 += data1[i] * data1[i-j-1]; } autoc[j ] = sum0; autoc[j+1] = sum1; } if(j==lag){ double sum = 1.0; for(i=0; i<len; i+=2){ sum += data1[i ] * data1[i-j ] + data1[i+1] * data1[i-j+1]; } autoc[j] = sum; } }


static unsigned int rms(const int *data) { int x; unsigned int res = 0x10000; int b = 0; for (x=0; x<10; x++) { res = (((0x1000000 - (*data) * (*data)) >> 12) * res) >> 12; if (res == 0) return 0; while (res <= 0x3fff) { b++; res <<= 2; } data++; } if (res > 0) res = t_sqrt(res); res >>= (b + 10); return res; }


void remove_migration_state_change_notifier(Notifier *notify) { notifier_remove(notify); }


static void mm_decode_inter(MmContext * s, int half_horiz, int half_vert, const uint8_t *buf, int buf_size) { const int data_ptr = 2 + AV_RL16(&buf[0]); int d, r, y; d = data_ptr; r = 2; y = 0; while(r < data_ptr) { int i, j; int length = buf[r] & 0x7f; int x = buf[r+1] + ((buf[r] & 0x80) << 1); r += 2; if (length==0) { y += x; continue; } for(i=0; i<length; i++) { for(j=0; j<8; j++) { int replace = (buf[r+i] >> (7-j)) & 1; if (replace) { int color = buf[d]; s->frame.data[0][y*s->frame.linesize[0] + x] = color; if (half_horiz) s->frame.data[0][y*s->frame.linesize[0] + x + 1] = color; if (half_vert) { s->frame.data[0][(y+1)*s->frame.linesize[0] + x] = color; if (half_horiz) s->frame.data[0][(y+1)*s->frame.linesize[0] + x + 1] = color; } d++; } x += 1 + half_horiz; } } r += length; y += 1 + half_vert; } }


static void test_tco_ticks_counter(void) { TestData d; uint16_t ticks = TCO_SECS_TO_TICKS(8); uint16_t rld; d.args = NULL; d.noreboot = true; test_init(&d); stop_tco(&d); clear_tco_status(&d); reset_on_second_timeout(false); set_tco_timeout(&d, ticks); load_tco(&d); start_tco(&d); do { rld = qpci_io_readw(d.dev, d.tco_io_bar, TCO_RLD) & TCO_RLD_MASK; g_assert_cmpint(rld, ==, ticks); clock_step(TCO_TICK_NSEC); ticks--; } while (!(qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS) & TCO_TIMEOUT)); stop_tco(&d); qtest_end(); }


static void decode_mb(MpegEncContext *s, int ref) { s->dest[0] = s->current_picture.f.data[0] + (s->mb_y * 16 * s->linesize) + s->mb_x * 16; s->dest[1] = s->current_picture.f.data[1] + (s->mb_y * (16 >> s->chroma_y_shift) * s->uvlinesize) + s->mb_x * (16 >> s->chroma_x_shift); s->dest[2] = s->current_picture.f.data[2] + (s->mb_y * (16 >> s->chroma_y_shift) * s->uvlinesize) + s->mb_x * (16 >> s->chroma_x_shift); ff_init_block_index(s); ff_update_block_index(s); s->dest[1] += (16 >> s->chroma_x_shift) - 8; s->dest[2] += (16 >> s->chroma_x_shift) - 8; if (CONFIG_H264_DECODER && s->codec_id == AV_CODEC_ID_H264) { H264Context *h = (void*)s; h->mb_xy = s->mb_x + s->mb_y * s->mb_stride; memset(h->non_zero_count_cache, 0, sizeof(h->non_zero_count_cache)); av_assert1(ref >= 0); /* FIXME: It is possible albeit uncommon that slice references * differ between slices. We take the easy approach and ignore * it for now. If this turns out to have any relevance in * practice then correct remapping should be added. */ if (ref >= h->ref_count[0]) ref = 0; if (!h->ref_list[0][ref].f.data[0]) { av_log(s->avctx, AV_LOG_DEBUG, "Reference not available for error concealing\n"); ref = 0; fill_rectangle(&s->current_picture.f.ref_index[0][4 * h->mb_xy], 2, 2, 2, ref, 1); fill_rectangle(&h->ref_cache[0][scan8[0]], 4, 4, 8, ref, 1); fill_rectangle(h->mv_cache[0][scan8[0]], 4, 4, 8, pack16to32(s->mv[0][0][0], s->mv[0][0][1]), 4); h->mb_mbaff = h->mb_field_decoding_flag = 0; ff_h264_hl_decode_mb(h); } else { assert(ref == 0); ff_MPV_decode_mb(s, s->block);


static int alloc_cluster_link_l2(BlockDriverState *bs, uint64_t cluster_offset, QCowL2Meta *m) { BDRVQcowState *s = bs->opaque; int i, j = 0, l2_index, ret; uint64_t *old_cluster, start_sect, l2_offset, *l2_table; if (m->nb_clusters == 0) return 0; old_cluster = qemu_malloc(m->nb_clusters * sizeof(uint64_t)); /* copy content of unmodified sectors */ start_sect = (m->offset & ~(s->cluster_size - 1)) >> 9; if (m->n_start) { ret = copy_sectors(bs, start_sect, cluster_offset, 0, m->n_start); if (ret < 0) goto err; } if (m->nb_available & (s->cluster_sectors - 1)) { uint64_t end = m->nb_available & ~(uint64_t)(s->cluster_sectors - 1); ret = copy_sectors(bs, start_sect + end, cluster_offset + (end << 9), m->nb_available - end, s->cluster_sectors); if (ret < 0) goto err; } ret = -EIO; /* update L2 table */ if (!get_cluster_table(bs, m->offset, &l2_table, &l2_offset, &l2_index)) goto err; for (i = 0; i < m->nb_clusters; i++) { if(l2_table[l2_index + i] != 0) old_cluster[j++] = l2_table[l2_index + i]; l2_table[l2_index + i] = cpu_to_be64((cluster_offset + (i << s->cluster_bits)) | QCOW_OFLAG_COPIED); } if (bdrv_pwrite(s->hd, l2_offset + l2_index * sizeof(uint64_t), l2_table + l2_index, m->nb_clusters * sizeof(uint64_t)) != m->nb_clusters * sizeof(uint64_t)) goto err; for (i = 0; i < j; i++) free_any_clusters(bs, old_cluster[i], 1); ret = 0; err: qemu_free(old_cluster); return ret; }


int av_set_options_string(void *ctx, const char *opts, const char *key_val_sep, const char *pairs_sep) { int ret, count = 0; while (*opts) { if ((ret = parse_key_value_pair(ctx, &opts, key_val_sep, pairs_sep)) < 0) return ret; count++; if (*opts) opts++; } return count; }


static int local_chmod(FsContext *fs_ctx, V9fsPath *fs_path, FsCred *credp) { char *buffer; int ret = -1; char *path = fs_path->data; if (fs_ctx->export_flags & V9FS_SM_MAPPED) { buffer = rpath(fs_ctx, path); ret = local_set_xattr(buffer, credp); g_free(buffer); } else if (fs_ctx->export_flags & V9FS_SM_MAPPED_FILE) { return local_set_mapped_file_attr(fs_ctx, path, credp); } else if ((fs_ctx->export_flags & V9FS_SM_PASSTHROUGH) || (fs_ctx->export_flags & V9FS_SM_NONE)) { buffer = rpath(fs_ctx, path); ret = chmod(buffer, credp->fc_mode); g_free(buffer); } return ret; }


static int dpcm_decode_frame(AVCodecContext *avctx, void *data, int *data_size, uint8_t *buf, int buf_size) { DPCMContext *s = avctx->priv_data; int in, out = 0; int predictor[2]; int channel_number = 0; short *output_samples = data; int shift[2]; unsigned char byte; short diff; if (!buf_size) return 0; // almost every DPCM variant expands one byte of data into two if(*data_size/2 < buf_size) switch(avctx->codec->id) { case CODEC_ID_ROQ_DPCM: if (s->channels == 1) predictor[0] = AV_RL16(&buf[6]); else { predictor[0] = buf[7] << 8; predictor[1] = buf[6] << 8; } SE_16BIT(predictor[0]); SE_16BIT(predictor[1]); /* decode the samples */ for (in = 8, out = 0; in < buf_size; in++, out++) { predictor[channel_number] += s->roq_square_array[buf[in]]; predictor[channel_number] = av_clip_int16(predictor[channel_number]); output_samples[out] = predictor[channel_number]; /* toggle channel */ channel_number ^= s->channels - 1; } break; case CODEC_ID_INTERPLAY_DPCM: in = 6; /* skip over the stream mask and stream length */ predictor[0] = AV_RL16(&buf[in]); in += 2; SE_16BIT(predictor[0]) output_samples[out++] = predictor[0]; if (s->channels == 2) { predictor[1] = AV_RL16(&buf[in]); in += 2; SE_16BIT(predictor[1]) output_samples[out++] = predictor[1]; } while (in < buf_size) { predictor[channel_number] += interplay_delta_table[buf[in++]]; predictor[channel_number] = av_clip_int16(predictor[channel_number]); output_samples[out++] = predictor[channel_number]; /* toggle channel */ channel_number ^= s->channels - 1; } break; case CODEC_ID_XAN_DPCM: in = 0; shift[0] = shift[1] = 4; predictor[0] = AV_RL16(&buf[in]); in += 2; SE_16BIT(predictor[0]); if (s->channels == 2) { predictor[1] = AV_RL16(&buf[in]); in += 2; SE_16BIT(predictor[1]); } while (in < buf_size) { byte = buf[in++]; diff = (byte & 0xFC) << 8; if ((byte & 0x03) == 3) shift[channel_number]++; else shift[channel_number] -= (2 * (byte & 3)); /* saturate the shifter to a lower limit of 0 */ if (shift[channel_number] < 0) shift[channel_number] = 0; diff >>= shift[channel_number]; predictor[channel_number] += diff; predictor[channel_number] = av_clip_int16(predictor[channel_number]); output_samples[out++] = predictor[channel_number]; /* toggle channel */ channel_number ^= s->channels - 1; } break; case CODEC_ID_SOL_DPCM: in = 0; if (avctx->codec_tag != 3) { while (in < buf_size) { int n1, n2; n1 = (buf[in] >> 4) & 0xF; n2 = buf[in++] & 0xF; s->sample[0] += s->sol_table[n1]; if (s->sample[0] < 0) s->sample[0] = 0; if (s->sample[0] > 255) s->sample[0] = 255; output_samples[out++] = (s->sample[0] - 128) << 8; s->sample[s->channels - 1] += s->sol_table[n2]; if (s->sample[s->channels - 1] < 0) s->sample[s->channels - 1] = 0; if (s->sample[s->channels - 1] > 255) s->sample[s->channels - 1] = 255; output_samples[out++] = (s->sample[s->channels - 1] - 128) << 8; } } else { while (in < buf_size) { int n; n = buf[in++]; if (n & 0x80) s->sample[channel_number] -= s->sol_table[n & 0x7F]; else s->sample[channel_number] += s->sol_table[n & 0x7F]; s->sample[channel_number] = av_clip_int16(s->sample[channel_number]); output_samples[out++] = s->sample[channel_number]; /* toggle channel */ channel_number ^= s->channels - 1; } } break; } *data_size = out * sizeof(short); return buf_size; }


static void kvm_reset_vcpu(void *opaque) { CPUState *env = opaque; kvm_arch_reset_vcpu(env); if (kvm_arch_put_registers(env)) { fprintf(stderr, "Fatal: kvm vcpu reset failed\n"); abort(); } }


static int parse_cube(AVFilterContext *ctx, FILE *f) { LUT3DContext *lut3d = ctx->priv; char line[MAX_LINE_SIZE]; float min[3] = {0.0, 0.0, 0.0}; float max[3] = {1.0, 1.0, 1.0}; while (fgets(line, sizeof(line), f)) { if (!strncmp(line, "LUT_3D_SIZE ", 12)) { int i, j, k; const int size = strtol(line + 12, NULL, 0); if (size > MAX_LEVEL) { av_log(ctx, AV_LOG_ERROR, "Too large 3D LUT\n"); return AVERROR(EINVAL); } lut3d->lutsize = size; for (k = 0; k < size; k++) { for (j = 0; j < size; j++) { for (i = 0; i < size; i++) { struct rgbvec *vec = &lut3d->lut[k][j][i]; do { NEXT_LINE(0); if (!strncmp(line, "DOMAIN_", 7)) { float *vals = NULL; if (!strncmp(line + 7, "MIN ", 4)) vals = min; else if (!strncmp(line + 7, "MAX ", 4)) vals = max; if (!vals) return AVERROR_INVALIDDATA; sscanf(line + 11, "%f %f %f", vals, vals + 1, vals + 2); av_log(ctx, AV_LOG_DEBUG, "min: %f %f %f | max: %f %f %f\n", min[0], min[1], min[2], max[0], max[1], max[2]); continue; } } while (skip_line(line)); if (sscanf(line, "%f %f %f", &vec->r, &vec->g, &vec->b) != 3) return AVERROR_INVALIDDATA; vec->r *= max[0] - min[0]; vec->g *= max[1] - min[1]; vec->b *= max[2] - min[2]; } } } break; } } return 0; }


static void csrhci_in_packet(struct csrhci_s *s, uint8_t *pkt) { uint8_t *rpkt; int opc; switch (*pkt ++) { case H4_CMD_PKT: opc = le16_to_cpu(((struct hci_command_hdr *) pkt)->opcode); if (cmd_opcode_ogf(opc) == OGF_VENDOR_CMD) { csrhci_in_packet_vendor(s, cmd_opcode_ocf(opc), pkt + sizeof(struct hci_command_hdr), s->in_len - sizeof(struct hci_command_hdr) - 1); return; } /* TODO: if the command is OCF_READ_LOCAL_COMMANDS or the likes, * we need to send it to the HCI layer and then add our supported * commands to the returned mask (such as OGF_VENDOR_CMD). With * bt-hci.c we could just have hooks for this kind of commands but * we can't with bt-host.c. */ s->hci->cmd_send(s->hci, pkt, s->in_len - 1); break; case H4_EVT_PKT: goto bad_pkt; case H4_ACL_PKT: s->hci->acl_send(s->hci, pkt, s->in_len - 1); break; case H4_SCO_PKT: s->hci->sco_send(s->hci, pkt, s->in_len - 1); break; case H4_NEG_PKT: if (s->in_hdr != sizeof(csrhci_neg_packet) || memcmp(pkt - 1, csrhci_neg_packet, s->in_hdr)) { fprintf(stderr, "%s: got a bad NEG packet\n", __func__); return; } pkt += 2; rpkt = csrhci_out_packet_csr(s, H4_NEG_PKT, 10); *rpkt ++ = 0x20; /* Operational settings negotiation Ok */ memcpy(rpkt, pkt, 7); rpkt += 7; *rpkt ++ = 0xff; *rpkt = 0xff; break; case H4_ALIVE_PKT: if (s->in_hdr != 4 || pkt[1] != 0x55 || pkt[2] != 0x00) { fprintf(stderr, "%s: got a bad ALIVE packet\n", __func__); return; } rpkt = csrhci_out_packet_csr(s, H4_ALIVE_PKT, 2); *rpkt ++ = 0xcc; *rpkt = 0x00; break; default: bad_pkt: /* TODO: error out */ fprintf(stderr, "%s: got a bad packet\n", __func__); break; } csrhci_fifo_wake(s); }


static int client_migrate_info(Monitor *mon, const QDict *qdict, QObject **ret_data) { const char *protocol = qdict_get_str(qdict, "protocol"); const char *hostname = qdict_get_str(qdict, "hostname"); const char *subject = qdict_get_try_str(qdict, "cert-subject"); int port = qdict_get_try_int(qdict, "port", -1); int tls_port = qdict_get_try_int(qdict, "tls-port", -1); Error *err = NULL; int ret; if (strcmp(protocol, "spice") == 0) { if (!qemu_using_spice(&err)) { qerror_report_err(err); error_free(err); return -1; } if (port == -1 && tls_port == -1) { qerror_report(QERR_MISSING_PARAMETER, "port/tls-port"); return -1; } ret = qemu_spice_migrate_info(hostname, port, tls_port, subject); if (ret != 0) { qerror_report(QERR_UNDEFINED_ERROR); return -1; } return 0; } qerror_report(QERR_INVALID_PARAMETER, "protocol"); return -1; }


void backup_start(BlockDriverState *bs, BlockDriverState *target, int64_t speed, BlockdevOnError on_source_error, BlockdevOnError on_target_error, BlockDriverCompletionFunc *cb, void *opaque, Error **errp) { int64_t len; assert(bs); assert(target); assert(cb); if ((on_source_error == BLOCKDEV_ON_ERROR_STOP || on_source_error == BLOCKDEV_ON_ERROR_ENOSPC) && !bdrv_iostatus_is_enabled(bs)) { error_set(errp, QERR_INVALID_PARAMETER, "on-source-error"); return; } len = bdrv_getlength(bs); if (len < 0) { error_setg_errno(errp, -len, "unable to get length for '%s'", bdrv_get_device_name(bs)); return; } BackupBlockJob *job = block_job_create(&backup_job_type, bs, speed, cb, opaque, errp); if (!job) { return; } job->on_source_error = on_source_error; job->on_target_error = on_target_error; job->target = target; job->common.len = len; job->common.co = qemu_coroutine_create(backup_run); qemu_coroutine_enter(job->common.co, job); }


void ff_init_block_index(MpegEncContext *s){ //FIXME maybe rename const int linesize = s->current_picture.f->linesize[0]; //not s->linesize as this would be wrong for field pics const int uvlinesize = s->current_picture.f->linesize[1]; const int mb_size= 4; s->block_index[0]= s->b8_stride*(s->mb_y*2 ) - 2 + s->mb_x*2; s->block_index[1]= s->b8_stride*(s->mb_y*2 ) - 1 + s->mb_x*2; s->block_index[2]= s->b8_stride*(s->mb_y*2 + 1) - 2 + s->mb_x*2; s->block_index[3]= s->b8_stride*(s->mb_y*2 + 1) - 1 + s->mb_x*2; s->block_index[4]= s->mb_stride*(s->mb_y + 1) + s->b8_stride*s->mb_height*2 + s->mb_x - 1; s->block_index[5]= s->mb_stride*(s->mb_y + s->mb_height + 2) + s->b8_stride*s->mb_height*2 + s->mb_x - 1; //block_index is not used by mpeg2, so it is not affected by chroma_format s->dest[0] = s->current_picture.f->data[0] + ((s->mb_x - 1) << mb_size); s->dest[1] = s->current_picture.f->data[1] + ((s->mb_x - 1) << (mb_size - s->chroma_x_shift)); s->dest[2] = s->current_picture.f->data[2] + ((s->mb_x - 1) << (mb_size - s->chroma_x_shift)); if(!(s->pict_type==AV_PICTURE_TYPE_B && s->avctx->draw_horiz_band && s->picture_structure==PICT_FRAME)) { if(s->picture_structure==PICT_FRAME){ s->dest[0] += s->mb_y * linesize << mb_size; s->dest[1] += s->mb_y * uvlinesize << (mb_size - s->chroma_y_shift); s->dest[2] += s->mb_y * uvlinesize << (mb_size - s->chroma_y_shift); }else{ s->dest[0] += (s->mb_y>>1) * linesize << mb_size; s->dest[1] += (s->mb_y>>1) * uvlinesize << (mb_size - s->chroma_y_shift); s->dest[2] += (s->mb_y>>1) * uvlinesize << (mb_size - s->chroma_y_shift); assert((s->mb_y&1) == (s->picture_structure == PICT_BOTTOM_FIELD)); } } }


int qemu_chr_fe_write_all(CharDriverState *s, const uint8_t *buf, int len) { int offset = 0; int res = 0; qemu_mutex_lock(&s->chr_write_lock); while (offset < len) { do { res = s->chr_write(s, buf + offset, len - offset); if (res == -1 && errno == EAGAIN) { g_usleep(100); } } while (res == -1 && errno == EAGAIN); if (res <= 0) { break; } offset += res; } if (offset > 0) { qemu_chr_fe_write_log(s, buf, offset); } qemu_mutex_unlock(&s->chr_write_lock); if (res < 0) { return res; } return offset; }


static GenericList *qmp_output_next_list(Visitor *v, GenericList *tail, size_t size) { return tail->next; }


int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr, int rw, int access_type) { int ret; #if 0 qemu_log("%s\n", __func__); #endif if ((access_type == ACCESS_CODE && msr_ir == 0) || (access_type != ACCESS_CODE && msr_dr == 0)) { /* No address translation */ ret = check_physical(env, ctx, eaddr, rw); } else { ret = -1; switch (env->mmu_model) { case POWERPC_MMU_32B: case POWERPC_MMU_601: case POWERPC_MMU_SOFT_6xx: case POWERPC_MMU_SOFT_74xx: #if defined(TARGET_PPC64) case POWERPC_MMU_620: case POWERPC_MMU_64B: #endif /* Try to find a BAT */ if (env->nb_BATs != 0) ret = get_bat(env, ctx, eaddr, rw, access_type); if (ret < 0) { /* We didn't match any BAT entry or don't have BATs */ ret = get_segment(env, ctx, eaddr, rw, access_type); } break; case POWERPC_MMU_SOFT_4xx: case POWERPC_MMU_SOFT_4xx_Z: ret = mmu40x_get_physical_address(env, ctx, eaddr, rw, access_type); break; case POWERPC_MMU_BOOKE: ret = mmubooke_get_physical_address(env, ctx, eaddr, rw, access_type); break; case POWERPC_MMU_MPC8xx: /* XXX: TODO */ cpu_abort(env, "MPC8xx MMU model is not implemented\n"); break; case POWERPC_MMU_BOOKE_FSL: /* XXX: TODO */ cpu_abort(env, "BookE FSL MMU model not implemented\n"); return -1; case POWERPC_MMU_REAL: cpu_abort(env, "PowerPC in real mode do not do any translation\n"); return -1; default: cpu_abort(env, "Unknown or invalid MMU model\n"); return -1; } } #if 0 qemu_log("%s address " ADDRX " => %d " PADDRX "\n", __func__, eaddr, ret, ctx->raddr); #endif return ret; }


static unsigned int dec_btstq(DisasContext *dc) { TCGv l0; dc->op1 = EXTRACT_FIELD(dc->ir, 0, 4); DIS(fprintf (logfile, "btstq %u, $r%d\n", dc->op1, dc->op2)); cris_cc_mask(dc, CC_MASK_NZ); l0 = tcg_temp_local_new(TCG_TYPE_TL); cris_alu(dc, CC_OP_BTST, l0, cpu_R[dc->op2], tcg_const_tl(dc->op1), 4); cris_update_cc_op(dc, CC_OP_FLAGS, 4); t_gen_mov_preg_TN(dc, PR_CCS, l0); dc->flags_uptodate = 1; tcg_temp_free(l0); return 2; }


static void tcg_out_brcond2(TCGContext *s, const TCGArg *args, const int *const_args, int small) { int label_next; label_next = gen_new_label(); switch(args[4]) { case TCG_COND_EQ: tcg_out_brcond32(s, TCG_COND_NE, args[0], args[2], const_args[2], label_next, 1); tcg_out_brcond32(s, TCG_COND_EQ, args[1], args[3], const_args[3], args[5], small); break; case TCG_COND_NE: tcg_out_brcond32(s, TCG_COND_NE, args[0], args[2], const_args[2], args[5], small); tcg_out_brcond32(s, TCG_COND_NE, args[1], args[3], const_args[3], args[5], small); break; case TCG_COND_LT: tcg_out_brcond32(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5], small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5], small); break; case TCG_COND_LE: tcg_out_brcond32(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5], small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5], small); break; case TCG_COND_GT: tcg_out_brcond32(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5], small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5], small); break; case TCG_COND_GE: tcg_out_brcond32(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5], small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5], small); break; case TCG_COND_LTU: tcg_out_brcond32(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5], small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5], small); break; case TCG_COND_LEU: tcg_out_brcond32(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5], small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5], small); break; case TCG_COND_GTU: tcg_out_brcond32(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5], small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5], small); break; case TCG_COND_GEU: tcg_out_brcond32(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5], small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5], small); break; default: tcg_abort(); } tcg_out_label(s, label_next, s->code_ptr); }


int qemu_savevm_state_begin(QEMUFile *f) { SaveStateEntry *se; qemu_put_be32(f, QEMU_VM_FILE_MAGIC); qemu_put_be32(f, QEMU_VM_FILE_VERSION); TAILQ_FOREACH(se, &savevm_handlers, entry) { int len; if (se->save_live_state == NULL) continue; /* Section type */ qemu_put_byte(f, QEMU_VM_SECTION_START); qemu_put_be32(f, se->section_id); /* ID string */ len = strlen(se->idstr); qemu_put_byte(f, len); qemu_put_buffer(f, (uint8_t *)se->idstr, len); qemu_put_be32(f, se->instance_id); qemu_put_be32(f, se->version_id); se->save_live_state(f, QEMU_VM_SECTION_START, se->opaque); } if (qemu_file_has_error(f)) return -EIO; return 0; }


static void gen_jumpi(DisasContext *dc, uint32_t dest, int slot) { TCGv_i32 tmp = tcg_const_i32(dest); if (((dc->pc ^ dest) & TARGET_PAGE_MASK) != 0) { slot = -1; } gen_jump_slot(dc, tmp, slot); tcg_temp_free(tmp); }


int qed_read_l1_table_sync(BDRVQEDState *s) { int ret = -EINPROGRESS; async_context_push(); qed_read_table(s, s->header.l1_table_offset, s->l1_table, qed_sync_cb, &ret); while (ret == -EINPROGRESS) { qemu_aio_wait(); } async_context_pop(); return ret; }


static int process_input_packet(InputStream *ist, const AVPacket *pkt, int no_eof) { int ret = 0, i; int repeating = 0; int eof_reached = 0; AVPacket avpkt; if (!ist->saw_first_ts) { ist->dts = ist->st->avg_frame_rate.num ? - ist->dec_ctx->has_b_frames * AV_TIME_BASE / av_q2d(ist->st->avg_frame_rate) : 0; ist->pts = 0; if (pkt && pkt->pts != AV_NOPTS_VALUE && !ist->decoding_needed) { ist->dts += av_rescale_q(pkt->pts, ist->st->time_base, AV_TIME_BASE_Q); ist->pts = ist->dts; //unused but better to set it to a value thats not totally wrong } ist->saw_first_ts = 1; } if (ist->next_dts == AV_NOPTS_VALUE) ist->next_dts = ist->dts; if (ist->next_pts == AV_NOPTS_VALUE) ist->next_pts = ist->pts; if (!pkt) { /* EOF handling */ av_init_packet(&avpkt); avpkt.data = NULL; avpkt.size = 0; } else { avpkt = *pkt; } if (pkt && pkt->dts != AV_NOPTS_VALUE) { ist->next_dts = ist->dts = av_rescale_q(pkt->dts, ist->st->time_base, AV_TIME_BASE_Q); if (ist->dec_ctx->codec_type != AVMEDIA_TYPE_VIDEO || !ist->decoding_needed) ist->next_pts = ist->pts = ist->dts; } // while we have more to decode or while the decoder did output something on EOF while (ist->decoding_needed) { int duration = 0; int got_output = 0; ist->pts = ist->next_pts; ist->dts = ist->next_dts; switch (ist->dec_ctx->codec_type) { case AVMEDIA_TYPE_AUDIO: ret = decode_audio (ist, repeating ? NULL : &avpkt, &got_output); break; case AVMEDIA_TYPE_VIDEO: ret = decode_video (ist, repeating ? NULL : &avpkt, &got_output, !pkt); if (!repeating || !pkt || got_output) { if (pkt && pkt->duration) { duration = av_rescale_q(pkt->duration, ist->st->time_base, AV_TIME_BASE_Q); } else if(ist->dec_ctx->framerate.num != 0 && ist->dec_ctx->framerate.den != 0) { int ticks= av_stream_get_parser(ist->st) ? av_stream_get_parser(ist->st)->repeat_pict+1 : ist->dec_ctx->ticks_per_frame; duration = ((int64_t)AV_TIME_BASE * ist->dec_ctx->framerate.den * ticks) / ist->dec_ctx->framerate.num / ist->dec_ctx->ticks_per_frame; } if(ist->dts != AV_NOPTS_VALUE && duration) { ist->next_dts += duration; }else ist->next_dts = AV_NOPTS_VALUE; } if (got_output) ist->next_pts += duration; //FIXME the duration is not correct in some cases break; case AVMEDIA_TYPE_SUBTITLE: if (repeating) break; ret = transcode_subtitles(ist, &avpkt, &got_output); if (!pkt && ret >= 0) ret = AVERROR_EOF; break; default: return -1; } if (ret == AVERROR_EOF) { eof_reached = 1; break; } if (ret < 0) { av_log(NULL, AV_LOG_ERROR, "Error while decoding stream #%d:%d: %s\n", ist->file_index, ist->st->index, av_err2str(ret)); if (exit_on_error) exit_program(1); // Decoding might not terminate if we're draining the decoder, and // the decoder keeps returning an error. // This should probably be considered a libavcodec issue. // Sample: fate-vsynth1-dnxhd-720p-hr-lb if (!pkt) eof_reached = 1; break; } if (got_output) ist->got_output = 1; if (!got_output) break; // During draining, we might get multiple output frames in this loop. // ffmpeg.c does not drain the filter chain on configuration changes, // which means if we send multiple frames at once to the filters, and // one of those frames changes configuration, the buffered frames will // be lost. This can upset certain FATE tests. // Decode only 1 frame per call on EOF to appease these FATE tests. // The ideal solution would be to rewrite decoding to use the new // decoding API in a better way. if (!pkt) break; repeating = 1; } /* after flushing, send an EOF on all the filter inputs attached to the stream */ /* except when looping we need to flush but not to send an EOF */ if (!pkt && ist->decoding_needed && eof_reached && !no_eof) { int ret = send_filter_eof(ist); if (ret < 0) { av_log(NULL, AV_LOG_FATAL, "Error marking filters as finished\n"); exit_program(1); } } /* handle stream copy */ if (!ist->decoding_needed) { ist->dts = ist->next_dts; switch (ist->dec_ctx->codec_type) { case AVMEDIA_TYPE_AUDIO: ist->next_dts += ((int64_t)AV_TIME_BASE * ist->dec_ctx->frame_size) / ist->dec_ctx->sample_rate; break; case AVMEDIA_TYPE_VIDEO: if (ist->framerate.num) { // TODO: Remove work-around for c99-to-c89 issue 7 AVRational time_base_q = AV_TIME_BASE_Q; int64_t next_dts = av_rescale_q(ist->next_dts, time_base_q, av_inv_q(ist->framerate)); ist->next_dts = av_rescale_q(next_dts + 1, av_inv_q(ist->framerate), time_base_q); } else if (pkt->duration) { ist->next_dts += av_rescale_q(pkt->duration, ist->st->time_base, AV_TIME_BASE_Q); } else if(ist->dec_ctx->framerate.num != 0) { int ticks= av_stream_get_parser(ist->st) ? av_stream_get_parser(ist->st)->repeat_pict + 1 : ist->dec_ctx->ticks_per_frame; ist->next_dts += ((int64_t)AV_TIME_BASE * ist->dec_ctx->framerate.den * ticks) / ist->dec_ctx->framerate.num / ist->dec_ctx->ticks_per_frame; } break; } ist->pts = ist->dts; ist->next_pts = ist->next_dts; } for (i = 0; pkt && i < nb_output_streams; i++) { OutputStream *ost = output_streams[i]; if (!check_output_constraints(ist, ost) || ost->encoding_needed) continue; do_streamcopy(ist, ost, pkt); } return !eof_reached; }


BlockDeviceInfoList *bdrv_named_nodes_list(Error **errp) { BlockDeviceInfoList *list, *entry; BlockDriverState *bs; list = NULL; QTAILQ_FOREACH(bs, &graph_bdrv_states, node_list) { BlockDeviceInfo *info = bdrv_block_device_info(bs, errp); if (!info) { qapi_free_BlockDeviceInfoList(list); return NULL; } entry = g_malloc0(sizeof(*entry)); entry->value = info; entry->next = list; list = entry; } return list; }


static uint32_t dp8393x_readw(void *opaque, target_phys_addr_t addr) { dp8393xState *s = opaque; int reg; if ((addr & ((1 << s->it_shift) - 1)) != 0) { return 0; } reg = addr >> s->it_shift; return read_register(s, reg); }


void cpu_outw(pio_addr_t addr, uint16_t val) { LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val); trace_cpu_out(addr, val); ioport_write(1, addr, val); }


void HELPER(wfe)(CPUARMState *env) { CPUState *cs = CPU(arm_env_get_cpu(env)); /* Don't actually halt the CPU, just yield back to top * level loop. This is not going into a "low power state" * (ie halting until some event occurs), so we never take * a configurable trap to a different exception level. */ cs->exception_index = EXCP_YIELD; cpu_loop_exit(cs); }


static int xenfb_send_position(struct XenInput *xenfb, int abs_x, int abs_y, int z) { union xenkbd_in_event event; memset(&event, 0, XENKBD_IN_EVENT_SIZE); event.type = XENKBD_TYPE_POS; event.pos.abs_x = abs_x; event.pos.abs_y = abs_y; #if __XEN_LATEST_INTERFACE_VERSION__ == 0x00030207 event.pos.abs_z = z; #endif #if __XEN_LATEST_INTERFACE_VERSION__ >= 0x00030208 event.pos.rel_z = z; #endif return xenfb_kbd_event(xenfb, &event); }


static int latm_decode_frame(AVCodecContext *avctx, void *out, int *got_frame_ptr, AVPacket *avpkt) { struct LATMContext *latmctx = avctx->priv_data; int muxlength, err; GetBitContext gb; init_get_bits(&gb, avpkt->data, avpkt->size * 8); // check for LOAS sync word if (get_bits(&gb, 11) != LOAS_SYNC_WORD) return AVERROR_INVALIDDATA; muxlength = get_bits(&gb, 13) + 3; // not enough data, the parser should have sorted this if (muxlength > avpkt->size) return AVERROR_INVALIDDATA; if ((err = read_audio_mux_element(latmctx, &gb)) < 0) return err; if (!latmctx->initialized) { if (!avctx->extradata) { *got_frame_ptr = 0; return avpkt->size; } else { push_output_configuration(&latmctx->aac_ctx); if ((err = decode_audio_specific_config( &latmctx->aac_ctx, avctx, &latmctx->aac_ctx.oc[1].m4ac, avctx->extradata, avctx->extradata_size*8, 1)) < 0) { pop_output_configuration(&latmctx->aac_ctx); return err; } latmctx->initialized = 1; } } if (show_bits(&gb, 12) == 0xfff) { av_log(latmctx->aac_ctx.avctx, AV_LOG_ERROR, "ADTS header detected, probably as result of configuration " "misparsing\n"); return AVERROR_INVALIDDATA; } if ((err = aac_decode_frame_int(avctx, out, got_frame_ptr, &gb)) < 0) return err; return muxlength; }


static inline int direct_search(MpegEncContext * s, int mb_x, int mb_y) { MotionEstContext * const c= &s->me; int P[10][2]; const int mot_stride = s->mb_stride; const int mot_xy = mb_y*mot_stride + mb_x; const int shift= 1+s->quarter_sample; int dmin, i; const int time_pp= s->pp_time; const int time_pb= s->pb_time; int mx, my, xmin, xmax, ymin, ymax; int16_t (*mv_table)[2]= s->b_direct_mv_table; c->current_mv_penalty= c->mv_penalty[1] + MAX_MV; ymin= xmin=(-32)>>shift; ymax= xmax= 31>>shift; if (IS_8X8(s->next_picture.mb_type[mot_xy])) { s->mv_type= MV_TYPE_8X8; }else{ s->mv_type= MV_TYPE_16X16; } for(i=0; i<4; i++){ int index= s->block_index[i]; int min, max; c->co_located_mv[i][0] = s->next_picture.motion_val[0][index][0]; c->co_located_mv[i][1] = s->next_picture.motion_val[0][index][1]; c->direct_basis_mv[i][0]= c->co_located_mv[i][0]*time_pb/time_pp + ((i& 1)<<(shift+3)); c->direct_basis_mv[i][1]= c->co_located_mv[i][1]*time_pb/time_pp + ((i>>1)<<(shift+3)); // c->direct_basis_mv[1][i][0]= c->co_located_mv[i][0]*(time_pb - time_pp)/time_pp + ((i &1)<<(shift+3); // c->direct_basis_mv[1][i][1]= c->co_located_mv[i][1]*(time_pb - time_pp)/time_pp + ((i>>1)<<(shift+3); max= FFMAX(c->direct_basis_mv[i][0], c->direct_basis_mv[i][0] - c->co_located_mv[i][0])>>shift; min= FFMIN(c->direct_basis_mv[i][0], c->direct_basis_mv[i][0] - c->co_located_mv[i][0])>>shift; max+= 16*mb_x + 1; // +-1 is for the simpler rounding min+= 16*mb_x - 1; xmax= FFMIN(xmax, s->width - max); xmin= FFMAX(xmin, - 16 - min); max= FFMAX(c->direct_basis_mv[i][1], c->direct_basis_mv[i][1] - c->co_located_mv[i][1])>>shift; min= FFMIN(c->direct_basis_mv[i][1], c->direct_basis_mv[i][1] - c->co_located_mv[i][1])>>shift; max+= 16*mb_y + 1; // +-1 is for the simpler rounding min+= 16*mb_y - 1; ymax= FFMIN(ymax, s->height - max); ymin= FFMAX(ymin, - 16 - min); if(s->mv_type == MV_TYPE_16X16) break; } av_assert2(xmax <= 15 && ymax <= 15 && xmin >= -16 && ymin >= -16); if(xmax < 0 || xmin >0 || ymax < 0 || ymin > 0){ s->b_direct_mv_table[mot_xy][0]= 0; s->b_direct_mv_table[mot_xy][1]= 0; return 256*256*256*64; } c->xmin= xmin; c->ymin= ymin; c->xmax= xmax; c->ymax= ymax; c->flags |= FLAG_DIRECT; c->sub_flags |= FLAG_DIRECT; c->pred_x=0; c->pred_y=0; P_LEFT[0] = av_clip(mv_table[mot_xy - 1][0], xmin<<shift, xmax<<shift); P_LEFT[1] = av_clip(mv_table[mot_xy - 1][1], ymin<<shift, ymax<<shift); /* special case for first line */ if (!s->first_slice_line) { //FIXME maybe allow this over thread boundary as it is clipped P_TOP[0] = av_clip(mv_table[mot_xy - mot_stride ][0], xmin<<shift, xmax<<shift); P_TOP[1] = av_clip(mv_table[mot_xy - mot_stride ][1], ymin<<shift, ymax<<shift); P_TOPRIGHT[0] = av_clip(mv_table[mot_xy - mot_stride + 1 ][0], xmin<<shift, xmax<<shift); P_TOPRIGHT[1] = av_clip(mv_table[mot_xy - mot_stride + 1 ][1], ymin<<shift, ymax<<shift); P_MEDIAN[0]= mid_pred(P_LEFT[0], P_TOP[0], P_TOPRIGHT[0]); P_MEDIAN[1]= mid_pred(P_LEFT[1], P_TOP[1], P_TOPRIGHT[1]); } dmin = ff_epzs_motion_search(s, &mx, &my, P, 0, 0, mv_table, 1<<(16-shift), 0, 16); if(c->sub_flags&FLAG_QPEL) dmin = qpel_motion_search(s, &mx, &my, dmin, 0, 0, 0, 16); else dmin = hpel_motion_search(s, &mx, &my, dmin, 0, 0, 0, 16); if(c->avctx->me_sub_cmp != c->avctx->mb_cmp && !c->skip) dmin= get_mb_score(s, mx, my, 0, 0, 0, 16, 1); get_limits(s, 16*mb_x, 16*mb_y); //restore c->?min/max, maybe not needed mv_table[mot_xy][0]= mx; mv_table[mot_xy][1]= my; c->flags &= ~FLAG_DIRECT; c->sub_flags &= ~FLAG_DIRECT; return dmin; }


static av_cold void iv_alloc_frames(Indeo3DecodeContext *s) { int luma_width, luma_height, luma_pixels, chroma_width, chroma_height, chroma_pixels, i; unsigned int bufsize; luma_width = (s->width + 3) & (~3); luma_height = (s->height + 3) & (~3); s->iv_frame[0].y_w = s->iv_frame[0].y_h = s->iv_frame[0].the_buf_size = 0; s->iv_frame[1].y_w = s->iv_frame[1].y_h = s->iv_frame[1].the_buf_size = 0; s->iv_frame[1].the_buf = NULL; chroma_width = ((luma_width >> 2) + 3) & (~3); chroma_height = ((luma_height>> 2) + 3) & (~3); luma_pixels = luma_width * luma_height; chroma_pixels = chroma_width * chroma_height; bufsize = luma_pixels * 2 + luma_width * 3 + (chroma_pixels + chroma_width) * 4; if(!(s->iv_frame[0].the_buf = av_malloc(bufsize))) return; s->iv_frame[0].y_w = s->iv_frame[1].y_w = luma_width; s->iv_frame[0].y_h = s->iv_frame[1].y_h = luma_height; s->iv_frame[0].uv_w = s->iv_frame[1].uv_w = chroma_width; s->iv_frame[0].uv_h = s->iv_frame[1].uv_h = chroma_height; s->iv_frame[0].the_buf_size = bufsize; s->iv_frame[0].Ybuf = s->iv_frame[0].the_buf + luma_width; i = luma_pixels + luma_width * 2; s->iv_frame[1].Ybuf = s->iv_frame[0].the_buf + i; i += (luma_pixels + luma_width); s->iv_frame[0].Ubuf = s->iv_frame[0].the_buf + i; i += (chroma_pixels + chroma_width); s->iv_frame[1].Ubuf = s->iv_frame[0].the_buf + i; i += (chroma_pixels + chroma_width); s->iv_frame[0].Vbuf = s->iv_frame[0].the_buf + i; i += (chroma_pixels + chroma_width); s->iv_frame[1].Vbuf = s->iv_frame[0].the_buf + i; for(i = 1; i <= luma_width; i++) s->iv_frame[0].Ybuf[-i] = s->iv_frame[1].Ybuf[-i] = s->iv_frame[0].Ubuf[-i] = 0x80; for(i = 1; i <= chroma_width; i++) { s->iv_frame[1].Ubuf[-i] = 0x80; s->iv_frame[0].Vbuf[-i] = 0x80; s->iv_frame[1].Vbuf[-i] = 0x80; s->iv_frame[1].Vbuf[chroma_pixels+i-1] = 0x80; } }


int avpriv_ac3_parse_header(GetBitContext *gbc, AC3HeaderInfo *hdr) { int frame_size_code; memset(hdr, 0, sizeof(*hdr)); hdr->sync_word = get_bits(gbc, 16); if(hdr->sync_word != 0x0B77) return AAC_AC3_PARSE_ERROR_SYNC; /* read ahead to bsid to distinguish between AC-3 and E-AC-3 */ hdr->bitstream_id = show_bits_long(gbc, 29) & 0x1F; if(hdr->bitstream_id > 16) return AAC_AC3_PARSE_ERROR_BSID; hdr->num_blocks = 6; /* set default mix levels */ hdr->center_mix_level = 1; // -4.5dB hdr->surround_mix_level = 1; // -6.0dB if(hdr->bitstream_id <= 10) { /* Normal AC-3 */ hdr->crc1 = get_bits(gbc, 16); hdr->sr_code = get_bits(gbc, 2); if(hdr->sr_code == 3) return AAC_AC3_PARSE_ERROR_SAMPLE_RATE; frame_size_code = get_bits(gbc, 6); if(frame_size_code > 37) return AAC_AC3_PARSE_ERROR_FRAME_SIZE; skip_bits(gbc, 5); // skip bsid, already got it hdr->bitstream_mode = get_bits(gbc, 3); hdr->channel_mode = get_bits(gbc, 3); if(hdr->channel_mode == AC3_CHMODE_STEREO) { skip_bits(gbc, 2); // skip dsurmod } else { if((hdr->channel_mode & 1) && hdr->channel_mode != AC3_CHMODE_MONO) hdr->center_mix_level = get_bits(gbc, 2); if(hdr->channel_mode & 4) hdr->surround_mix_level = get_bits(gbc, 2); } hdr->lfe_on = get_bits1(gbc); hdr->sr_shift = FFMAX(hdr->bitstream_id, 8) - 8; hdr->sample_rate = ff_ac3_sample_rate_tab[hdr->sr_code] >> hdr->sr_shift; hdr->bit_rate = (ff_ac3_bitrate_tab[frame_size_code>>1] * 1000) >> hdr->sr_shift; hdr->channels = ff_ac3_channels_tab[hdr->channel_mode] + hdr->lfe_on; hdr->frame_size = ff_ac3_frame_size_tab[frame_size_code][hdr->sr_code] * 2; hdr->frame_type = EAC3_FRAME_TYPE_AC3_CONVERT; //EAC3_FRAME_TYPE_INDEPENDENT; hdr->substreamid = 0; } else { /* Enhanced AC-3 */ hdr->crc1 = 0; hdr->frame_type = get_bits(gbc, 2); if(hdr->frame_type == EAC3_FRAME_TYPE_RESERVED) return AAC_AC3_PARSE_ERROR_FRAME_TYPE; hdr->substreamid = get_bits(gbc, 3); hdr->frame_size = (get_bits(gbc, 11) + 1) << 1; if(hdr->frame_size < AC3_HEADER_SIZE) return AAC_AC3_PARSE_ERROR_FRAME_SIZE; hdr->sr_code = get_bits(gbc, 2); if (hdr->sr_code == 3) { int sr_code2 = get_bits(gbc, 2); if(sr_code2 == 3) return AAC_AC3_PARSE_ERROR_SAMPLE_RATE; hdr->sample_rate = ff_ac3_sample_rate_tab[sr_code2] / 2; hdr->sr_shift = 1; } else { hdr->num_blocks = eac3_blocks[get_bits(gbc, 2)]; hdr->sample_rate = ff_ac3_sample_rate_tab[hdr->sr_code]; hdr->sr_shift = 0; } hdr->channel_mode = get_bits(gbc, 3); hdr->lfe_on = get_bits1(gbc); hdr->bit_rate = (uint32_t)(8.0 * hdr->frame_size * hdr->sample_rate / (hdr->num_blocks * 256.0)); hdr->channels = ff_ac3_channels_tab[hdr->channel_mode] + hdr->lfe_on; } hdr->channel_layout = ff_ac3_channel_layout_tab[hdr->channel_mode]; if (hdr->lfe_on) hdr->channel_layout |= AV_CH_LOW_FREQUENCY; return 0; }


av_cold int ff_vc1_decode_init_alloc_tables(VC1Context *v) { MpegEncContext *s = &v->s; int i; int mb_height = FFALIGN(s->mb_height, 2); /* Allocate mb bitplanes */ v->mv_type_mb_plane = av_malloc (s->mb_stride * mb_height); v->direct_mb_plane = av_malloc (s->mb_stride * mb_height); v->forward_mb_plane = av_malloc (s->mb_stride * mb_height); v->fieldtx_plane = av_mallocz(s->mb_stride * mb_height); v->acpred_plane = av_malloc (s->mb_stride * mb_height); v->over_flags_plane = av_malloc (s->mb_stride * mb_height); if (!v->mv_type_mb_plane || !v->direct_mb_plane || !v->forward_mb_plane || !v->fieldtx_plane || !v->acpred_plane || !v->over_flags_plane) goto error; v->n_allocated_blks = s->mb_width + 2; v->block = av_malloc(sizeof(*v->block) * v->n_allocated_blks); v->cbp_base = av_malloc(sizeof(v->cbp_base[0]) * 2 * s->mb_stride); if (!v->block || !v->cbp_base) goto error; v->cbp = v->cbp_base + s->mb_stride; v->ttblk_base = av_malloc(sizeof(v->ttblk_base[0]) * 2 * s->mb_stride); if (!v->ttblk_base) goto error; v->ttblk = v->ttblk_base + s->mb_stride; v->is_intra_base = av_mallocz(sizeof(v->is_intra_base[0]) * 2 * s->mb_stride); if (!v->is_intra_base) goto error; v->is_intra = v->is_intra_base + s->mb_stride; v->luma_mv_base = av_malloc(sizeof(v->luma_mv_base[0]) * 2 * s->mb_stride); if (!v->luma_mv_base) goto error; v->luma_mv = v->luma_mv_base + s->mb_stride; /* allocate block type info in that way so it could be used with s->block_index[] */ v->mb_type_base = av_malloc(s->b8_stride * (mb_height * 2 + 1) + s->mb_stride * (mb_height + 1) * 2); if (!v->mb_type_base) goto error; v->mb_type[0] = v->mb_type_base + s->b8_stride + 1; v->mb_type[1] = v->mb_type_base + s->b8_stride * (mb_height * 2 + 1) + s->mb_stride + 1; v->mb_type[2] = v->mb_type[1] + s->mb_stride * (mb_height + 1); /* allocate memory to store block level MV info */ v->blk_mv_type_base = av_mallocz( s->b8_stride * (mb_height * 2 + 1) + s->mb_stride * (mb_height + 1) * 2); if (!v->blk_mv_type_base) goto error; v->blk_mv_type = v->blk_mv_type_base + s->b8_stride + 1; v->mv_f_base = av_mallocz(2 * (s->b8_stride * (mb_height * 2 + 1) + s->mb_stride * (mb_height + 1) * 2)); if (!v->mv_f_base) goto error; v->mv_f[0] = v->mv_f_base + s->b8_stride + 1; v->mv_f[1] = v->mv_f[0] + (s->b8_stride * (mb_height * 2 + 1) + s->mb_stride * (mb_height + 1) * 2); v->mv_f_next_base = av_mallocz(2 * (s->b8_stride * (mb_height * 2 + 1) + s->mb_stride * (mb_height + 1) * 2)); if (!v->mv_f_next_base) goto error; v->mv_f_next[0] = v->mv_f_next_base + s->b8_stride + 1; v->mv_f_next[1] = v->mv_f_next[0] + (s->b8_stride * (mb_height * 2 + 1) + s->mb_stride * (mb_height + 1) * 2); ff_intrax8_common_init(&v->x8,s); if (s->avctx->codec_id == AV_CODEC_ID_WMV3IMAGE || s->avctx->codec_id == AV_CODEC_ID_VC1IMAGE) { for (i = 0; i < 4; i++) { v->sr_rows[i >> 1][i & 1] = av_malloc(v->output_width); if (!v->sr_rows[i >> 1][i & 1]) goto error; } } return 0; error: ff_vc1_decode_end(s->avctx); return AVERROR(ENOMEM); }