static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs) { int extension = (ctx->opcode >> 6) & 0x3f; int minor = (ctx->opcode >> 12) & 0xf; uint32_t mips32_op; switch (extension) { case TEQ: mips32_op = OPC_TEQ; goto do_trap; case TGE: mips32_op = OPC_TGE; goto do_trap; case TGEU: mips32_op = OPC_TGEU; goto do_trap; case TLT: mips32_op = OPC_TLT; goto do_trap; case TLTU: mips32_op = OPC_TLTU; goto do_trap; case TNE: mips32_op = OPC_TNE; do_trap: gen_trap(ctx, mips32_op, rs, rt, -1); break; #ifndef CONFIG_USER_ONLY case MFC0: case MFC0 + 32: check_cp0_enabled(ctx); if (rt == 0) { /* Treat as NOP. */ break; } gen_mfc0(ctx, cpu_gpr[rt], rs, (ctx->opcode >> 11) & 0x7); break; case MTC0: case MTC0 + 32: check_cp0_enabled(ctx); { TCGv t0 = tcg_temp_new(); gen_load_gpr(t0, rt); gen_mtc0(ctx, t0, rs, (ctx->opcode >> 11) & 0x7); tcg_temp_free(t0); } break; #endif case 0x2a: switch (minor & 3) { case MADD_ACC: gen_muldiv(ctx, OPC_MADD, (ctx->opcode >> 14) & 3, rs, rt); break; case MADDU_ACC: gen_muldiv(ctx, OPC_MADDU, (ctx->opcode >> 14) & 3, rs, rt); break; case MSUB_ACC: gen_muldiv(ctx, OPC_MSUB, (ctx->opcode >> 14) & 3, rs, rt); break; case MSUBU_ACC: gen_muldiv(ctx, OPC_MSUBU, (ctx->opcode >> 14) & 3, rs, rt); break; default: goto pool32axf_invalid; } break; case 0x32: switch (minor & 3) { case MULT_ACC: gen_muldiv(ctx, OPC_MULT, (ctx->opcode >> 14) & 3, rs, rt); break; case MULTU_ACC: gen_muldiv(ctx, OPC_MULTU, (ctx->opcode >> 14) & 3, rs, rt); break; default: goto pool32axf_invalid; } break; case 0x2c: switch (minor) { case BITSWAP: check_insn(ctx, ISA_MIPS32R6); gen_bitswap(ctx, OPC_BITSWAP, rs, rt); break; case SEB: gen_bshfl(ctx, OPC_SEB, rs, rt); break; case SEH: gen_bshfl(ctx, OPC_SEH, rs, rt); break; case CLO: mips32_op = OPC_CLO; goto do_cl; case CLZ: mips32_op = OPC_CLZ; do_cl: check_insn(ctx, ISA_MIPS32); gen_cl(ctx, mips32_op, rt, rs); break; case RDHWR: gen_rdhwr(ctx, rt, rs); break; case WSBH: gen_bshfl(ctx, OPC_WSBH, rs, rt); break; case MULT: check_insn_opc_removed(ctx, ISA_MIPS32R6); mips32_op = OPC_MULT; goto do_mul; case MULTU: check_insn_opc_removed(ctx, ISA_MIPS32R6); mips32_op = OPC_MULTU; goto do_mul; case DIV: check_insn_opc_removed(ctx, ISA_MIPS32R6); mips32_op = OPC_DIV; goto do_div; case DIVU: check_insn_opc_removed(ctx, ISA_MIPS32R6); mips32_op = OPC_DIVU; goto do_div; do_div: check_insn(ctx, ISA_MIPS32); gen_muldiv(ctx, mips32_op, 0, rs, rt); break; case MADD: check_insn_opc_removed(ctx, ISA_MIPS32R6); mips32_op = OPC_MADD; goto do_mul; case MADDU: check_insn_opc_removed(ctx, ISA_MIPS32R6); mips32_op = OPC_MADDU; goto do_mul; case MSUB: check_insn_opc_removed(ctx, ISA_MIPS32R6); mips32_op = OPC_MSUB; goto do_mul; case MSUBU: check_insn_opc_removed(ctx, ISA_MIPS32R6); mips32_op = OPC_MSUBU; do_mul: check_insn(ctx, ISA_MIPS32); gen_muldiv(ctx, mips32_op, 0, rs, rt); break; default: goto pool32axf_invalid; } break; case 0x34: switch (minor) { case MFC2: case MTC2: case MFHC2: case MTHC2: case CFC2: case CTC2: generate_exception_err(ctx, EXCP_CpU, 2); break; default: goto pool32axf_invalid; } break; case 0x3c: switch (minor) { case JALR: /* JALRC */ case JALR_HB: /* JALRC_HB */ if (ctx->insn_flags & ISA_MIPS32R6) { /* JALRC, JALRC_HB */ gen_compute_branch(ctx, OPC_JALR, 4, rs, rt, 0, 0); } else { /* JALR, JALR_HB */ gen_compute_branch(ctx, OPC_JALR, 4, rs, rt, 0, 4); ctx->hflags |= MIPS_HFLAG_BDS_STRICT; } break; case JALRS: case JALRS_HB: check_insn_opc_removed(ctx, ISA_MIPS32R6); gen_compute_branch(ctx, OPC_JALR, 4, rs, rt, 0, 2); ctx->hflags |= MIPS_HFLAG_BDS_STRICT; break; default: goto pool32axf_invalid; } break; case 0x05: switch (minor) { case RDPGPR: check_cp0_enabled(ctx); check_insn(ctx, ISA_MIPS32R2); gen_load_srsgpr(rs, rt); break; case WRPGPR: check_cp0_enabled(ctx); check_insn(ctx, ISA_MIPS32R2); gen_store_srsgpr(rs, rt); break; default: goto pool32axf_invalid; } break; #ifndef CONFIG_USER_ONLY case 0x0d: switch (minor) { case TLBP: mips32_op = OPC_TLBP; goto do_cp0; case TLBR: mips32_op = OPC_TLBR; goto do_cp0; case TLBWI: mips32_op = OPC_TLBWI; goto do_cp0; case TLBWR: mips32_op = OPC_TLBWR; goto do_cp0; case TLBINV: mips32_op = OPC_TLBINV; goto do_cp0; case TLBINVF: mips32_op = OPC_TLBINVF; goto do_cp0; case WAIT: mips32_op = OPC_WAIT; goto do_cp0; case DERET: mips32_op = OPC_DERET; goto do_cp0; case ERET: mips32_op = OPC_ERET; do_cp0: gen_cp0(env, ctx, mips32_op, rt, rs); break; default: goto pool32axf_invalid; } break; case 0x1d: switch (minor) { case DI: check_cp0_enabled(ctx); { TCGv t0 = tcg_temp_new(); save_cpu_state(ctx, 1); gen_helper_di(t0, cpu_env); gen_store_gpr(t0, rs); /* Stop translation as we may have switched the execution mode */ ctx->bstate = BS_STOP; tcg_temp_free(t0); } break; case EI: check_cp0_enabled(ctx); { TCGv t0 = tcg_temp_new(); save_cpu_state(ctx, 1); gen_helper_ei(t0, cpu_env); gen_store_gpr(t0, rs); /* Stop translation as we may have switched the execution mode */ ctx->bstate = BS_STOP; tcg_temp_free(t0); } break; default: goto pool32axf_invalid; } break; #endif case 0x2d: switch (minor) { case SYNC: /* NOP */ break; case SYSCALL: generate_exception_end(ctx, EXCP_SYSCALL); break; case SDBBP: if (is_uhi(extract32(ctx->opcode, 16, 10))) { gen_helper_do_semihosting(cpu_env); } else { check_insn(ctx, ISA_MIPS32); if (ctx->hflags & MIPS_HFLAG_SBRI) { generate_exception_end(ctx, EXCP_RI); } else { generate_exception_end(ctx, EXCP_DBp); } } break; default: goto pool32axf_invalid; } break; case 0x01: switch (minor & 3) { case MFHI_ACC: gen_HILO(ctx, OPC_MFHI, minor >> 2, rs); break; case MFLO_ACC: gen_HILO(ctx, OPC_MFLO, minor >> 2, rs); break; case MTHI_ACC: gen_HILO(ctx, OPC_MTHI, minor >> 2, rs); break; case MTLO_ACC: gen_HILO(ctx, OPC_MTLO, minor >> 2, rs); break; default: goto pool32axf_invalid; } break; case 0x35: check_insn_opc_removed(ctx, ISA_MIPS32R6); switch (minor) { case MFHI32: gen_HILO(ctx, OPC_MFHI, 0, rs); break; case MFLO32: gen_HILO(ctx, OPC_MFLO, 0, rs); break; case MTHI32: gen_HILO(ctx, OPC_MTHI, 0, rs); break; case MTLO32: gen_HILO(ctx, OPC_MTLO, 0, rs); break; default: goto pool32axf_invalid; } break; default: pool32axf_invalid: MIPS_INVAL("pool32axf"); generate_exception_end(ctx, EXCP_RI); break; } }


void ff_fix_long_mvs(MpegEncContext * s, uint8_t *field_select_table, int field_select, int16_t (*mv_table)[2], int f_code, int type, int truncate) { MotionEstContext * const c= &s->me; int y, h_range, v_range; // RAL: 8 in MPEG-1, 16 in MPEG-4 int range = (((s->out_format == FMT_MPEG1) ? 8 : 16) << f_code); if(s->msmpeg4_version) range= 16; if(c->avctx->me_range && range > c->avctx->me_range) range= c->avctx->me_range; h_range= range; v_range= field_select_table ? range>>1 : range; /* clip / convert to intra 16x16 type MVs */ for(y=0; y<s->mb_height; y++){ int x; int xy= y*s->mb_stride; for(x=0; x<s->mb_width; x++){ if (s->mb_type[xy] & type){ // RAL: "type" test added... if(field_select_table==NULL || field_select_table[xy] == field_select){ if( mv_table[xy][0] >=h_range || mv_table[xy][0] <-h_range || mv_table[xy][1] >=v_range || mv_table[xy][1] <-v_range){ if(truncate){ if (mv_table[xy][0] > h_range-1) mv_table[xy][0]= h_range-1; else if(mv_table[xy][0] < -h_range ) mv_table[xy][0]= -h_range; if (mv_table[xy][1] > v_range-1) mv_table[xy][1]= v_range-1; else if(mv_table[xy][1] < -v_range ) mv_table[xy][1]= -v_range; }else{ s->mb_type[xy] &= ~type; s->mb_type[xy] |= CANDIDATE_MB_TYPE_INTRA; mv_table[xy][0]= mv_table[xy][1]= 0; } } } } xy++; } } }


ThreadPool *thread_pool_new(AioContext *ctx) { ThreadPool *pool = g_new(ThreadPool, 1); thread_pool_init_one(pool, ctx); return pool; }


static int parse_bootdevices(char *devices) { /* We just do some generic consistency checks */ const char *p; int bitmap = 0; for (p = devices; *p != '\0'; p++) { /* Allowed boot devices are: * a-b: floppy disk drives * c-f: IDE disk drives * g-m: machine implementation dependant drives * n-p: network devices * It's up to each machine implementation to check if the given boot * devices match the actual hardware implementation and firmware * features. */ if (*p < 'a' || *p > 'p') { fprintf(stderr, "Invalid boot device '%c'\n", *p); exit(1); } if (bitmap & (1 << (*p - 'a'))) { fprintf(stderr, "Boot device '%c' was given twice\n", *p); exit(1); } bitmap |= 1 << (*p - 'a'); } return bitmap; }


static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1, TCGReg arg2, int label_index) { static const MIPSInsn b_zero[16] = { [TCG_COND_LT] = OPC_BLTZ, [TCG_COND_GT] = OPC_BGTZ, [TCG_COND_LE] = OPC_BLEZ, [TCG_COND_GE] = OPC_BGEZ, }; TCGLabel *l; MIPSInsn s_opc = OPC_SLTU; MIPSInsn b_opc; int cmp_map; switch (cond) { case TCG_COND_EQ: b_opc = OPC_BEQ; break; case TCG_COND_NE: b_opc = OPC_BNE; break; case TCG_COND_LT: case TCG_COND_GT: case TCG_COND_LE: case TCG_COND_GE: if (arg2 == 0) { b_opc = b_zero[cond]; arg2 = arg1; arg1 = 0; break; } s_opc = OPC_SLT; /* FALLTHRU */ case TCG_COND_LTU: case TCG_COND_GTU: case TCG_COND_LEU: case TCG_COND_GEU: cmp_map = mips_cmp_map[cond]; if (cmp_map & MIPS_CMP_SWAP) { TCGReg t = arg1; arg1 = arg2; arg2 = t; } tcg_out_opc_reg(s, s_opc, TCG_TMP0, arg1, arg2); b_opc = (cmp_map & MIPS_CMP_INV ? OPC_BEQ : OPC_BNE); arg1 = TCG_TMP0; arg2 = TCG_REG_ZERO; break; default: tcg_abort(); break; } tcg_out_opc_br(s, b_opc, arg1, arg2); l = &s->labels[label_index]; if (l->has_value) { reloc_pc16(s->code_ptr - 1, l->u.value_ptr); } else { tcg_out_reloc(s, s->code_ptr - 1, R_MIPS_PC16, label_index, 0); } tcg_out_nop(s); }


static unsigned int dec_move_rp(DisasContext *dc) { TCGv t[2]; DIS(fprintf (logfile, "move $r%u, $p%u\n", dc->op1, dc->op2)); cris_cc_mask(dc, 0); t[0] = tcg_temp_new(TCG_TYPE_TL); if (dc->op2 == PR_CCS) { cris_evaluate_flags(dc); t_gen_mov_TN_reg(t[0], dc->op1); if (dc->tb_flags & U_FLAG) { t[1] = tcg_temp_new(TCG_TYPE_TL); /* User space is not allowed to touch all flags. */ tcg_gen_andi_tl(t[0], t[0], 0x39f); tcg_gen_andi_tl(t[1], cpu_PR[PR_CCS], ~0x39f); tcg_gen_or_tl(t[0], t[1], t[0]); tcg_temp_free(t[1]); } } else t_gen_mov_TN_reg(t[0], dc->op1); t_gen_mov_preg_TN(dc, dc->op2, t[0]); if (dc->op2 == PR_CCS) { cris_update_cc_op(dc, CC_OP_FLAGS, 4); dc->flags_uptodate = 1; } tcg_temp_free(t[0]); return 2; }


static uint32_t get_elf_hwcap(void) { ARMCPU *cpu = ARM_CPU(thread_cpu); uint32_t hwcaps = 0; hwcaps |= ARM_HWCAP_ARM_SWP; hwcaps |= ARM_HWCAP_ARM_HALF; hwcaps |= ARM_HWCAP_ARM_THUMB; hwcaps |= ARM_HWCAP_ARM_FAST_MULT; /* probe for the extra features */ #define GET_FEATURE(feat, hwcap) \ do { if (arm_feature(&cpu->env, feat)) { hwcaps |= hwcap; } } while (0) /* EDSP is in v5TE and above, but all our v5 CPUs are v5TE */ GET_FEATURE(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP); GET_FEATURE(ARM_FEATURE_VFP, ARM_HWCAP_ARM_VFP); GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT); GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE); GET_FEATURE(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON); GET_FEATURE(ARM_FEATURE_VFP3, ARM_HWCAP_ARM_VFPv3); GET_FEATURE(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS); GET_FEATURE(ARM_FEATURE_VFP4, ARM_HWCAP_ARM_VFPv4); GET_FEATURE(ARM_FEATURE_ARM_DIV, ARM_HWCAP_ARM_IDIVA); GET_FEATURE(ARM_FEATURE_THUMB_DIV, ARM_HWCAP_ARM_IDIVT); /* All QEMU's VFPv3 CPUs have 32 registers, see VFP_DREG in translate.c. * Note that the ARM_HWCAP_ARM_VFPv3D16 bit is always the inverse of * ARM_HWCAP_ARM_VFPD32 (and so always clear for QEMU); it is unrelated * to our VFP_FP16 feature bit. */ GET_FEATURE(ARM_FEATURE_VFP3, ARM_HWCAP_ARM_VFPD32); GET_FEATURE(ARM_FEATURE_LPAE, ARM_HWCAP_ARM_LPAE); #undef GET_FEATURE return hwcaps; }


static void test_visitor_out_native_list_uint64(TestOutputVisitorData *data, const void *unused) { test_native_list(data, unused, USER_DEF_NATIVE_LIST_UNION_KIND_U64); }


BlockAIOCB *bdrv_aio_flush(BlockDriverState *bs, BlockCompletionFunc *cb, void *opaque) { trace_bdrv_aio_flush(bs, opaque); Coroutine *co; BlockAIOCBCoroutine *acb; acb = qemu_aio_get(&bdrv_em_co_aiocb_info, bs, cb, opaque); acb->need_bh = true; acb->req.error = -EINPROGRESS; co = qemu_coroutine_create(bdrv_aio_flush_co_entry); qemu_coroutine_enter(co, acb); bdrv_co_maybe_schedule_bh(acb); return &acb->common; }


xmit_seg(E1000State *s) { uint16_t len; unsigned int frames = s->tx.tso_frames, css, sofar; struct e1000_tx *tp = &s->tx; if (tp->props.tse && tp->props.cptse) { css = tp->props.ipcss; DBGOUT(TXSUM, "frames %d size %d ipcss %d\n", frames, tp->size, css); if (tp->props.ip) { /* IPv4 */ stw_be_p(tp->data+css+2, tp->size - css); stw_be_p(tp->data+css+4, lduw_be_p(tp->data + css + 4) + frames); } else { /* IPv6 */ stw_be_p(tp->data+css+4, tp->size - css); } css = tp->props.tucss; len = tp->size - css; DBGOUT(TXSUM, "tcp %d tucss %d len %d\n", tp->props.tcp, css, len); if (tp->props.tcp) { sofar = frames * tp->props.mss; stl_be_p(tp->data+css+4, ldl_be_p(tp->data+css+4)+sofar); /* seq */ if (tp->props.paylen - sofar > tp->props.mss) { tp->data[css + 13] &= ~9; /* PSH, FIN */ } else if (frames) { e1000x_inc_reg_if_not_full(s->mac_reg, TSCTC); } } else /* UDP */ stw_be_p(tp->data+css+4, len); if (tp->props.sum_needed & E1000_TXD_POPTS_TXSM) { unsigned int phsum; // add pseudo-header length before checksum calculation void *sp = tp->data + tp->props.tucso; phsum = lduw_be_p(sp) + len; phsum = (phsum >> 16) + (phsum & 0xffff); stw_be_p(sp, phsum); } tp->tso_frames++; } if (tp->props.sum_needed & E1000_TXD_POPTS_TXSM) { putsum(tp->data, tp->size, tp->props.tucso, tp->props.tucss, tp->props.tucse); } if (tp->props.sum_needed & E1000_TXD_POPTS_IXSM) { putsum(tp->data, tp->size, tp->props.ipcso, tp->props.ipcss, tp->props.ipcse); } if (tp->vlan_needed) { memmove(tp->vlan, tp->data, 4); memmove(tp->data, tp->data + 4, 8); memcpy(tp->data + 8, tp->vlan_header, 4); e1000_send_packet(s, tp->vlan, tp->size + 4); } else { e1000_send_packet(s, tp->data, tp->size); } e1000x_inc_reg_if_not_full(s->mac_reg, TPT); e1000x_grow_8reg_if_not_full(s->mac_reg, TOTL, s->tx.size); s->mac_reg[GPTC] = s->mac_reg[TPT]; s->mac_reg[GOTCL] = s->mac_reg[TOTL]; s->mac_reg[GOTCH] = s->mac_reg[TOTH]; }


int ff_ivi_decode_blocks(GetBitContext *gb, IVIBandDesc *band, IVITile *tile) { int mbn, blk, num_blocks, num_coeffs, blk_size, scan_pos, run, val, pos, is_intra, mc_type, mv_x, mv_y, col_mask; uint8_t col_flags[8]; int32_t prev_dc, trvec[64]; uint32_t cbp, sym, lo, hi, quant, buf_offs, q; IVIMbInfo *mb; RVMapDesc *rvmap = band->rv_map; void (*mc_with_delta_func)(int16_t *buf, const int16_t *ref_buf, uint32_t pitch, int mc_type); void (*mc_no_delta_func) (int16_t *buf, const int16_t *ref_buf, uint32_t pitch, int mc_type); const uint16_t *base_tab; const uint8_t *scale_tab; prev_dc = 0; /* init intra prediction for the DC coefficient */ blk_size = band->blk_size; col_mask = blk_size - 1; /* column mask for tracking non-zero coeffs */ num_blocks = (band->mb_size != blk_size) ? 4 : 1; /* number of blocks per mb */ num_coeffs = blk_size * blk_size; if (blk_size == 8) { mc_with_delta_func = ff_ivi_mc_8x8_delta; mc_no_delta_func = ff_ivi_mc_8x8_no_delta; } else { mc_with_delta_func = ff_ivi_mc_4x4_delta; mc_no_delta_func = ff_ivi_mc_4x4_no_delta; } for (mbn = 0, mb = tile->mbs; mbn < tile->num_MBs; mb++, mbn++) { is_intra = !mb->type; cbp = mb->cbp; buf_offs = mb->buf_offs; quant = av_clip(band->glob_quant + mb->q_delta, 0, 23); base_tab = is_intra ? band->intra_base : band->inter_base; scale_tab = is_intra ? band->intra_scale : band->inter_scale; if (scale_tab) quant = scale_tab[quant]; if (!is_intra) { mv_x = mb->mv_x; mv_y = mb->mv_y; if (!band->is_halfpel) { mc_type = 0; /* we have only fullpel vectors */ } else { mc_type = ((mv_y & 1) << 1) | (mv_x & 1); mv_x >>= 1; mv_y >>= 1; /* convert halfpel vectors into fullpel ones */ } } for (blk = 0; blk < num_blocks; blk++) { /* adjust block position in the buffer according to its number */ if (blk & 1) { buf_offs += blk_size; } else if (blk == 2) { buf_offs -= blk_size; buf_offs += blk_size * band->pitch; } if (cbp & 1) { /* block coded ? */ scan_pos = -1; memset(trvec, 0, num_coeffs*sizeof(trvec[0])); /* zero transform vector */ memset(col_flags, 0, sizeof(col_flags)); /* zero column flags */ while (scan_pos <= num_coeffs) { sym = get_vlc2(gb, band->blk_vlc.tab->table, IVI_VLC_BITS, 1); if (sym == rvmap->eob_sym) break; /* End of block */ if (sym == rvmap->esc_sym) { /* Escape - run/val explicitly coded using 3 vlc codes */ run = get_vlc2(gb, band->blk_vlc.tab->table, IVI_VLC_BITS, 1) + 1; lo = get_vlc2(gb, band->blk_vlc.tab->table, IVI_VLC_BITS, 1); hi = get_vlc2(gb, band->blk_vlc.tab->table, IVI_VLC_BITS, 1); val = IVI_TOSIGNED((hi << 6) | lo); /* merge them and convert into signed val */ } else { if (sym >= 256U) { av_log(NULL, AV_LOG_ERROR, "Invalid sym encountered: %d.\n", sym); return -1; } run = rvmap->runtab[sym]; val = rvmap->valtab[sym]; } /* de-zigzag and dequantize */ scan_pos += run; if (scan_pos >= num_coeffs) break; pos = band->scan[scan_pos]; if (!val) av_dlog(NULL, "Val = 0 encountered!\n"); q = (base_tab[pos] * quant) >> 9; if (q > 1) val = val * q + FFSIGN(val) * (((q ^ 1) - 1) >> 1); trvec[pos] = val; col_flags[pos & col_mask] |= !!val; /* track columns containing non-zero coeffs */ }// while if (scan_pos >= num_coeffs && sym != rvmap->eob_sym) return -1; /* corrupt block data */ /* undoing DC coeff prediction for intra-blocks */ if (is_intra && band->is_2d_trans) { prev_dc += trvec[0]; trvec[0] = prev_dc; col_flags[0] |= !!prev_dc; } /* apply inverse transform */ band->inv_transform(trvec, band->buf + buf_offs, band->pitch, col_flags); /* apply motion compensation */ if (!is_intra) mc_with_delta_func(band->buf + buf_offs, band->ref_buf + buf_offs + mv_y * band->pitch + mv_x, band->pitch, mc_type); } else { /* block not coded */ /* for intra blocks apply the dc slant transform */ /* for inter - perform the motion compensation without delta */ if (is_intra && band->dc_transform) { band->dc_transform(&prev_dc, band->buf + buf_offs, band->pitch, blk_size); } else mc_no_delta_func(band->buf + buf_offs, band->ref_buf + buf_offs + mv_y * band->pitch + mv_x, band->pitch, mc_type); } cbp >>= 1; }// for blk }// for mbn align_get_bits(gb); return 0; }


static void assigned_dev_ioport_write(void *opaque, target_phys_addr_t addr, uint64_t data, unsigned size) { assigned_dev_ioport_rw(opaque, addr, size, &data); }


static int kvm_put_fpu(CPUState *env) { struct kvm_fpu fpu; int i; memset(&fpu, 0, sizeof fpu); fpu.fsw = env->fpus & ~(7 << 11); fpu.fsw |= (env->fpstt & 7) << 11; fpu.fcw = env->fpuc; for (i = 0; i < 8; ++i) fpu.ftwx |= (!env->fptags[i]) << i; memcpy(fpu.fpr, env->fpregs, sizeof env->fpregs); memcpy(fpu.xmm, env->xmm_regs, sizeof env->xmm_regs); fpu.mxcsr = env->mxcsr; return kvm_vcpu_ioctl(env, KVM_SET_FPU, &fpu); }


target_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length, struct disassemble_info *info) { int i; for(i = 0; i < length; i++) { myaddr[i] = ldub_code(memaddr + i); } return 0; }


static int http_connect(URLContext *h, const char *path, const char *hoststr, const char *auth, int *new_location) { HTTPContext *s = h->priv_data; int post, err, ch; char line[1024], *q; char *auth_b64; int auth_b64_len = strlen(auth)* 4 / 3 + 12; int64_t off = s->off; /* send http header */ post = h->flags & URL_WRONLY; auth_b64 = av_malloc(auth_b64_len); av_base64_encode(auth_b64, auth_b64_len, auth, strlen(auth)); snprintf(s->buffer, sizeof(s->buffer), "%s %s HTTP/1.1\r\n" "User-Agent: %s\r\n" "Accept: */*\r\n" "Range: bytes=%"PRId64"-\r\n" "Host: %s\r\n" "Authorization: Basic %s\r\n" "Connection: close\r\n" "\r\n", post ? "POST" : "GET", path, LIBAVFORMAT_IDENT, s->off, hoststr, auth_b64); av_freep(&auth_b64); if (http_write(h, s->buffer, strlen(s->buffer)) < 0) return AVERROR(EIO); /* init input buffer */ s->buf_ptr = s->buffer; s->buf_end = s->buffer; s->line_count = 0; s->off = 0; s->filesize = -1; if (post) { return 0; } /* wait for header */ q = line; for(;;) { ch = http_getc(s); if (ch < 0) return AVERROR(EIO); if (ch == '\n') { /* process line */ if (q > line && q[-1] == '\r') q--; *q = '\0'; #ifdef DEBUG printf("header='%s'\n", line); #endif err = process_line(h, line, s->line_count, new_location); if (err < 0) return err; if (err == 0) break; s->line_count++; q = line; } else { if ((q - line) < sizeof(line) - 1) *q++ = ch; } } return (off == s->off) ? 0 : -1; }


static void set_guest_connected(VirtIOSerialPort *port, int guest_connected) { VirtConsole *vcon = VIRTIO_CONSOLE(port); DeviceState *dev = DEVICE(port); if (vcon->chr) { qemu_chr_fe_set_open(vcon->chr, guest_connected); } if (dev->id) { qapi_event_send_vserport_change(dev->id, guest_connected, &error_abort); } }


void error_setg_errno(Error **errp, int os_errno, const char *fmt, ...) { va_list ap; char *msg; int saved_errno = errno; if (errp == NULL) { return; } va_start(ap, fmt); error_setv(errp, ERROR_CLASS_GENERIC_ERROR, fmt, ap); va_end(ap); if (os_errno != 0) { msg = (*errp)->msg; (*errp)->msg = g_strdup_printf("%s: %s", msg, strerror(os_errno)); g_free(msg); } errno = saved_errno; }


void bitmap_set(unsigned long *map, long start, long nr) { unsigned long *p = map + BIT_WORD(start); const long size = start + nr; int bits_to_set = BITS_PER_LONG - (start % BITS_PER_LONG); unsigned long mask_to_set = BITMAP_FIRST_WORD_MASK(start); while (nr - bits_to_set >= 0) { *p |= mask_to_set; nr -= bits_to_set; bits_to_set = BITS_PER_LONG; mask_to_set = ~0UL; p++; } if (nr) { mask_to_set &= BITMAP_LAST_WORD_MASK(size); *p |= mask_to_set; } }


static void vmdk_free_extents(BlockDriverState *bs) { int i; BDRVVmdkState *s = bs->opaque; for (i = 0; i < s->num_extents; i++) { g_free(s->extents[i].l1_table); g_free(s->extents[i].l2_cache); g_free(s->extents[i].l1_backup_table); } g_free(s->extents); }


static void console_putchar(TextConsole *s, int ch) { TextCell *c; int y1, i; int x, y; switch(s->state) { case TTY_STATE_NORM: switch(ch) { case '\r': /* carriage return */ s->x = 0; break; case '\n': /* newline */ console_put_lf(s); break; case '\b': /* backspace */ if (s->x > 0) s->x--; break; case '\t': /* tabspace */ if (s->x + (8 - (s->x % 8)) > s->width) { s->x = 0; console_put_lf(s); } else { s->x = s->x + (8 - (s->x % 8)); } break; case '\a': /* alert aka. bell */ /* TODO: has to be implemented */ break; case 14: /* SI (shift in), character set 0 (ignored) */ break; case 15: /* SO (shift out), character set 1 (ignored) */ break; case 27: /* esc (introducing an escape sequence) */ s->state = TTY_STATE_ESC; break; default: if (s->x >= s->width) { /* line wrap */ s->x = 0; console_put_lf(s); } y1 = (s->y_base + s->y) % s->total_height; c = &s->cells[y1 * s->width + s->x]; c->ch = ch; c->t_attrib = s->t_attrib; update_xy(s, s->x, s->y); s->x++; break; } break; case TTY_STATE_ESC: /* check if it is a terminal escape sequence */ if (ch == '[') { for(i=0;i<MAX_ESC_PARAMS;i++) s->esc_params[i] = 0; s->nb_esc_params = 0; s->state = TTY_STATE_CSI; } else { s->state = TTY_STATE_NORM; } break; case TTY_STATE_CSI: /* handle escape sequence parameters */ if (ch >= '0' && ch <= '9') { if (s->nb_esc_params < MAX_ESC_PARAMS) { s->esc_params[s->nb_esc_params] = s->esc_params[s->nb_esc_params] * 10 + ch - '0'; } } else { s->nb_esc_params++; if (ch == ';') break; #ifdef DEBUG_CONSOLE fprintf(stderr, "escape sequence CSI%d;%d%c, %d parameters\n", s->esc_params[0], s->esc_params[1], ch, s->nb_esc_params); #endif s->state = TTY_STATE_NORM; switch(ch) { case 'A': /* move cursor up */ if (s->esc_params[0] == 0) { s->esc_params[0] = 1; } s->y -= s->esc_params[0]; if (s->y < 0) { s->y = 0; } break; case 'B': /* move cursor down */ if (s->esc_params[0] == 0) { s->esc_params[0] = 1; } s->y += s->esc_params[0]; if (s->y >= s->height) { s->y = s->height - 1; } break; case 'C': /* move cursor right */ if (s->esc_params[0] == 0) { s->esc_params[0] = 1; } s->x += s->esc_params[0]; if (s->x >= s->width) { s->x = s->width - 1; } break; case 'D': /* move cursor left */ if (s->esc_params[0] == 0) { s->esc_params[0] = 1; } s->x -= s->esc_params[0]; if (s->x < 0) { s->x = 0; } break; case 'G': /* move cursor to column */ s->x = s->esc_params[0] - 1; if (s->x < 0) { s->x = 0; } break; case 'f': case 'H': /* move cursor to row, column */ s->x = s->esc_params[1] - 1; if (s->x < 0) { s->x = 0; } s->y = s->esc_params[0] - 1; if (s->y < 0) { s->y = 0; } break; case 'J': switch (s->esc_params[0]) { case 0: /* clear to end of screen */ for (y = s->y; y < s->height; y++) { for (x = 0; x < s->width; x++) { if (y == s->y && x < s->x) { continue; } console_clear_xy(s, x, y); } } break; case 1: /* clear from beginning of screen */ for (y = 0; y <= s->y; y++) { for (x = 0; x < s->width; x++) { if (y == s->y && x > s->x) { break; } console_clear_xy(s, x, y); } } break; case 2: /* clear entire screen */ for (y = 0; y <= s->height; y++) { for (x = 0; x < s->width; x++) { console_clear_xy(s, x, y); } } break; } break; case 'K': switch (s->esc_params[0]) { case 0: /* clear to eol */ for(x = s->x; x < s->width; x++) { console_clear_xy(s, x, s->y); } break; case 1: /* clear from beginning of line */ for (x = 0; x <= s->x; x++) { console_clear_xy(s, x, s->y); } break; case 2: /* clear entire line */ for(x = 0; x < s->width; x++) { console_clear_xy(s, x, s->y); } break; } break; case 'm': console_handle_escape(s); break; case 'n': /* report cursor position */ /* TODO: send ESC[row;colR */ break; case 's': /* save cursor position */ s->x_saved = s->x; s->y_saved = s->y; break; case 'u': /* restore cursor position */ s->x = s->x_saved; s->y = s->y_saved; break; default: #ifdef DEBUG_CONSOLE fprintf(stderr, "unhandled escape character '%c'\n", ch); #endif break; } break; } } }


static void blkverify_err(BlkverifyAIOCB *acb, const char *fmt, ...) { va_list ap; va_start(ap, fmt); fprintf(stderr, "blkverify: %s sector_num=%ld nb_sectors=%d ", acb->is_write ? "write" : "read", acb->sector_num, acb->nb_sectors); vfprintf(stderr, fmt, ap); fprintf(stderr, "\n"); va_end(ap); exit(1); }


static void format_line(void *ptr, int level, const char *fmt, va_list vl, char part[3][512], int part_size, int *print_prefix, int type[2]) { AVClass* avc = ptr ? *(AVClass **) ptr : NULL; part[0][0] = part[1][0] = part[2][0] = 0; if(type) type[0] = type[1] = AV_CLASS_CATEGORY_NA + 16; if (*print_prefix && avc) { if (avc->parent_log_context_offset) { AVClass** parent = *(AVClass ***) (((uint8_t *) ptr) + avc->parent_log_context_offset); if (parent && *parent) { snprintf(part[0], part_size, "[%s @ %p] ", (*parent)->item_name(parent), parent); if(type) type[0] = get_category(((uint8_t *) ptr) + avc->parent_log_context_offset); } } snprintf(part[1], part_size, "[%s @ %p] ", avc->item_name(ptr), ptr); if(type) type[1] = get_category(ptr); } vsnprintf(part[2], part_size, fmt, vl); *print_prefix = strlen(part[2]) && part[2][strlen(part[2]) - 1] == '\n'; }


find_c_packed_planar_out_funcs(SwsContext *c, yuv2planar1_fn *yuv2yuv1, yuv2planarX_fn *yuv2yuvX, yuv2packed1_fn *yuv2packed1, yuv2packed2_fn *yuv2packed2, yuv2packedX_fn *yuv2packedX) { enum PixelFormat dstFormat = c->dstFormat; if (dstFormat == PIX_FMT_NV12 || dstFormat == PIX_FMT_NV21) { *yuv2yuvX = yuv2nv12X_c; } else if (is16BPS(dstFormat)) { *yuv2yuvX = isBE(dstFormat) ? yuv2yuvX16BE_c : yuv2yuvX16LE_c; } else if (is9_OR_10BPS(dstFormat)) { if (av_pix_fmt_descriptors[dstFormat].comp[0].depth_minus1 == 8) { *yuv2yuvX = isBE(dstFormat) ? yuv2yuvX9BE_c : yuv2yuvX9LE_c; } else { *yuv2yuvX = isBE(dstFormat) ? yuv2yuvX10BE_c : yuv2yuvX10LE_c; } } else { *yuv2yuv1 = yuv2yuv1_c; *yuv2yuvX = yuv2yuvX_c; } if(c->flags & SWS_FULL_CHR_H_INT) { switch (dstFormat) { case PIX_FMT_RGBA: #if CONFIG_SMALL *yuv2packedX = yuv2rgba32_full_X_c; #else #if CONFIG_SWSCALE_ALPHA if (c->alpPixBuf) { *yuv2packedX = yuv2rgba32_full_X_c; } else #endif /* CONFIG_SWSCALE_ALPHA */ { *yuv2packedX = yuv2rgbx32_full_X_c; } #endif /* !CONFIG_SMALL */ break; case PIX_FMT_ARGB: #if CONFIG_SMALL *yuv2packedX = yuv2argb32_full_X_c; #else #if CONFIG_SWSCALE_ALPHA if (c->alpPixBuf) { *yuv2packedX = yuv2argb32_full_X_c; } else #endif /* CONFIG_SWSCALE_ALPHA */ { *yuv2packedX = yuv2xrgb32_full_X_c; } #endif /* !CONFIG_SMALL */ break; case PIX_FMT_BGRA: #if CONFIG_SMALL *yuv2packedX = yuv2bgra32_full_X_c; #else #if CONFIG_SWSCALE_ALPHA if (c->alpPixBuf) { *yuv2packedX = yuv2bgra32_full_X_c; } else #endif /* CONFIG_SWSCALE_ALPHA */ { *yuv2packedX = yuv2bgrx32_full_X_c; } #endif /* !CONFIG_SMALL */ break; case PIX_FMT_ABGR: #if CONFIG_SMALL *yuv2packedX = yuv2abgr32_full_X_c; #else #if CONFIG_SWSCALE_ALPHA if (c->alpPixBuf) { *yuv2packedX = yuv2abgr32_full_X_c; } else #endif /* CONFIG_SWSCALE_ALPHA */ { *yuv2packedX = yuv2xbgr32_full_X_c; } #endif /* !CONFIG_SMALL */ break; case PIX_FMT_RGB24: *yuv2packedX = yuv2rgb24_full_X_c; break; case PIX_FMT_BGR24: *yuv2packedX = yuv2bgr24_full_X_c; break; } } else { switch (dstFormat) { case PIX_FMT_GRAY16BE: *yuv2packed1 = yuv2gray16BE_1_c; *yuv2packed2 = yuv2gray16BE_2_c; *yuv2packedX = yuv2gray16BE_X_c; break; case PIX_FMT_GRAY16LE: *yuv2packed1 = yuv2gray16LE_1_c; *yuv2packed2 = yuv2gray16LE_2_c; *yuv2packedX = yuv2gray16LE_X_c; break; case PIX_FMT_MONOWHITE: *yuv2packed1 = yuv2monowhite_1_c; *yuv2packed2 = yuv2monowhite_2_c; *yuv2packedX = yuv2monowhite_X_c; break; case PIX_FMT_MONOBLACK: *yuv2packed1 = yuv2monoblack_1_c; *yuv2packed2 = yuv2monoblack_2_c; *yuv2packedX = yuv2monoblack_X_c; break; case PIX_FMT_YUYV422: *yuv2packed1 = yuv2yuyv422_1_c; *yuv2packed2 = yuv2yuyv422_2_c; *yuv2packedX = yuv2yuyv422_X_c; break; case PIX_FMT_UYVY422: *yuv2packed1 = yuv2uyvy422_1_c; *yuv2packed2 = yuv2uyvy422_2_c; *yuv2packedX = yuv2uyvy422_X_c; break; case PIX_FMT_RGB48LE: //*yuv2packed1 = yuv2rgb48le_1_c; //*yuv2packed2 = yuv2rgb48le_2_c; //*yuv2packedX = yuv2rgb48le_X_c; //break; case PIX_FMT_RGB48BE: *yuv2packed1 = yuv2rgb48be_1_c; *yuv2packed2 = yuv2rgb48be_2_c; *yuv2packedX = yuv2rgb48be_X_c; break; case PIX_FMT_BGR48LE: //*yuv2packed1 = yuv2bgr48le_1_c; //*yuv2packed2 = yuv2bgr48le_2_c; //*yuv2packedX = yuv2bgr48le_X_c; //break; case PIX_FMT_BGR48BE: *yuv2packed1 = yuv2bgr48be_1_c; *yuv2packed2 = yuv2bgr48be_2_c; *yuv2packedX = yuv2bgr48be_X_c; break; case PIX_FMT_RGB32: case PIX_FMT_BGR32: #if CONFIG_SMALL *yuv2packed1 = yuv2rgb32_1_c; *yuv2packed2 = yuv2rgb32_2_c; *yuv2packedX = yuv2rgb32_X_c; #else #if CONFIG_SWSCALE_ALPHA if (c->alpPixBuf) { *yuv2packed1 = yuv2rgba32_1_c; *yuv2packed2 = yuv2rgba32_2_c; *yuv2packedX = yuv2rgba32_X_c; } else #endif /* CONFIG_SWSCALE_ALPHA */ { *yuv2packed1 = yuv2rgbx32_1_c; *yuv2packed2 = yuv2rgbx32_2_c; *yuv2packedX = yuv2rgbx32_X_c; } #endif /* !CONFIG_SMALL */ break; case PIX_FMT_RGB32_1: case PIX_FMT_BGR32_1: #if CONFIG_SMALL *yuv2packed1 = yuv2rgb32_1_1_c; *yuv2packed2 = yuv2rgb32_1_2_c; *yuv2packedX = yuv2rgb32_1_X_c; #else #if CONFIG_SWSCALE_ALPHA if (c->alpPixBuf) { *yuv2packed1 = yuv2rgba32_1_1_c; *yuv2packed2 = yuv2rgba32_1_2_c; *yuv2packedX = yuv2rgba32_1_X_c; } else #endif /* CONFIG_SWSCALE_ALPHA */ { *yuv2packed1 = yuv2rgbx32_1_1_c; *yuv2packed2 = yuv2rgbx32_1_2_c; *yuv2packedX = yuv2rgbx32_1_X_c; } #endif /* !CONFIG_SMALL */ break; case PIX_FMT_RGB24: *yuv2packed1 = yuv2rgb24_1_c; *yuv2packed2 = yuv2rgb24_2_c; *yuv2packedX = yuv2rgb24_X_c; break; case PIX_FMT_BGR24: *yuv2packed1 = yuv2bgr24_1_c; *yuv2packed2 = yuv2bgr24_2_c; *yuv2packedX = yuv2bgr24_X_c; break; case PIX_FMT_RGB565: case PIX_FMT_BGR565: *yuv2packed1 = yuv2rgb16_1_c; *yuv2packed2 = yuv2rgb16_2_c; *yuv2packedX = yuv2rgb16_X_c; break; case PIX_FMT_RGB555: case PIX_FMT_BGR555: *yuv2packed1 = yuv2rgb15_1_c; *yuv2packed2 = yuv2rgb15_2_c; *yuv2packedX = yuv2rgb15_X_c; break; case PIX_FMT_RGB444: case PIX_FMT_BGR444: *yuv2packed1 = yuv2rgb12_1_c; *yuv2packed2 = yuv2rgb12_2_c; *yuv2packedX = yuv2rgb12_X_c; break; case PIX_FMT_RGB8: case PIX_FMT_BGR8: *yuv2packed1 = yuv2rgb8_1_c; *yuv2packed2 = yuv2rgb8_2_c; *yuv2packedX = yuv2rgb8_X_c; break; case PIX_FMT_RGB4: case PIX_FMT_BGR4: *yuv2packed1 = yuv2rgb4_1_c; *yuv2packed2 = yuv2rgb4_2_c; *yuv2packedX = yuv2rgb4_X_c; break; case PIX_FMT_RGB4_BYTE: case PIX_FMT_BGR4_BYTE: *yuv2packed1 = yuv2rgb4b_1_c; *yuv2packed2 = yuv2rgb4b_2_c; *yuv2packedX = yuv2rgb4b_X_c; break; } } }


static av_always_inline void h264_filter_mb_fast_internal(H264Context *h, int mb_x, int mb_y, uint8_t *img_y, uint8_t *img_cb, uint8_t *img_cr, unsigned int linesize, unsigned int uvlinesize, int pixel_shift) { int chroma = !(CONFIG_GRAY && (h->flags&CODEC_FLAG_GRAY)); int chroma444 = CHROMA444(h); int chroma422 = CHROMA422(h); int mb_xy = h->mb_xy; int left_type= h->left_type[LTOP]; int top_type= h->top_type; int qp_bd_offset = 6 * (h->sps.bit_depth_luma - 8); int a = h->slice_alpha_c0_offset - qp_bd_offset; int b = h->slice_beta_offset - qp_bd_offset; int mb_type = h->cur_pic.mb_type[mb_xy]; int qp = h->cur_pic.qscale_table[mb_xy]; int qp0 = h->cur_pic.qscale_table[mb_xy - 1]; int qp1 = h->cur_pic.qscale_table[h->top_mb_xy]; int qpc = get_chroma_qp( h, 0, qp ); int qpc0 = get_chroma_qp( h, 0, qp0 ); int qpc1 = get_chroma_qp( h, 0, qp1 ); qp0 = (qp + qp0 + 1) >> 1; qp1 = (qp + qp1 + 1) >> 1; qpc0 = (qpc + qpc0 + 1) >> 1; qpc1 = (qpc + qpc1 + 1) >> 1; if( IS_INTRA(mb_type) ) { static const int16_t bS4[4] = {4,4,4,4}; static const int16_t bS3[4] = {3,3,3,3}; const int16_t *bSH = FIELD_PICTURE(h) ? bS3 : bS4; if(left_type) filter_mb_edgev( &img_y[4*0<<pixel_shift], linesize, bS4, qp0, a, b, h, 1); if( IS_8x8DCT(mb_type) ) { filter_mb_edgev( &img_y[4*2<<pixel_shift], linesize, bS3, qp, a, b, h, 0); if(top_type){ filter_mb_edgeh( &img_y[4*0*linesize], linesize, bSH, qp1, a, b, h, 1); } filter_mb_edgeh( &img_y[4*2*linesize], linesize, bS3, qp, a, b, h, 0); } else { filter_mb_edgev( &img_y[4*1<<pixel_shift], linesize, bS3, qp, a, b, h, 0); filter_mb_edgev( &img_y[4*2<<pixel_shift], linesize, bS3, qp, a, b, h, 0); filter_mb_edgev( &img_y[4*3<<pixel_shift], linesize, bS3, qp, a, b, h, 0); if(top_type){ filter_mb_edgeh( &img_y[4*0*linesize], linesize, bSH, qp1, a, b, h, 1); } filter_mb_edgeh( &img_y[4*1*linesize], linesize, bS3, qp, a, b, h, 0); filter_mb_edgeh( &img_y[4*2*linesize], linesize, bS3, qp, a, b, h, 0); filter_mb_edgeh( &img_y[4*3*linesize], linesize, bS3, qp, a, b, h, 0); } if(chroma){ if(chroma444){ if(left_type){ filter_mb_edgev( &img_cb[4*0<<pixel_shift], linesize, bS4, qpc0, a, b, h, 1); filter_mb_edgev( &img_cr[4*0<<pixel_shift], linesize, bS4, qpc0, a, b, h, 1); } if( IS_8x8DCT(mb_type) ) { filter_mb_edgev( &img_cb[4*2<<pixel_shift], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgev( &img_cr[4*2<<pixel_shift], linesize, bS3, qpc, a, b, h, 0); if(top_type){ filter_mb_edgeh( &img_cb[4*0*linesize], linesize, bSH, qpc1, a, b, h, 1 ); filter_mb_edgeh( &img_cr[4*0*linesize], linesize, bSH, qpc1, a, b, h, 1 ); } filter_mb_edgeh( &img_cb[4*2*linesize], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgeh( &img_cr[4*2*linesize], linesize, bS3, qpc, a, b, h, 0); } else { filter_mb_edgev( &img_cb[4*1<<pixel_shift], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgev( &img_cr[4*1<<pixel_shift], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgev( &img_cb[4*2<<pixel_shift], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgev( &img_cr[4*2<<pixel_shift], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgev( &img_cb[4*3<<pixel_shift], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgev( &img_cr[4*3<<pixel_shift], linesize, bS3, qpc, a, b, h, 0); if(top_type){ filter_mb_edgeh( &img_cb[4*0*linesize], linesize, bSH, qpc1, a, b, h, 1); filter_mb_edgeh( &img_cr[4*0*linesize], linesize, bSH, qpc1, a, b, h, 1); } filter_mb_edgeh( &img_cb[4*1*linesize], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgeh( &img_cr[4*1*linesize], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgeh( &img_cb[4*2*linesize], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgeh( &img_cr[4*2*linesize], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgeh( &img_cb[4*3*linesize], linesize, bS3, qpc, a, b, h, 0); filter_mb_edgeh( &img_cr[4*3*linesize], linesize, bS3, qpc, a, b, h, 0); } }else if(chroma422){ if(left_type){ filter_mb_edgecv(&img_cb[2*0<<pixel_shift], uvlinesize, bS4, qpc0, a, b, h, 1); filter_mb_edgecv(&img_cr[2*0<<pixel_shift], uvlinesize, bS4, qpc0, a, b, h, 1); } filter_mb_edgecv(&img_cb[2*2<<pixel_shift], uvlinesize, bS3, qpc, a, b, h, 0); filter_mb_edgecv(&img_cr[2*2<<pixel_shift], uvlinesize, bS3, qpc, a, b, h, 0); if(top_type){ filter_mb_edgech(&img_cb[4*0*uvlinesize], uvlinesize, bSH, qpc1, a, b, h, 1); filter_mb_edgech(&img_cr[4*0*uvlinesize], uvlinesize, bSH, qpc1, a, b, h, 1); } filter_mb_edgech(&img_cb[4*1*uvlinesize], uvlinesize, bS3, qpc, a, b, h, 0); filter_mb_edgech(&img_cr[4*1*uvlinesize], uvlinesize, bS3, qpc, a, b, h, 0); filter_mb_edgech(&img_cb[4*2*uvlinesize], uvlinesize, bS3, qpc, a, b, h, 0); filter_mb_edgech(&img_cr[4*2*uvlinesize], uvlinesize, bS3, qpc, a, b, h, 0); filter_mb_edgech(&img_cb[4*3*uvlinesize], uvlinesize, bS3, qpc, a, b, h, 0); filter_mb_edgech(&img_cr[4*3*uvlinesize], uvlinesize, bS3, qpc, a, b, h, 0); }else{ if(left_type){ filter_mb_edgecv( &img_cb[2*0<<pixel_shift], uvlinesize, bS4, qpc0, a, b, h, 1); filter_mb_edgecv( &img_cr[2*0<<pixel_shift], uvlinesize, bS4, qpc0, a, b, h, 1); } filter_mb_edgecv( &img_cb[2*2<<pixel_shift], uvlinesize, bS3, qpc, a, b, h, 0); filter_mb_edgecv( &img_cr[2*2<<pixel_shift], uvlinesize, bS3, qpc, a, b, h, 0); if(top_type){ filter_mb_edgech( &img_cb[2*0*uvlinesize], uvlinesize, bSH, qpc1, a, b, h, 1); filter_mb_edgech( &img_cr[2*0*uvlinesize], uvlinesize, bSH, qpc1, a, b, h, 1); } filter_mb_edgech( &img_cb[2*2*uvlinesize], uvlinesize, bS3, qpc, a, b, h, 0); filter_mb_edgech( &img_cr[2*2*uvlinesize], uvlinesize, bS3, qpc, a, b, h, 0); } } return; } else { LOCAL_ALIGNED_8(int16_t, bS, [2], [4][4]); int edges; if( IS_8x8DCT(mb_type) && (h->cbp&7) == 7 && !chroma444 ) { edges = 4; AV_WN64A(bS[0][0], 0x0002000200020002ULL); AV_WN64A(bS[0][2], 0x0002000200020002ULL); AV_WN64A(bS[1][0], 0x0002000200020002ULL); AV_WN64A(bS[1][2], 0x0002000200020002ULL); } else { int mask_edge1 = (3*(((5*mb_type)>>5)&1)) | (mb_type>>4); //(mb_type & (MB_TYPE_16x16 | MB_TYPE_8x16)) ? 3 : (mb_type & MB_TYPE_16x8) ? 1 : 0; int mask_edge0 = 3*((mask_edge1>>1) & ((5*left_type)>>5)&1); // (mb_type & (MB_TYPE_16x16 | MB_TYPE_8x16)) && (h->left_type[LTOP] & (MB_TYPE_16x16 | MB_TYPE_8x16)) ? 3 : 0; int step = 1+(mb_type>>24); //IS_8x8DCT(mb_type) ? 2 : 1; edges = 4 - 3*((mb_type>>3) & !(h->cbp & 15)); //(mb_type & MB_TYPE_16x16) && !(h->cbp & 15) ? 1 : 4; h->h264dsp.h264_loop_filter_strength( bS, h->non_zero_count_cache, h->ref_cache, h->mv_cache, h->list_count==2, edges, step, mask_edge0, mask_edge1, FIELD_PICTURE(h)); } if( IS_INTRA(left_type) ) AV_WN64A(bS[0][0], 0x0004000400040004ULL); if( IS_INTRA(top_type) ) AV_WN64A(bS[1][0], FIELD_PICTURE(h) ? 0x0003000300030003ULL : 0x0004000400040004ULL); #define FILTER(hv,dir,edge,intra)\ if(AV_RN64A(bS[dir][edge])) { \ filter_mb_edge##hv( &img_y[4*edge*(dir?linesize:1<<pixel_shift)], linesize, bS[dir][edge], edge ? qp : qp##dir, a, b, h, intra );\ if(chroma){\ if(chroma444){\ filter_mb_edge##hv( &img_cb[4*edge*(dir?linesize:1<<pixel_shift)], linesize, bS[dir][edge], edge ? qpc : qpc##dir, a, b, h, intra );\ filter_mb_edge##hv( &img_cr[4*edge*(dir?linesize:1<<pixel_shift)], linesize, bS[dir][edge], edge ? qpc : qpc##dir, a, b, h, intra );\ } else if(!(edge&1)) {\ filter_mb_edgec##hv( &img_cb[2*edge*(dir?uvlinesize:1<<pixel_shift)], uvlinesize, bS[dir][edge], edge ? qpc : qpc##dir, a, b, h, intra );\ filter_mb_edgec##hv( &img_cr[2*edge*(dir?uvlinesize:1<<pixel_shift)], uvlinesize, bS[dir][edge], edge ? qpc : qpc##dir, a, b, h, intra );\ }\ }\ } if(left_type) FILTER(v,0,0,1); if( edges == 1 ) { if(top_type) FILTER(h,1,0,1); } else if( IS_8x8DCT(mb_type) ) { FILTER(v,0,2,0); if(top_type) FILTER(h,1,0,1); FILTER(h,1,2,0); } else { FILTER(v,0,1,0); FILTER(v,0,2,0); FILTER(v,0,3,0); if(top_type) FILTER(h,1,0,1); FILTER(h,1,1,0); FILTER(h,1,2,0); FILTER(h,1,3,0); } #undef FILTER } }


static int h263_decode_init(AVCodecContext *avctx) { MpegEncContext *s = avctx->priv_data; int i; s->avctx = avctx; s->out_format = FMT_H263; s->width = avctx->width; s->height = avctx->height; /* select sub codec */ switch(avctx->codec->id) { case CODEC_ID_H263: s->gob_number = 0; s->first_gob_line = 0; break; case CODEC_ID_MPEG4: s->time_increment_bits = 4; /* default value for broken headers */ s->h263_pred = 1; s->has_b_frames = 1; //default, might be overriden in the vol header during header parsing break; case CODEC_ID_MSMPEG4V1: s->h263_msmpeg4 = 1; s->h263_pred = 1; s->msmpeg4_version=1; break; case CODEC_ID_MSMPEG4V2: s->h263_msmpeg4 = 1; s->h263_pred = 1; s->msmpeg4_version=2; break; case CODEC_ID_MSMPEG4V3: s->h263_msmpeg4 = 1; s->h263_pred = 1; s->msmpeg4_version=3; break; case CODEC_ID_WMV1: s->h263_msmpeg4 = 1; s->h263_pred = 1; s->msmpeg4_version=4; break; case CODEC_ID_H263I: s->h263_intel = 1; break; default: return -1; } /* for h263, we allocate the images after having read the header */ if (avctx->codec->id != CODEC_ID_H263 && avctx->codec->id != CODEC_ID_MPEG4) if (MPV_common_init(s) < 0) return -1; /* XXX: suppress this matrix init, only needed because using mpeg1 dequantize in mmx case */ for(i=0;i<64;i++) s->non_intra_matrix[i] = default_non_intra_matrix[i]; if (s->h263_msmpeg4) msmpeg4_decode_init_vlc(s); else h263_decode_init_vlc(s); return 0; }


static int spdif_write_packet(struct AVFormatContext *s, AVPacket *pkt) { IEC958Context *ctx = s->priv_data; int ret, padding; ctx->out_bytes = pkt->size; ctx->length_code = FFALIGN(pkt->size, 2) << 3; ret = ctx->header_info(s, pkt); if (ret < 0) return -1; if (!ctx->pkt_offset) return 0; padding = (ctx->pkt_offset - BURST_HEADER_SIZE - ctx->out_bytes) >> 1; if (padding < 0) { av_log(s, AV_LOG_ERROR, "bitrate is too high\n"); return -1; } put_le16(s->pb, SYNCWORD1); //Pa put_le16(s->pb, SYNCWORD2); //Pb put_le16(s->pb, ctx->data_type); //Pc put_le16(s->pb, ctx->length_code);//Pd #if HAVE_BIGENDIAN put_buffer(s->pb, ctx->out_buf, ctx->out_bytes & ~1); #else av_fast_malloc(&ctx->buffer, &ctx->buffer_size, ctx->out_bytes + FF_INPUT_BUFFER_PADDING_SIZE); if (!ctx->buffer) return AVERROR(ENOMEM); ff_spdif_bswap_buf16((uint16_t *)ctx->buffer, (uint16_t *)ctx->out_buf, ctx->out_bytes >> 1); put_buffer(s->pb, ctx->buffer, ctx->out_bytes & ~1); #endif if (ctx->out_bytes & 1) put_be16(s->pb, ctx->out_buf[ctx->out_bytes - 1]); for (; padding > 0; padding--) put_be16(s->pb, 0); av_log(s, AV_LOG_DEBUG, "type=%x len=%i pkt_offset=%i\n", ctx->data_type, ctx->out_bytes, ctx->pkt_offset); put_flush_packet(s->pb); return 0; }


static void blkverify_refresh_filename(BlockDriverState *bs, QDict *options) { BDRVBlkverifyState *s = bs->opaque; /* bs->file->bs has already been refreshed */ bdrv_refresh_filename(s->test_file->bs); if (bs->file->bs->full_open_options && s->test_file->bs->full_open_options) { QDict *opts = qdict_new(); qdict_put_str(opts, "driver", "blkverify"); QINCREF(bs->file->bs->full_open_options); qdict_put(opts, "raw", bs->file->bs->full_open_options); QINCREF(s->test_file->bs->full_open_options); qdict_put(opts, "test", s->test_file->bs->full_open_options); bs->full_open_options = opts; } if (bs->file->bs->exact_filename[0] && s->test_file->bs->exact_filename[0]) { snprintf(bs->exact_filename, sizeof(bs->exact_filename), "blkverify:%s:%s", bs->file->bs->exact_filename, s->test_file->bs->exact_filename); } }


static int ffmmal_read_frame(AVCodecContext *avctx, AVFrame *frame, int *got_frame) { MMALDecodeContext *ctx = avctx->priv_data; MMAL_BUFFER_HEADER_T *buffer = NULL; MMAL_STATUS_T status = 0; int ret = 0; if (ctx->eos_received) goto done; while (1) { // To ensure decoding in lockstep with a constant delay between fed packets // and output frames, we always wait until an output buffer is available. // Except during start we don't know after how many input packets the decoder // is going to return the first buffer, and we can't distinguish decoder // being busy from decoder waiting for input. So just poll at the start and // keep feeding new data to the buffer. // We are pretty sure the decoder will produce output if we sent more input // frames than what a h264 decoder could logically delay. This avoids too // excessive buffering. // We also wait if we sent eos, but didn't receive it yet (think of decoding // stream with a very low number of frames). if (ctx->frames_output || ctx->packets_sent > MAX_DELAYED_FRAMES || ctx->eos_sent) { buffer = mmal_queue_wait(ctx->queue_decoded_frames); } else { buffer = mmal_queue_get(ctx->queue_decoded_frames); } if (!buffer) goto done; ctx->eos_received |= !!(buffer->flags & MMAL_BUFFER_HEADER_FLAG_EOS); if (ctx->eos_received) goto done; if (buffer->cmd == MMAL_EVENT_FORMAT_CHANGED) { MMAL_COMPONENT_T *decoder = ctx->decoder; MMAL_EVENT_FORMAT_CHANGED_T *ev = mmal_event_format_changed_get(buffer); MMAL_BUFFER_HEADER_T *stale_buffer; av_log(avctx, AV_LOG_INFO, "Changing output format.\n"); if ((status = mmal_port_disable(decoder->output[0]))) goto done; while ((stale_buffer = mmal_queue_get(ctx->queue_decoded_frames))) mmal_buffer_header_release(stale_buffer); mmal_format_copy(decoder->output[0]->format, ev->format); if ((ret = ffmal_update_format(avctx)) < 0) goto done; if ((status = mmal_port_enable(decoder->output[0], output_callback))) goto done; if ((ret = ffmmal_fill_output_port(avctx)) < 0) goto done; if ((ret = ffmmal_fill_input_port(avctx)) < 0) goto done; mmal_buffer_header_release(buffer); continue; } else if (buffer->cmd) { char s[20]; av_get_codec_tag_string(s, sizeof(s), buffer->cmd); av_log(avctx, AV_LOG_WARNING, "Unknown MMAL event %s on output port\n", s); goto done; } else if (buffer->length == 0) { // Unused output buffer that got drained after format change. mmal_buffer_header_release(buffer); continue; } ctx->frames_output++; if ((ret = ffmal_copy_frame(avctx, frame, buffer)) < 0) goto done; *got_frame = 1; break; } done: if (buffer) mmal_buffer_header_release(buffer); if (status && ret >= 0) ret = AVERROR_UNKNOWN; return ret; }


void ff_sbrdsp_init_x86(SBRDSPContext *s) { if (HAVE_YASM) { int mm_flags = av_get_cpu_flags(); if (mm_flags & AV_CPU_FLAG_SSE) { s->sum_square = ff_sbr_sum_square_sse; s->hf_g_filt = ff_sbr_hf_g_filt_sse; } } }


static int usb_host_handle_control(USBHostDevice *s, USBPacket *p) { struct usbdevfs_urb *urb; AsyncURB *aurb; int ret, value, index; /* * Process certain standard device requests. * These are infrequent and are processed synchronously. */ value = le16_to_cpu(s->ctrl.req.wValue); index = le16_to_cpu(s->ctrl.req.wIndex); dprintf("husb: ctrl type 0x%x req 0x%x val 0x%x index %u len %u\n", s->ctrl.req.bRequestType, s->ctrl.req.bRequest, value, index, s->ctrl.len); if (s->ctrl.req.bRequestType == 0) { switch (s->ctrl.req.bRequest) { case USB_REQ_SET_ADDRESS: return usb_host_set_address(s, value); case USB_REQ_SET_CONFIGURATION: return usb_host_set_config(s, value & 0xff); } } if (s->ctrl.req.bRequestType == 1 && s->ctrl.req.bRequest == USB_REQ_SET_INTERFACE) return usb_host_set_interface(s, index, value); /* The rest are asynchronous */ aurb = async_alloc(); aurb->hdev = s; aurb->packet = p; /* * Setup ctrl transfer. * * s->ctrl is layed out such that data buffer immediately follows * 'req' struct which is exactly what usbdevfs expects. */ urb = &aurb->urb; urb->type = USBDEVFS_URB_TYPE_CONTROL; urb->endpoint = p->devep; urb->buffer = &s->ctrl.req; urb->buffer_length = 8 + s->ctrl.len; urb->usercontext = s; ret = ioctl(s->fd, USBDEVFS_SUBMITURB, urb); dprintf("husb: submit ctrl. len %u aurb %p\n", urb->buffer_length, aurb); if (ret < 0) { dprintf("husb: submit failed. errno %d\n", errno); async_free(aurb); switch(errno) { case ETIMEDOUT: return USB_RET_NAK; case EPIPE: default: return USB_RET_STALL; } } usb_defer_packet(p, async_cancel, aurb); return USB_RET_ASYNC; }


static void pc_init1(MachineState *machine) { PCMachineState *pc_machine = PC_MACHINE(machine); MemoryRegion *system_memory = get_system_memory(); MemoryRegion *system_io = get_system_io(); int i; ram_addr_t below_4g_mem_size, above_4g_mem_size; PCIBus *pci_bus; ISABus *isa_bus; PCII440FXState *i440fx_state; int piix3_devfn = -1; qemu_irq *cpu_irq; qemu_irq *gsi; qemu_irq *i8259; qemu_irq *smi_irq; GSIState *gsi_state; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; BusState *idebus[MAX_IDE_BUS]; ISADevice *rtc_state; ISADevice *floppy; MemoryRegion *ram_memory; MemoryRegion *pci_memory; MemoryRegion *rom_memory; DeviceState *icc_bridge; FWCfgState *fw_cfg = NULL; PcGuestInfo *guest_info; ram_addr_t lowmem; /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory). * If it doesn't, we need to split it in chunks below and above 4G. * In any case, try to make sure that guest addresses aligned at * 1G boundaries get mapped to host addresses aligned at 1G boundaries. * For old machine types, use whatever split we used historically to avoid * breaking migration. */ if (machine->ram_size >= 0xe0000000) { lowmem = gigabyte_align ? 0xc0000000 : 0xe0000000; } else { lowmem = 0xe0000000; } /* Handle the machine opt max-ram-below-4g. It is basically doing * min(qemu limit, user limit). */ if (lowmem > pc_machine->max_ram_below_4g) { lowmem = pc_machine->max_ram_below_4g; if (machine->ram_size - lowmem > lowmem && lowmem & ((1ULL << 30) - 1)) { error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64 ") not a multiple of 1G; possible bad performance.", pc_machine->max_ram_below_4g); } } if (machine->ram_size >= lowmem) { above_4g_mem_size = machine->ram_size - lowmem; below_4g_mem_size = lowmem; } else { above_4g_mem_size = 0; below_4g_mem_size = machine->ram_size; } if (xen_enabled() && xen_hvm_init(&below_4g_mem_size, &above_4g_mem_size, &ram_memory) != 0) { fprintf(stderr, "xen hardware virtual machine initialisation failed\n"); exit(1); } icc_bridge = qdev_create(NULL, TYPE_ICC_BRIDGE); object_property_add_child(qdev_get_machine(), "icc-bridge", OBJECT(icc_bridge), NULL); pc_cpus_init(machine->cpu_model, icc_bridge); if (kvm_enabled() && kvmclock_enabled) { kvmclock_create(); } if (pci_enabled) { pci_memory = g_new(MemoryRegion, 1); memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); rom_memory = pci_memory; } else { pci_memory = NULL; rom_memory = system_memory; } guest_info = pc_guest_info_init(below_4g_mem_size, above_4g_mem_size); guest_info->has_acpi_build = has_acpi_build; guest_info->legacy_acpi_table_size = legacy_acpi_table_size; guest_info->isapc_ram_fw = !pci_enabled; guest_info->has_reserved_memory = has_reserved_memory; guest_info->rsdp_in_ram = rsdp_in_ram; if (smbios_defaults) { MachineClass *mc = MACHINE_GET_CLASS(machine); /* These values are guest ABI, do not change */ smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", mc->name, smbios_legacy_mode, smbios_uuid_encoded); } /* allocate ram and load rom/bios */ if (!xen_enabled()) { fw_cfg = pc_memory_init(machine, system_memory, below_4g_mem_size, above_4g_mem_size, rom_memory, &ram_memory, guest_info); } else if (machine->kernel_filename != NULL) { /* For xen HVM direct kernel boot, load linux here */ fw_cfg = xen_load_linux(machine->kernel_filename, machine->kernel_cmdline, machine->initrd_filename, below_4g_mem_size, guest_info); } gsi_state = g_malloc0(sizeof(*gsi_state)); if (kvm_irqchip_in_kernel()) { kvm_pc_setup_irq_routing(pci_enabled); gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, GSI_NUM_PINS); } else { gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); } if (pci_enabled) { pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi, system_memory, system_io, machine->ram_size, below_4g_mem_size, above_4g_mem_size, pci_memory, ram_memory); } else { pci_bus = NULL; i440fx_state = NULL; isa_bus = isa_bus_new(NULL, get_system_memory(), system_io); no_hpet = 1; } isa_bus_irqs(isa_bus, gsi); if (kvm_irqchip_in_kernel()) { i8259 = kvm_i8259_init(isa_bus); } else if (xen_enabled()) { i8259 = xen_interrupt_controller_init(); } else { cpu_irq = pc_allocate_cpu_irq(); i8259 = i8259_init(isa_bus, cpu_irq[0]); } for (i = 0; i < ISA_NUM_IRQS; i++) { gsi_state->i8259_irq[i] = i8259[i]; } if (pci_enabled) { ioapic_init_gsi(gsi_state, "i440fx"); } qdev_init_nofail(icc_bridge); pc_register_ferr_irq(gsi[13]); pc_vga_init(isa_bus, pci_enabled ? pci_bus : NULL); assert(pc_machine->vmport != ON_OFF_AUTO_MAX); if (pc_machine->vmport == ON_OFF_AUTO_AUTO) { pc_machine->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; } /* init basic PC hardware */ pc_basic_device_init(isa_bus, gsi, &rtc_state, true, &floppy, (pc_machine->vmport != ON_OFF_AUTO_ON), 0x4); pc_nic_init(isa_bus, pci_bus); ide_drive_get(hd, ARRAY_SIZE(hd)); if (pci_enabled) { PCIDevice *dev; if (xen_enabled()) { dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1); } else { dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); } idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); } else { for(i = 0; i < MAX_IDE_BUS; i++) { ISADevice *dev; char busname[] = "ide.0"; dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); /* * The ide bus name is ide.0 for the first bus and ide.1 for the * second one. */ busname[4] = '0' + i; idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); } } pc_cmos_init(below_4g_mem_size, above_4g_mem_size, machine->boot_order, machine, floppy, idebus[0], idebus[1], rtc_state); if (pci_enabled && usb_enabled()) { pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); } if (pci_enabled && acpi_enabled) { DeviceState *piix4_pm; I2CBus *smbus; smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1); /* TODO: Populate SPD eeprom data. */ smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, gsi[9], *smi_irq, kvm_enabled(), fw_cfg, &piix4_pm); smbus_eeprom_init(smbus, 8, NULL, 0); object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, TYPE_HOTPLUG_HANDLER, (Object **)&pc_machine->acpi_dev, object_property_allow_set_link, OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort); object_property_set_link(OBJECT(machine), OBJECT(piix4_pm), PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); } if (pci_enabled) { pc_pci_device_init(pci_bus); } }


static void parse_type_int64(Visitor *v, const char *name, int64_t *obj, Error **errp) { StringInputVisitor *siv = to_siv(v); if (!siv->string) { error_setg(errp, QERR_INVALID_PARAMETER_TYPE, name ? name : "null", "integer"); return; } parse_str(siv, errp); if (!siv->ranges) { goto error; } if (!siv->cur_range) { Range *r; siv->cur_range = g_list_first(siv->ranges); if (!siv->cur_range) { goto error; } r = siv->cur_range->data; if (!r) { goto error; } siv->cur = r->begin; } *obj = siv->cur; siv->cur++; return; error: error_setg(errp, QERR_INVALID_PARAMETER_VALUE, name ? name : "null", "an int64 value or range"); }


void qemu_chr_be_write(CharDriverState *s, uint8_t *buf, int len) { s->chr_read(s->handler_opaque, buf, len); }


static void virtio_set_status(struct subchannel_id schid, unsigned long dev_addr) { unsigned char status = dev_addr; if (run_ccw(schid, CCW_CMD_WRITE_STATUS, &status, sizeof(status))) { virtio_panic("Could not write status to host!\n"); } }


uint32_t do_arm_semihosting(CPUState *env) { target_ulong args; char * s; int nr; uint32_t ret; uint32_t len; #ifdef CONFIG_USER_ONLY TaskState *ts = env->opaque; #else CPUState *ts = env; #endif nr = env->regs[0]; args = env->regs[1]; switch (nr) { case SYS_OPEN: if (!(s = lock_user_string(ARG(0)))) /* FIXME - should this error code be -TARGET_EFAULT ? */ return (uint32_t)-1; if (ARG(1) >= 12) return (uint32_t)-1; if (strcmp(s, ":tt") == 0) { if (ARG(1) < 4) return STDIN_FILENO; else return STDOUT_FILENO; } if (use_gdb_syscalls()) { gdb_do_syscall(arm_semi_cb, "open,%s,%x,1a4", ARG(0), (int)ARG(2)+1, gdb_open_modeflags[ARG(1)]); return env->regs[0]; } else { ret = set_swi_errno(ts, open(s, open_modeflags[ARG(1)], 0644)); } unlock_user(s, ARG(0), 0); return ret; case SYS_CLOSE: if (use_gdb_syscalls()) { gdb_do_syscall(arm_semi_cb, "close,%x", ARG(0)); return env->regs[0]; } else { return set_swi_errno(ts, close(ARG(0))); } case SYS_WRITEC: { char c; if (get_user_u8(c, args)) /* FIXME - should this error code be -TARGET_EFAULT ? */ return (uint32_t)-1; /* Write to debug console. stderr is near enough. */ if (use_gdb_syscalls()) { gdb_do_syscall(arm_semi_cb, "write,2,%x,1", args); return env->regs[0]; } else { return write(STDERR_FILENO, &c, 1); } } case SYS_WRITE0: if (!(s = lock_user_string(args))) /* FIXME - should this error code be -TARGET_EFAULT ? */ return (uint32_t)-1; len = strlen(s); if (use_gdb_syscalls()) { gdb_do_syscall(arm_semi_cb, "write,2,%x,%x\n", args, len); ret = env->regs[0]; } else { ret = write(STDERR_FILENO, s, len); } unlock_user(s, args, 0); return ret; case SYS_WRITE: len = ARG(2); if (use_gdb_syscalls()) { arm_semi_syscall_len = len; gdb_do_syscall(arm_semi_cb, "write,%x,%x,%x", ARG(0), ARG(1), len); return env->regs[0]; } else { if (!(s = lock_user(VERIFY_READ, ARG(1), len, 1))) /* FIXME - should this error code be -TARGET_EFAULT ? */ return (uint32_t)-1; ret = set_swi_errno(ts, write(ARG(0), s, len)); unlock_user(s, ARG(1), 0); if (ret == (uint32_t)-1) return -1; return len - ret; } case SYS_READ: len = ARG(2); if (use_gdb_syscalls()) { arm_semi_syscall_len = len; gdb_do_syscall(arm_semi_cb, "read,%x,%x,%x", ARG(0), ARG(1), len); return env->regs[0]; } else { if (!(s = lock_user(VERIFY_WRITE, ARG(1), len, 0))) /* FIXME - should this error code be -TARGET_EFAULT ? */ return (uint32_t)-1; do ret = set_swi_errno(ts, read(ARG(0), s, len)); while (ret == -1 && errno == EINTR); unlock_user(s, ARG(1), len); if (ret == (uint32_t)-1) return -1; return len - ret; } case SYS_READC: /* XXX: Read from debug cosole. Not implemented. */ return 0; case SYS_ISTTY: if (use_gdb_syscalls()) { gdb_do_syscall(arm_semi_cb, "isatty,%x", ARG(0)); return env->regs[0]; } else { return isatty(ARG(0)); } case SYS_SEEK: if (use_gdb_syscalls()) { gdb_do_syscall(arm_semi_cb, "lseek,%x,%x,0", ARG(0), ARG(1)); return env->regs[0]; } else { ret = set_swi_errno(ts, lseek(ARG(0), ARG(1), SEEK_SET)); if (ret == (uint32_t)-1) return -1; return 0; } case SYS_FLEN: if (use_gdb_syscalls()) { gdb_do_syscall(arm_semi_flen_cb, "fstat,%x,%x", ARG(0), env->regs[13]-64); return env->regs[0]; } else { struct stat buf; ret = set_swi_errno(ts, fstat(ARG(0), &buf)); if (ret == (uint32_t)-1) return -1; return buf.st_size; } case SYS_TMPNAM: /* XXX: Not implemented. */ return -1; case SYS_REMOVE: if (use_gdb_syscalls()) { gdb_do_syscall(arm_semi_cb, "unlink,%s", ARG(0), (int)ARG(1)+1); ret = env->regs[0]; } else { if (!(s = lock_user_string(ARG(0)))) /* FIXME - should this error code be -TARGET_EFAULT ? */ return (uint32_t)-1; ret = set_swi_errno(ts, remove(s)); unlock_user(s, ARG(0), 0); } return ret; case SYS_RENAME: if (use_gdb_syscalls()) { gdb_do_syscall(arm_semi_cb, "rename,%s,%s", ARG(0), (int)ARG(1)+1, ARG(2), (int)ARG(3)+1); return env->regs[0]; } else { char *s2; s = lock_user_string(ARG(0)); s2 = lock_user_string(ARG(2)); if (!s || !s2) /* FIXME - should this error code be -TARGET_EFAULT ? */ ret = (uint32_t)-1; else ret = set_swi_errno(ts, rename(s, s2)); if (s2) unlock_user(s2, ARG(2), 0); if (s) unlock_user(s, ARG(0), 0); return ret; } case SYS_CLOCK: return clock() / (CLOCKS_PER_SEC / 100); case SYS_TIME: return set_swi_errno(ts, time(NULL)); case SYS_SYSTEM: if (use_gdb_syscalls()) { gdb_do_syscall(arm_semi_cb, "system,%s", ARG(0), (int)ARG(1)+1); return env->regs[0]; } else { if (!(s = lock_user_string(ARG(0)))) /* FIXME - should this error code be -TARGET_EFAULT ? */ return (uint32_t)-1; ret = set_swi_errno(ts, system(s)); unlock_user(s, ARG(0), 0); return ret; } case SYS_ERRNO: #ifdef CONFIG_USER_ONLY return ts->swi_errno; #else return syscall_err; #endif case SYS_GET_CMDLINE: #ifdef CONFIG_USER_ONLY /* Build a commandline from the original argv. */ { char *arm_cmdline_buffer; const char *host_cmdline_buffer; unsigned int i; unsigned int arm_cmdline_len = ARG(1); unsigned int host_cmdline_len = ts->info->arg_end-ts->info->arg_start; if (!arm_cmdline_len || host_cmdline_len > arm_cmdline_len) { return -1; /* not enough space to store command line */ } if (!host_cmdline_len) { /* We special-case the "empty command line" case (argc==0). Just provide the terminating 0. */ arm_cmdline_buffer = lock_user(VERIFY_WRITE, ARG(0), 1, 0); arm_cmdline_buffer[0] = 0; unlock_user(arm_cmdline_buffer, ARG(0), 1); /* Adjust the commandline length argument. */ SET_ARG(1, 0); return 0; } /* lock the buffers on the ARM side */ arm_cmdline_buffer = lock_user(VERIFY_WRITE, ARG(0), host_cmdline_len, 0); host_cmdline_buffer = lock_user(VERIFY_READ, ts->info->arg_start, host_cmdline_len, 1); if (arm_cmdline_buffer && host_cmdline_buffer) { /* the last argument is zero-terminated; no need for additional termination */ memcpy(arm_cmdline_buffer, host_cmdline_buffer, host_cmdline_len); /* separate arguments by white spaces */ for (i = 0; i < host_cmdline_len-1; i++) { if (arm_cmdline_buffer[i] == 0) { arm_cmdline_buffer[i] = ' '; } } /* Adjust the commandline length argument. */ SET_ARG(1, host_cmdline_len-1); } /* Unlock the buffers on the ARM side. */ unlock_user(arm_cmdline_buffer, ARG(0), host_cmdline_len); unlock_user((void*)host_cmdline_buffer, ts->info->arg_start, 0); /* Return success if we could return a commandline. */ return (arm_cmdline_buffer && host_cmdline_buffer) ? 0 : -1; } #else return -1; #endif case SYS_HEAPINFO: { uint32_t *ptr; uint32_t limit; #ifdef CONFIG_USER_ONLY /* Some C libraries assume the heap immediately follows .bss, so allocate it using sbrk. */ if (!ts->heap_limit) { long ret; ts->heap_base = do_brk(0); limit = ts->heap_base + ARM_ANGEL_HEAP_SIZE; /* Try a big heap, and reduce the size if that fails. */ for (;;) { ret = do_brk(limit); if (ret != -1) break; limit = (ts->heap_base >> 1) + (limit >> 1); } ts->heap_limit = limit; } if (!(ptr = lock_user(VERIFY_WRITE, ARG(0), 16, 0))) /* FIXME - should this error code be -TARGET_EFAULT ? */ return (uint32_t)-1; ptr[0] = tswap32(ts->heap_base); ptr[1] = tswap32(ts->heap_limit); ptr[2] = tswap32(ts->stack_base); ptr[3] = tswap32(0); /* Stack limit. */ unlock_user(ptr, ARG(0), 16); #else limit = ram_size; if (!(ptr = lock_user(VERIFY_WRITE, ARG(0), 16, 0))) /* FIXME - should this error code be -TARGET_EFAULT ? */ return (uint32_t)-1; /* TODO: Make this use the limit of the loaded application. */ ptr[0] = tswap32(limit / 2); ptr[1] = tswap32(limit); ptr[2] = tswap32(limit); /* Stack base */ ptr[3] = tswap32(0); /* Stack limit. */ unlock_user(ptr, ARG(0), 16); #endif return 0; } case SYS_EXIT: gdb_exit(env, 0); exit(0); default: fprintf(stderr, "qemu: Unsupported SemiHosting SWI 0x%02x\n", nr); cpu_dump_state(env, stderr, fprintf, 0); abort(); } }


int inet_connect(const char *str, Error **errp) { QemuOpts *opts; int sock = -1; opts = qemu_opts_create(&dummy_opts, NULL, 0, NULL); if (inet_parse(opts, str) == 0) { sock = inet_connect_opts(opts, true, NULL, errp); } else { error_set(errp, QERR_SOCKET_CREATE_FAILED); } qemu_opts_del(opts); return sock; }


static void do_interrupt_user(CPUX86State *env, int intno, int is_int, int error_code, target_ulong next_eip) { SegmentCache *dt; target_ulong ptr; int dpl, cpl, shift; uint32_t e2; dt = &env->idt; if (env->hflags & HF_LMA_MASK) { shift = 4; } else { shift = 3; } ptr = dt->base + (intno << shift); e2 = cpu_ldl_kernel(env, ptr + 4); dpl = (e2 >> DESC_DPL_SHIFT) & 3; cpl = env->hflags & HF_CPL_MASK; /* check privilege if software int */ if (is_int && dpl < cpl) { raise_exception_err(env, EXCP0D_GPF, (intno << shift) + 2); } /* Since we emulate only user space, we cannot do more than exiting the emulation with the suitable exception and error code. So update EIP for INT 0x80 and EXCP_SYSCALL. */ if (is_int || intno == EXCP_SYSCALL) { env->eip = next_eip; } }


static int64_t load_kernel(void) { int64_t entry, kernel_high; long kernel_size, initrd_size, params_size; ram_addr_t initrd_offset; uint32_t *params_buf; int big_endian; #ifdef TARGET_WORDS_BIGENDIAN big_endian = 1; #else big_endian = 0; #endif kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL, (uint64_t *)&entry, NULL, (uint64_t *)&kernel_high, big_endian, ELF_MACHINE, 1); if (kernel_size >= 0) { if ((entry & ~0x7fffffffULL) == 0x80000000) entry = (int32_t)entry; } else { fprintf(stderr, "qemu: could not load kernel '%s'\n", loaderparams.kernel_filename); exit(1); } /* load initrd */ initrd_size = 0; initrd_offset = 0; if (loaderparams.initrd_filename) { initrd_size = get_image_size (loaderparams.initrd_filename); if (initrd_size > 0) { initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK; if (initrd_offset + initrd_size > ram_size) { fprintf(stderr, "qemu: memory too small for initial ram disk '%s'\n", loaderparams.initrd_filename); exit(1); } initrd_size = load_image_targphys(loaderparams.initrd_filename, initrd_offset, ram_size - initrd_offset); } if (initrd_size == (target_ulong) -1) { fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", loaderparams.initrd_filename); exit(1); } } /* Store command line. */ params_size = 264; params_buf = g_malloc(params_size); params_buf[0] = tswap32(ram_size); params_buf[1] = tswap32(0x12345678); if (initrd_size > 0) { snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s", cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size, loaderparams.kernel_cmdline); } else { snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline); } rom_add_blob_fixed("params", params_buf, params_size, (16 << 20) - 264); return entry; }


static int cin_read_frame_header(CinDemuxContext *cin, AVIOContext *pb) { CinFrameHeader *hdr = &cin->frame_header; hdr->video_frame_type = avio_r8(pb); hdr->audio_frame_type = avio_r8(pb); hdr->pal_colors_count = avio_rl16(pb); hdr->video_frame_size = avio_rl32(pb); hdr->audio_frame_size = avio_rl32(pb); if (pb->eof_reached || pb->error) return AVERROR(EIO); if (avio_rl32(pb) != 0xAA55AA55) return 0; }


static void test_endianness_combine(gconstpointer data) { const TestCase *test = data; char *args; args = g_strdup_printf("-display none -M %s%s%s -device pc-testdev", test->machine, test->superio ? " -device " : "", test->superio ?: ""); qtest_start(args); isa_outl(test, 0xe0, 0x87654321); g_assert_cmphex(isa_inl(test, 0xe8), ==, 0x87654321); g_assert_cmphex(isa_inw(test, 0xea), ==, 0x8765); g_assert_cmphex(isa_inw(test, 0xe8), ==, 0x4321); isa_outw(test, 0xe2, 0x8866); g_assert_cmphex(isa_inl(test, 0xe8), ==, 0x88664321); g_assert_cmphex(isa_inw(test, 0xea), ==, 0x8866); g_assert_cmphex(isa_inw(test, 0xe8), ==, 0x4321); isa_outw(test, 0xe0, 0x4422); g_assert_cmphex(isa_inl(test, 0xe8), ==, 0x88664422); g_assert_cmphex(isa_inw(test, 0xea), ==, 0x8866); g_assert_cmphex(isa_inw(test, 0xe8), ==, 0x4422); isa_outb(test, 0xe3, 0x87); g_assert_cmphex(isa_inl(test, 0xe8), ==, 0x87664422); g_assert_cmphex(isa_inw(test, 0xea), ==, 0x8766); isa_outb(test, 0xe2, 0x65); g_assert_cmphex(isa_inl(test, 0xe8), ==, 0x87654422); g_assert_cmphex(isa_inw(test, 0xea), ==, 0x8765); g_assert_cmphex(isa_inw(test, 0xe8), ==, 0x4422); isa_outb(test, 0xe1, 0x43); g_assert_cmphex(isa_inl(test, 0xe8), ==, 0x87654322); g_assert_cmphex(isa_inw(test, 0xea), ==, 0x8765); g_assert_cmphex(isa_inw(test, 0xe8), ==, 0x4322); isa_outb(test, 0xe0, 0x21); g_assert_cmphex(isa_inl(test, 0xe8), ==, 0x87654321); g_assert_cmphex(isa_inw(test, 0xea), ==, 0x8765); g_assert_cmphex(isa_inw(test, 0xe8), ==, 0x4321); qtest_quit(global_qtest); g_free(args); }


int avpicture_deinterlace(AVPicture *dst, const AVPicture *src, enum AVPixelFormat pix_fmt, int width, int height) { int i; if (pix_fmt != AV_PIX_FMT_YUV420P && pix_fmt != AV_PIX_FMT_YUVJ420P && pix_fmt != AV_PIX_FMT_YUV422P && pix_fmt != AV_PIX_FMT_YUVJ422P && pix_fmt != AV_PIX_FMT_YUV444P && pix_fmt != AV_PIX_FMT_YUV411P && pix_fmt != AV_PIX_FMT_GRAY8) return -1; if ((width & 3) != 0 || (height & 3) != 0) return -1; for(i=0;i<3;i++) { if (i == 1) { switch(pix_fmt) { case AV_PIX_FMT_YUVJ420P: case AV_PIX_FMT_YUV420P: width >>= 1; height >>= 1; break; case AV_PIX_FMT_YUV422P: case AV_PIX_FMT_YUVJ422P: width >>= 1; break; case AV_PIX_FMT_YUV411P: width >>= 2; break; default: break; } if (pix_fmt == AV_PIX_FMT_GRAY8) { break; } } if (src == dst) { deinterlace_bottom_field_inplace(dst->data[i], dst->linesize[i], width, height); } else { deinterlace_bottom_field(dst->data[i],dst->linesize[i], src->data[i], src->linesize[i], width, height); } } emms_c(); return 0; }


static void chroma_mc(HEVCContext *s, int16_t *dst1, int16_t *dst2, ptrdiff_t dststride, AVFrame *ref, const Mv *mv, int x_off, int y_off, int block_w, int block_h) { HEVCLocalContext *lc = &s->HEVClc; uint8_t *src1 = ref->data[1]; uint8_t *src2 = ref->data[2]; ptrdiff_t src1stride = ref->linesize[1]; ptrdiff_t src2stride = ref->linesize[2]; int pic_width = s->ps.sps->width >> 1; int pic_height = s->ps.sps->height >> 1; int mx = mv->x & 7; int my = mv->y & 7; x_off += mv->x >> 3; y_off += mv->y >> 3; src1 += y_off * src1stride + (x_off << s->ps.sps->pixel_shift); src2 += y_off * src2stride + (x_off << s->ps.sps->pixel_shift); if (x_off < EPEL_EXTRA_BEFORE || y_off < EPEL_EXTRA_AFTER || x_off >= pic_width - block_w - EPEL_EXTRA_AFTER || y_off >= pic_height - block_h - EPEL_EXTRA_AFTER) { const int edge_emu_stride = EDGE_EMU_BUFFER_STRIDE << s->ps.sps->pixel_shift; int offset1 = EPEL_EXTRA_BEFORE * (src1stride + (1 << s->ps.sps->pixel_shift)); int buf_offset1 = EPEL_EXTRA_BEFORE * (edge_emu_stride + (1 << s->ps.sps->pixel_shift)); int offset2 = EPEL_EXTRA_BEFORE * (src2stride + (1 << s->ps.sps->pixel_shift)); int buf_offset2 = EPEL_EXTRA_BEFORE * (edge_emu_stride + (1 << s->ps.sps->pixel_shift)); s->vdsp.emulated_edge_mc(lc->edge_emu_buffer, src1 - offset1, edge_emu_stride, src1stride, block_w + EPEL_EXTRA, block_h + EPEL_EXTRA, x_off - EPEL_EXTRA_BEFORE, y_off - EPEL_EXTRA_BEFORE, pic_width, pic_height); src1 = lc->edge_emu_buffer + buf_offset1; src1stride = edge_emu_stride; s->hevcdsp.put_hevc_epel[!!my][!!mx](dst1, dststride, src1, src1stride, block_w, block_h, mx, my, lc->mc_buffer); s->vdsp.emulated_edge_mc(lc->edge_emu_buffer, src2 - offset2, edge_emu_stride, src2stride, block_w + EPEL_EXTRA, block_h + EPEL_EXTRA, x_off - EPEL_EXTRA_BEFORE, y_off - EPEL_EXTRA_BEFORE, pic_width, pic_height); src2 = lc->edge_emu_buffer + buf_offset2; src2stride = edge_emu_stride; s->hevcdsp.put_hevc_epel[!!my][!!mx](dst2, dststride, src2, src2stride, block_w, block_h, mx, my, lc->mc_buffer); } else { s->hevcdsp.put_hevc_epel[!!my][!!mx](dst1, dststride, src1, src1stride, block_w, block_h, mx, my, lc->mc_buffer); s->hevcdsp.put_hevc_epel[!!my][!!mx](dst2, dststride, src2, src2stride, block_w, block_h, mx, my, lc->mc_buffer); } }


static void mpegts_push_data(void *opaque, const uint8_t *buf, int buf_size, int is_start) { PESContext *pes = opaque; MpegTSContext *ts = pes->stream->priv_data; AVStream *st; const uint8_t *p; int len, code, codec_type, codec_id; if (is_start) { pes->state = MPEGTS_HEADER; pes->data_index = 0; } p = buf; while (buf_size > 0) { switch(pes->state) { case MPEGTS_HEADER: len = PES_START_SIZE - pes->data_index; if (len > buf_size) len = buf_size; memcpy(pes->header + pes->data_index, p, len); pes->data_index += len; p += len; buf_size -= len; if (pes->data_index == PES_START_SIZE) { /* we got all the PES or section header. We can now decide */ #if 0 av_hex_dump(pes->header, pes->data_index); #endif if (pes->header[0] == 0x00 && pes->header[1] == 0x00 && pes->header[2] == 0x01) { /* it must be an mpeg2 PES stream */ /* XXX: add AC3 support */ code = pes->header[3] | 0x100; if (!((code >= 0x1c0 && code <= 0x1df) || (code >= 0x1e0 && code <= 0x1ef))) goto skip; if (!pes->st) { /* allocate stream */ if (code >= 0x1c0 && code <= 0x1df) { codec_type = CODEC_TYPE_AUDIO; codec_id = CODEC_ID_MP2; } else { codec_type = CODEC_TYPE_VIDEO; codec_id = CODEC_ID_MPEG1VIDEO; } st = av_new_stream(pes->stream, pes->pid); if (st) { st->priv_data = pes; st->codec.codec_type = codec_type; st->codec.codec_id = codec_id; pes->st = st; } } pes->state = MPEGTS_PESHEADER_FILL; pes->total_size = (pes->header[4] << 8) | pes->header[5]; /* NOTE: a zero total size means the PES size is unbounded */ if (pes->total_size) pes->total_size += 6; pes->pes_header_size = pes->header[8] + 9; } else { /* otherwise, it should be a table */ /* skip packet */ skip: pes->state = MPEGTS_SKIP; continue; } } break; /**********************************************/ /* PES packing parsing */ case MPEGTS_PESHEADER_FILL: len = pes->pes_header_size - pes->data_index; if (len > buf_size) len = buf_size; memcpy(pes->header + pes->data_index, p, len); pes->data_index += len; p += len; buf_size -= len; if (pes->data_index == pes->pes_header_size) { const uint8_t *r; unsigned int flags; flags = pes->header[7]; r = pes->header + 9; pes->pts = AV_NOPTS_VALUE; pes->dts = AV_NOPTS_VALUE; if ((flags & 0xc0) == 0x80) { pes->pts = get_pts(r); r += 5; } else if ((flags & 0xc0) == 0xc0) { pes->pts = get_pts(r); r += 5; pes->dts = get_pts(r); r += 5; } /* we got the full header. We parse it and get the payload */ pes->state = MPEGTS_PAYLOAD; } break; case MPEGTS_PAYLOAD: if (pes->total_size) { len = pes->total_size - pes->data_index; if (len > buf_size) len = buf_size; } else { len = buf_size; } if (len > 0) { AVPacket *pkt = ts->pkt; if (pes->st && av_new_packet(pkt, len) == 0) { memcpy(pkt->data, p, len); pkt->stream_index = pes->st->index; pkt->pts = pes->pts; /* reset pts values */ pes->pts = AV_NOPTS_VALUE; pes->dts = AV_NOPTS_VALUE; ts->stop_parse = 1; return; } } buf_size = 0; break; case MPEGTS_SKIP: buf_size = 0; break; } } }


static bool gscb_needed(void *opaque) { return kvm_s390_get_gs(); }


void do_fctiw (void) { union { double d; uint64_t i; } p; /* XXX: higher bits are not supposed to be significant. * to make tests easier, return the same as a real PowerPC 750 (aka G3) */ p.i = float64_to_int32(FT0, &env->fp_status); p.i |= 0xFFF80000ULL << 32; FT0 = p.d; }


static struct omap_mpu_timer_s *omap_mpu_timer_init(MemoryRegion *system_memory, hwaddr base, qemu_irq irq, omap_clk clk) { struct omap_mpu_timer_s *s = (struct omap_mpu_timer_s *) g_malloc0(sizeof(struct omap_mpu_timer_s)); s->irq = irq; s->clk = clk; s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, omap_timer_tick, s); s->tick = qemu_bh_new(omap_timer_fire, s); omap_mpu_timer_reset(s); omap_timer_clk_setup(s); memory_region_init_io(&s->iomem, NULL, &omap_mpu_timer_ops, s, "omap-mpu-timer", 0x100); memory_region_add_subregion(system_memory, base, &s->iomem); return s; }


static int libopenjpeg_encode_frame(AVCodecContext *avctx, AVPacket *pkt, const AVFrame *frame, int *got_packet) { LibOpenJPEGContext *ctx = avctx->priv_data; opj_cinfo_t *compress = ctx->compress; opj_image_t *image = ctx->image; opj_cio_t *stream = ctx->stream; int cpyresult = 0; int ret, len; AVFrame *gbrframe; switch (avctx->pix_fmt) { case AV_PIX_FMT_RGB24: case AV_PIX_FMT_RGBA: case AV_PIX_FMT_GRAY8A: cpyresult = libopenjpeg_copy_packed8(avctx, frame, image); break; case AV_PIX_FMT_XYZ12: cpyresult = libopenjpeg_copy_packed12(avctx, frame, image); break; case AV_PIX_FMT_RGB48: case AV_PIX_FMT_RGBA64: cpyresult = libopenjpeg_copy_packed16(avctx, frame, image); break; case AV_PIX_FMT_GBR24P: case AV_PIX_FMT_GBRP9: case AV_PIX_FMT_GBRP10: case AV_PIX_FMT_GBRP12: case AV_PIX_FMT_GBRP14: case AV_PIX_FMT_GBRP16: gbrframe = av_frame_alloc(); av_frame_ref(gbrframe, frame); gbrframe->data[0] = frame->data[2]; // swap to be rgb gbrframe->data[1] = frame->data[0]; gbrframe->data[2] = frame->data[1]; gbrframe->linesize[0] = frame->linesize[2]; gbrframe->linesize[1] = frame->linesize[0]; gbrframe->linesize[2] = frame->linesize[1]; if (avctx->pix_fmt == AV_PIX_FMT_GBR24P) { cpyresult = libopenjpeg_copy_unpacked8(avctx, gbrframe, image); } else { cpyresult = libopenjpeg_copy_unpacked16(avctx, gbrframe, image); } av_frame_free(&gbrframe); break; case AV_PIX_FMT_GRAY8: case AV_PIX_FMT_YUV410P: case AV_PIX_FMT_YUV411P: case AV_PIX_FMT_YUV420P: case AV_PIX_FMT_YUV422P: case AV_PIX_FMT_YUV440P: case AV_PIX_FMT_YUV444P: case AV_PIX_FMT_YUVA420P: case AV_PIX_FMT_YUVA422P: case AV_PIX_FMT_YUVA444P: cpyresult = libopenjpeg_copy_unpacked8(avctx, frame, image); break; case AV_PIX_FMT_GRAY16: case AV_PIX_FMT_YUV420P9: case AV_PIX_FMT_YUV422P9: case AV_PIX_FMT_YUV444P9: case AV_PIX_FMT_YUVA420P9: case AV_PIX_FMT_YUVA422P9: case AV_PIX_FMT_YUVA444P9: case AV_PIX_FMT_YUV444P10: case AV_PIX_FMT_YUV422P10: case AV_PIX_FMT_YUV420P10: case AV_PIX_FMT_YUVA444P10: case AV_PIX_FMT_YUVA422P10: case AV_PIX_FMT_YUVA420P10: case AV_PIX_FMT_YUV420P12: case AV_PIX_FMT_YUV422P12: case AV_PIX_FMT_YUV444P12: case AV_PIX_FMT_YUV420P14: case AV_PIX_FMT_YUV422P14: case AV_PIX_FMT_YUV444P14: case AV_PIX_FMT_YUV444P16: case AV_PIX_FMT_YUV422P16: case AV_PIX_FMT_YUV420P16: case AV_PIX_FMT_YUVA444P16: case AV_PIX_FMT_YUVA422P16: case AV_PIX_FMT_YUVA420P16: cpyresult = libopenjpeg_copy_unpacked16(avctx, frame, image); break; default: av_log(avctx, AV_LOG_ERROR, "The frame's pixel format '%s' is not supported\n", av_get_pix_fmt_name(avctx->pix_fmt)); return AVERROR(EINVAL); break; } if (!cpyresult) { av_log(avctx, AV_LOG_ERROR, "Could not copy the frame data to the internal image buffer\n"); return -1; } cio_seek(stream, 0); if (!opj_encode(compress, stream, image, NULL)) { av_log(avctx, AV_LOG_ERROR, "Error during the opj encode\n"); return -1; } len = cio_tell(stream); if ((ret = ff_alloc_packet2(avctx, pkt, len)) < 0) { return ret; } memcpy(pkt->data, stream->buffer, len); pkt->flags |= AV_PKT_FLAG_KEY; *got_packet = 1; return 0; }


static void termsig_handler(int signum) { state = TERMINATE; qemu_notify_event(); }


static int qxl_post_load(void *opaque, int version) { PCIQXLDevice* d = opaque; uint8_t *ram_start = d->vga.vram_ptr; QXLCommandExt *cmds; int in, out, newmode; assert(d->last_release_offset < d->vga.vram_size); if (d->last_release_offset == 0) { d->last_release = NULL; } else { d->last_release = (QXLReleaseInfo *)(ram_start + d->last_release_offset); } d->modes = (QXLModes*)((uint8_t*)d->rom + d->rom->modes_offset); trace_qxl_post_load(d->id, qxl_mode_to_string(d->mode)); newmode = d->mode; d->mode = QXL_MODE_UNDEFINED; switch (newmode) { case QXL_MODE_UNDEFINED: qxl_create_memslots(d); break; case QXL_MODE_VGA: qxl_create_memslots(d); qxl_enter_vga_mode(d); break; case QXL_MODE_NATIVE: qxl_create_memslots(d); qxl_create_guest_primary(d, 1, QXL_SYNC); /* replay surface-create and cursor-set commands */ cmds = g_malloc0(sizeof(QXLCommandExt) * (d->ssd.num_surfaces + 1)); for (in = 0, out = 0; in < d->ssd.num_surfaces; in++) { if (d->guest_surfaces.cmds[in] == 0) { continue; } cmds[out].cmd.data = d->guest_surfaces.cmds[in]; cmds[out].cmd.type = QXL_CMD_SURFACE; cmds[out].group_id = MEMSLOT_GROUP_GUEST; out++; } if (d->guest_cursor) { cmds[out].cmd.data = d->guest_cursor; cmds[out].cmd.type = QXL_CMD_CURSOR; cmds[out].group_id = MEMSLOT_GROUP_GUEST; out++; } qxl_spice_loadvm_commands(d, cmds, out); g_free(cmds); if (d->guest_monitors_config) { qxl_spice_monitors_config_async(d, 1); } break; case QXL_MODE_COMPAT: /* note: no need to call qxl_create_memslots, qxl_set_mode * creates the mem slot. */ qxl_set_mode(d, d->shadow_rom.mode, 1); break; } return 0; }


static int rtp_parse_one_packet(RTPDemuxContext *s, AVPacket *pkt, uint8_t **bufptr, int len) { uint8_t *buf = bufptr ? *bufptr : NULL; int flags = 0; uint32_t timestamp; int rv = 0; if (!buf) { /* If parsing of the previous packet actually returned 0 or an error, * there's nothing more to be parsed from that packet, but we may have * indicated that we can return the next enqueued packet. */ if (s->prev_ret <= 0) return rtp_parse_queued_packet(s, pkt); /* return the next packets, if any */ if (s->handler && s->handler->parse_packet) { /* timestamp should be overwritten by parse_packet, if not, * the packet is left with pts == AV_NOPTS_VALUE */ timestamp = RTP_NOTS_VALUE; rv = s->handler->parse_packet(s->ic, s->dynamic_protocol_context, s->st, pkt, &timestamp, NULL, 0, 0, flags); finalize_packet(s, pkt, timestamp); return rv; } } if (len < 12) return -1; if ((buf[0] & 0xc0) != (RTP_VERSION << 6)) return -1; if (RTP_PT_IS_RTCP(buf[1])) { return rtcp_parse_packet(s, buf, len); } if (s->st) { int64_t received = av_gettime_relative(); uint32_t arrival_ts = av_rescale_q(received, AV_TIME_BASE_Q, s->st->time_base); timestamp = AV_RB32(buf + 4); // Calculate the jitter immediately, before queueing the packet // into the reordering queue. rtcp_update_jitter(&s->statistics, timestamp, arrival_ts); } if ((s->seq == 0 && !s->queue) || s->queue_size <= 1) { /* First packet, or no reordering */ return rtp_parse_packet_internal(s, pkt, buf, len); } else { uint16_t seq = AV_RB16(buf + 2); int16_t diff = seq - s->seq; if (diff < 0) { /* Packet older than the previously emitted one, drop */ av_log(s->st ? s->st->codec : NULL, AV_LOG_WARNING, "RTP: dropping old packet received too late\n"); return -1; } else if (diff <= 1) { /* Correct packet */ rv = rtp_parse_packet_internal(s, pkt, buf, len); return rv; } else { /* Still missing some packet, enqueue this one. */ enqueue_packet(s, buf, len); *bufptr = NULL; /* Return the first enqueued packet if the queue is full, * even if we're missing something */ if (s->queue_len >= s->queue_size) { av_log(s->st ? s->st->codec : NULL, AV_LOG_WARNING, "jitter buffer full\n"); return rtp_parse_queued_packet(s, pkt); } return -1; } } }


static inline void RENAME(rgb16to15)(const uint8_t *src,uint8_t *dst,long src_size) { register const uint8_t* s=src; register uint8_t* d=dst; register const uint8_t *end; const uint8_t *mm_end; end = s + src_size; #ifdef HAVE_MMX __asm __volatile(PREFETCH" %0"::"m"(*s)); __asm __volatile("movq %0, %%mm7"::"m"(mask15rg)); __asm __volatile("movq %0, %%mm6"::"m"(mask15b)); mm_end = end - 15; while(s<mm_end) { __asm __volatile( PREFETCH" 32%1\n\t" "movq %1, %%mm0\n\t" "movq 8%1, %%mm2\n\t" "movq %%mm0, %%mm1\n\t" "movq %%mm2, %%mm3\n\t" "psrlq $1, %%mm0\n\t" "psrlq $1, %%mm2\n\t" "pand %%mm7, %%mm0\n\t" "pand %%mm7, %%mm2\n\t" "pand %%mm6, %%mm1\n\t" "pand %%mm6, %%mm3\n\t" "por %%mm1, %%mm0\n\t" "por %%mm3, %%mm2\n\t" MOVNTQ" %%mm0, %0\n\t" MOVNTQ" %%mm2, 8%0" :"=m"(*d) :"m"(*s) ); d+=16; s+=16; } __asm __volatile(SFENCE:::"memory"); __asm __volatile(EMMS:::"memory"); #endif mm_end = end - 3; while(s < mm_end) { register uint32_t x= *((uint32_t *)s); *((uint32_t *)d) = ((x>>1)&0x7FE07FE0) | (x&0x001F001F); s+=4; d+=4; } if(s < end) { register uint16_t x= *((uint16_t *)s); *((uint16_t *)d) = ((x>>1)&0x7FE0) | (x&0x001F); s+=2; d+=2; } }


static void xics_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); dc->realize = xics_realize; dc->props = xics_properties; dc->reset = xics_reset; }


void acpi_memory_hotplug_init(MemoryRegion *as, Object *owner, MemHotplugState *state) { MachineState *machine = MACHINE(qdev_get_machine()); state->dev_count = machine->ram_slots; if (!state->dev_count) { return; } state->devs = g_malloc0(sizeof(*state->devs) * state->dev_count); memory_region_init_io(&state->io, owner, &acpi_memory_hotplug_ops, state, "acpi-mem-hotplug", ACPI_MEMORY_HOTPLUG_IO_LEN); memory_region_add_subregion(as, ACPI_MEMORY_HOTPLUG_BASE, &state->io); }


static void test_qemu_strtoul_correct(void) { const char *str = "12345 foo"; char f = 'X'; const char *endptr = &f; unsigned long res = 999; int err; err = qemu_strtoul(str, &endptr, 0, &res); g_assert_cmpint(err, ==, 0); g_assert_cmpint(res, ==, 12345); g_assert(endptr == str + 5); }


Aml *aml_shiftleft(Aml *arg1, Aml *count) { Aml *var = aml_opcode(0x79 /* ShiftLeftOp */); aml_append(var, arg1); aml_append(var, count); build_append_byte(var->buf, 0x00); /* NullNameOp */ return var; }


static void nfs_process_write(void *arg) { NFSClient *client = arg; aio_context_acquire(client->aio_context); nfs_service(client->context, POLLOUT); nfs_set_events(client); aio_context_release(client->aio_context); }


static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, TranslationBlock **last_tb, int *tb_exit) { uintptr_t ret; int32_t insns_left; if (unlikely(atomic_read(&cpu->exit_request))) { return; } trace_exec_tb(tb, tb->pc); ret = cpu_tb_exec(cpu, tb); tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); *tb_exit = ret & TB_EXIT_MASK; if (*tb_exit != TB_EXIT_REQUESTED) { *last_tb = tb; return; } *last_tb = NULL; insns_left = atomic_read(&cpu->icount_decr.u32); atomic_set(&cpu->icount_decr.u16.high, 0); if (insns_left < 0) { /* Something asked us to stop executing * chained TBs; just continue round the main * loop. Whatever requested the exit will also * have set something else (eg exit_request or * interrupt_request) which we will handle * next time around the loop. But we need to * ensure the zeroing of tcg_exit_req (see cpu_tb_exec) * comes before the next read of cpu->exit_request * or cpu->interrupt_request. */ smp_mb(); return; } /* Instruction counter expired. */ assert(use_icount); #ifndef CONFIG_USER_ONLY if (cpu->icount_extra) { /* Refill decrementer and continue execution. */ cpu->icount_extra += insns_left; insns_left = MIN(0xffff, cpu->icount_extra); cpu->icount_extra -= insns_left; cpu->icount_decr.u16.low = insns_left; } else { /* Execute any remaining instructions, then let the main loop * handle the next event. */ if (insns_left > 0) { cpu_exec_nocache(cpu, insns_left, tb, false); } } #endif }


static int xen_pt_byte_reg_read(XenPCIPassthroughState *s, XenPTReg *cfg_entry, uint8_t *value, uint8_t valid_mask) { XenPTRegInfo *reg = cfg_entry->reg; uint8_t valid_emu_mask = 0; /* emulate byte register */ valid_emu_mask = reg->emu_mask & valid_mask; *value = XEN_PT_MERGE_VALUE(*value, cfg_entry->data, ~valid_emu_mask); return 0; }


static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size) { uint16_t flags; uint8_t type; flags = pci_get_word(vdev->pdev.config + pos + PCI_CAP_FLAGS); type = (flags & PCI_EXP_FLAGS_TYPE) >> 4; if (type != PCI_EXP_TYPE_ENDPOINT && type != PCI_EXP_TYPE_LEG_END && type != PCI_EXP_TYPE_RC_END) { error_report("vfio: Assignment of PCIe type 0x%x " "devices is not currently supported", type); return -EINVAL; } if (!pci_bus_is_express(vdev->pdev.bus)) { /* * Use express capability as-is on PCI bus. It doesn't make much * sense to even expose, but some drivers (ex. tg3) depend on it * and guests don't seem to be particular about it. We'll need * to revist this or force express devices to express buses if we * ever expose an IOMMU to the guest. */ } else if (pci_bus_is_root(vdev->pdev.bus)) { /* * On a Root Complex bus Endpoints become Root Complex Integrated * Endpoints, which changes the type and clears the LNK & LNK2 fields. */ if (type == PCI_EXP_TYPE_ENDPOINT) { vfio_add_emulated_word(vdev, pos + PCI_CAP_FLAGS, PCI_EXP_TYPE_RC_END << 4, PCI_EXP_FLAGS_TYPE); /* Link Capabilities, Status, and Control goes away */ if (size > PCI_EXP_LNKCTL) { vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP, 0, ~0); vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL, 0, ~0); vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA, 0, ~0); #ifndef PCI_EXP_LNKCAP2 #define PCI_EXP_LNKCAP2 44 #endif #ifndef PCI_EXP_LNKSTA2 #define PCI_EXP_LNKSTA2 50 #endif /* Link 2 Capabilities, Status, and Control goes away */ if (size > PCI_EXP_LNKCAP2) { vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP2, 0, ~0); vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL2, 0, ~0); vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA2, 0, ~0); } } } else if (type == PCI_EXP_TYPE_LEG_END) { /* * Legacy endpoints don't belong on the root complex. Windows * seems to be happier with devices if we skip the capability. */ return 0; } } else { /* * Convert Root Complex Integrated Endpoints to regular endpoints. * These devices don't support LNK/LNK2 capabilities, so make them up. */ if (type == PCI_EXP_TYPE_RC_END) { vfio_add_emulated_word(vdev, pos + PCI_CAP_FLAGS, PCI_EXP_TYPE_ENDPOINT << 4, PCI_EXP_FLAGS_TYPE); vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP, PCI_EXP_LNK_MLW_1 | PCI_EXP_LNK_LS_25, ~0); vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL, 0, ~0); } /* Mark the Link Status bits as emulated to allow virtual negotiation */ vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA, pci_get_word(vdev->pdev.config + pos + PCI_EXP_LNKSTA), PCI_EXP_LNKCAP_MLW | PCI_EXP_LNKCAP_SLS); } pos = pci_add_capability(&vdev->pdev, PCI_CAP_ID_EXP, pos, size); if (pos >= 0) { vdev->pdev.exp.exp_cap = pos; } return pos; }


static UserDefNested *nested_struct_create(void) { UserDefNested *udnp = g_malloc0(sizeof(*udnp)); udnp->string0 = strdup("test_string0"); udnp->dict1.string1 = strdup("test_string1"); udnp->dict1.dict2.userdef1 = g_malloc0(sizeof(UserDefOne)); udnp->dict1.dict2.userdef1->base = g_new0(UserDefZero, 1); udnp->dict1.dict2.userdef1->base->integer = 42; udnp->dict1.dict2.userdef1->string = strdup("test_string"); udnp->dict1.dict2.string2 = strdup("test_string2"); udnp->dict1.has_dict3 = true; udnp->dict1.dict3.userdef2 = g_malloc0(sizeof(UserDefOne)); udnp->dict1.dict3.userdef2->base = g_new0(UserDefZero, 1); udnp->dict1.dict3.userdef2->base->integer = 43; udnp->dict1.dict3.userdef2->string = strdup("test_string"); udnp->dict1.dict3.string3 = strdup("test_string3"); return udnp; }


static int qcow2_create(const char *filename, QEMUOptionParameter *options) { const char *backing_file = NULL; const char *backing_fmt = NULL; uint64_t sectors = 0; int flags = 0; size_t cluster_size = DEFAULT_CLUSTER_SIZE; int prealloc = 0; /* Read out options */ while (options && options->name) { if (!strcmp(options->name, BLOCK_OPT_SIZE)) { sectors = options->value.n / 512; } else if (!strcmp(options->name, BLOCK_OPT_BACKING_FILE)) { backing_file = options->value.s; } else if (!strcmp(options->name, BLOCK_OPT_BACKING_FMT)) { backing_fmt = options->value.s; } else if (!strcmp(options->name, BLOCK_OPT_ENCRYPT)) { flags |= options->value.n ? BLOCK_FLAG_ENCRYPT : 0; } else if (!strcmp(options->name, BLOCK_OPT_CLUSTER_SIZE)) { if (options->value.n) { cluster_size = options->value.n; } } else if (!strcmp(options->name, BLOCK_OPT_PREALLOC)) { if (!options->value.s || !strcmp(options->value.s, "off")) { prealloc = 0; } else if (!strcmp(options->value.s, "metadata")) { prealloc = 1; } else { fprintf(stderr, "Invalid preallocation mode: '%s'\n", options->value.s); return -EINVAL; } } options++; } if (backing_file && prealloc) { fprintf(stderr, "Backing file and preallocation cannot be used at " "the same time\n"); return -EINVAL; } return qcow2_create2(filename, sectors, backing_file, backing_fmt, flags, cluster_size, prealloc, options); }


static int rpza_decode_init(AVCodecContext *avctx) { RpzaContext *s = avctx->priv_data; s->avctx = avctx; avctx->pix_fmt = PIX_FMT_RGB555; dsputil_init(&s->dsp, avctx); s->frame.data[0] = NULL; return 0; }


static void qmp_output_type_str(Visitor *v, const char *name, char **obj, Error **errp) { QmpOutputVisitor *qov = to_qov(v); if (*obj) { qmp_output_add(qov, name, qstring_from_str(*obj)); } else { qmp_output_add(qov, name, qstring_from_str("")); } }


static void v9fs_open_post_lstat(V9fsState *s, V9fsOpenState *vs, int err) { int flags; if (err) { err = -errno; goto out; } stat_to_qid(&vs->stbuf, &vs->qid); if (S_ISDIR(vs->stbuf.st_mode)) { vs->fidp->fs.dir = v9fs_do_opendir(s, &vs->fidp->path); v9fs_open_post_opendir(s, vs, err); } else { if (s->proto_version == V9FS_PROTO_2000L) { if (!valid_flags(vs->mode)) { err = -EINVAL; goto out; } flags = vs->mode; } else { flags = omode_to_uflags(vs->mode); } vs->fidp->fs.fd = v9fs_do_open(s, &vs->fidp->path, flags); v9fs_open_post_open(s, vs, err); } return; out: complete_pdu(s, vs->pdu, err); qemu_free(vs); }


static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp) { sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev)); size_t size = object_type_get_instance_size(scc->cpu_type); CPUCore *cc = CPU_CORE(dev); int i; for (i = 0; i < cc->nr_threads; i++) { void *obj = sc->threads + i * size; DeviceState *dev = DEVICE(obj); CPUState *cs = CPU(dev); PowerPCCPU *cpu = POWERPC_CPU(cs); spapr_cpu_destroy(cpu); object_unparent(cpu->intc); cpu_remove_sync(cs); object_unparent(obj); } g_free(sc->threads); }


static uint32_t taihu_cpld_readw (void *opaque, hwaddr addr) { uint32_t ret; ret = taihu_cpld_readb(opaque, addr) << 8; ret |= taihu_cpld_readb(opaque, addr + 1); return ret; }


int vfio_container_ioctl(AddressSpace *as, int32_t groupid, int req, void *param) { /* We allow only certain ioctls to the container */ switch (req) { case VFIO_CHECK_EXTENSION: case VFIO_IOMMU_SPAPR_TCE_GET_INFO: case VFIO_EEH_PE_OP: break; default: /* Return an error on unknown requests */ error_report("vfio: unsupported ioctl %X", req); return -1; } return vfio_container_do_ioctl(as, groupid, req, param); }


static void vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, uint8_t devfn, hwaddr addr, bool is_write, IOMMUTLBEntry *entry) { IntelIOMMUState *s = vtd_as->iommu_state; VTDContextEntry ce; uint8_t bus_num = pci_bus_num(bus); VTDContextCacheEntry *cc_entry = &vtd_as->context_cache_entry; uint64_t slpte; uint32_t level; uint16_t source_id = vtd_make_source_id(bus_num, devfn); int ret_fr; bool is_fpd_set = false; bool reads = true; bool writes = true; VTDIOTLBEntry *iotlb_entry; /* Check if the request is in interrupt address range */ if (vtd_is_interrupt_addr(addr)) { if (is_write) { /* FIXME: since we don't know the length of the access here, we * treat Non-DWORD length write requests without PASID as * interrupt requests, too. Withoud interrupt remapping support, * we just use 1:1 mapping. */ VTD_DPRINTF(MMU, "write request to interrupt address " "gpa 0x%"PRIx64, addr); entry->iova = addr & VTD_PAGE_MASK_4K; entry->translated_addr = addr & VTD_PAGE_MASK_4K; entry->addr_mask = ~VTD_PAGE_MASK_4K; entry->perm = IOMMU_WO; return; } else { VTD_DPRINTF(GENERAL, "error: read request from interrupt address " "gpa 0x%"PRIx64, addr); vtd_report_dmar_fault(s, source_id, addr, VTD_FR_READ, is_write); return; } } /* Try to fetch slpte form IOTLB */ iotlb_entry = vtd_lookup_iotlb(s, source_id, addr); if (iotlb_entry) { VTD_DPRINTF(CACHE, "hit iotlb sid 0x%"PRIx16 " gpa 0x%"PRIx64 " slpte 0x%"PRIx64 " did 0x%"PRIx16, source_id, addr, iotlb_entry->slpte, iotlb_entry->domain_id); slpte = iotlb_entry->slpte; reads = iotlb_entry->read_flags; writes = iotlb_entry->write_flags; goto out; } /* Try to fetch context-entry from cache first */ if (cc_entry->context_cache_gen == s->context_cache_gen) { VTD_DPRINTF(CACHE, "hit context-cache bus %d devfn %d " "(hi %"PRIx64 " lo %"PRIx64 " gen %"PRIu32 ")", bus_num, devfn, cc_entry->context_entry.hi, cc_entry->context_entry.lo, cc_entry->context_cache_gen); ce = cc_entry->context_entry; is_fpd_set = ce.lo & VTD_CONTEXT_ENTRY_FPD; } else { ret_fr = vtd_dev_to_context_entry(s, bus_num, devfn, &ce); is_fpd_set = ce.lo & VTD_CONTEXT_ENTRY_FPD; if (ret_fr) { ret_fr = -ret_fr; if (is_fpd_set && vtd_is_qualified_fault(ret_fr)) { VTD_DPRINTF(FLOG, "fault processing is disabled for DMA " "requests through this context-entry " "(with FPD Set)"); } else { vtd_report_dmar_fault(s, source_id, addr, ret_fr, is_write); } return; } /* Update context-cache */ VTD_DPRINTF(CACHE, "update context-cache bus %d devfn %d " "(hi %"PRIx64 " lo %"PRIx64 " gen %"PRIu32 "->%"PRIu32 ")", bus_num, devfn, ce.hi, ce.lo, cc_entry->context_cache_gen, s->context_cache_gen); cc_entry->context_entry = ce; cc_entry->context_cache_gen = s->context_cache_gen; } ret_fr = vtd_gpa_to_slpte(&ce, addr, is_write, &slpte, &level, &reads, &writes); if (ret_fr) { ret_fr = -ret_fr; if (is_fpd_set && vtd_is_qualified_fault(ret_fr)) { VTD_DPRINTF(FLOG, "fault processing is disabled for DMA requests " "through this context-entry (with FPD Set)"); } else { vtd_report_dmar_fault(s, source_id, addr, ret_fr, is_write); } return; } vtd_update_iotlb(s, source_id, VTD_CONTEXT_ENTRY_DID(ce.hi), addr, slpte, reads, writes); out: entry->iova = addr & VTD_PAGE_MASK_4K; entry->translated_addr = vtd_get_slpte_addr(slpte) & VTD_PAGE_MASK_4K; entry->addr_mask = ~VTD_PAGE_MASK_4K; entry->perm = (writes ? 2 : 0) + (reads ? 1 : 0); }


void call_pal (CPUState *env, int palcode) { target_ulong ret; if (logfile != NULL) fprintf(logfile, "%s: palcode %02x\n", __func__, palcode); switch (palcode) { case 0x83: /* CALLSYS */ if (logfile != NULL) fprintf(logfile, "CALLSYS n " TARGET_FMT_ld "\n", env->ir[0]); ret = do_syscall(env, env->ir[IR_V0], env->ir[IR_A0], env->ir[IR_A1], env->ir[IR_A2], env->ir[IR_A3], env->ir[IR_A4], env->ir[IR_A5]); if (ret >= 0) { env->ir[IR_A3] = 0; env->ir[IR_V0] = ret; } else { env->ir[IR_A3] = 1; env->ir[IR_V0] = -ret; } break; case 0x9E: /* RDUNIQUE */ env->ir[IR_V0] = env->unique; if (logfile != NULL) fprintf(logfile, "RDUNIQUE: " TARGET_FMT_lx "\n", env->unique); break; case 0x9F: /* WRUNIQUE */ env->unique = env->ir[IR_A0]; if (logfile != NULL) fprintf(logfile, "WRUNIQUE: " TARGET_FMT_lx "\n", env->unique); break; default: if (logfile != NULL) fprintf(logfile, "%s: unhandled palcode %02x\n", __func__, palcode); exit(1); } }


static void RENAME(yuv2yuyv422_1)(SwsContext *c, const uint16_t *buf0, const uint16_t *ubuf0, const uint16_t *ubuf1, const uint16_t *vbuf0, const uint16_t *vbuf1, const uint16_t *abuf0, uint8_t *dest, int dstW, int uvalpha, enum PixelFormat dstFormat, int flags, int y) { const uint16_t *buf1= buf0; //FIXME needed for RGB1/BGR1 if (uvalpha < 2048) { // note this is not correct (shifts chrominance by 0.5 pixels) but it is a bit faster __asm__ volatile( "mov %%"REG_b", "ESP_OFFSET"(%5) \n\t" "mov %4, %%"REG_b" \n\t" "push %%"REG_BP" \n\t" YSCALEYUV2PACKED1(%%REGBP, %5) WRITEYUY2(%%REGb, 8280(%5), %%REGBP) "pop %%"REG_BP" \n\t" "mov "ESP_OFFSET"(%5), %%"REG_b" \n\t" :: "c" (buf0), "d" (buf1), "S" (ubuf0), "D" (ubuf1), "m" (dest), "a" (&c->redDither) ); } else { __asm__ volatile( "mov %%"REG_b", "ESP_OFFSET"(%5) \n\t" "mov %4, %%"REG_b" \n\t" "push %%"REG_BP" \n\t" YSCALEYUV2PACKED1b(%%REGBP, %5) WRITEYUY2(%%REGb, 8280(%5), %%REGBP) "pop %%"REG_BP" \n\t" "mov "ESP_OFFSET"(%5), %%"REG_b" \n\t" :: "c" (buf0), "d" (buf1), "S" (ubuf0), "D" (ubuf1), "m" (dest), "a" (&c->redDither) ); } }


yuv2gray16_1_c_template(SwsContext *c, const uint16_t *buf0, const uint16_t *ubuf0, const uint16_t *ubuf1, const uint16_t *vbuf0, const uint16_t *vbuf1, const uint16_t *abuf0, uint8_t *dest, int dstW, int uvalpha, enum PixelFormat dstFormat, int flags, int y, enum PixelFormat target) { int i; for (i = 0; i < (dstW >> 1); i++) { const int i2 = 2 * i; int Y1 = buf0[i2 ] << 1; int Y2 = buf0[i2+1] << 1; output_pixel(&dest[2 * i2 + 0], Y1); output_pixel(&dest[2 * i2 + 2], Y2); } }


uint32_t helper_efdctuiz (uint64_t val) { CPU_DoubleU u; u.ll = val; /* NaN are not treated the same way IEEE 754 does */ if (unlikely(float64_is_nan(u.d))) return 0; return float64_to_uint32_round_to_zero(u.d, &env->vec_status); }


int qcow2_zero_clusters(BlockDriverState *bs, uint64_t offset, int nb_sectors) { BDRVQcow2State *s = bs->opaque; unsigned int nb_clusters; int ret; /* The zero flag is only supported by version 3 and newer */ if (s->qcow_version < 3) { return -ENOTSUP; } /* Each L2 table is handled by its own loop iteration */ nb_clusters = size_to_clusters(s, nb_sectors << BDRV_SECTOR_BITS); s->cache_discards = true; while (nb_clusters > 0) { ret = zero_single_l2(bs, offset, nb_clusters); if (ret < 0) { goto fail; } nb_clusters -= ret; offset += (ret * s->cluster_size); } ret = 0; fail: s->cache_discards = false; qcow2_process_discards(bs, ret); return ret; }


void async_context_push(void) { struct AsyncContext *new = qemu_mallocz(sizeof(*new)); new->parent = async_context; new->id = async_context->id + 1; async_context = new; }