static void RENAME(uyvytoyuv422)(uint8_t *ydst, uint8_t *udst, uint8_t *vdst, const uint8_t *src, int width, int height, int lumStride, int chromStride, int srcStride) { int y; const int chromWidth = FF_CEIL_RSHIFT(width, 1); for (y=0; y<height; y++) { RENAME(extract_even)(src+1, ydst, width); RENAME(extract_even2)(src, udst, vdst, chromWidth); src += srcStride; ydst+= lumStride; udst+= chromStride; vdst+= chromStride; } __asm__( EMMS" \n\t" SFENCE" \n\t" ::: "memory" ); }


uint64_t helper_subqv(CPUAlphaState *env, uint64_t op1, uint64_t op2) { uint64_t res; res = op1 - op2; if (unlikely((op1 ^ op2) & (res ^ op1) & (1ULL << 63))) { arith_excp(env, GETPC(), EXC_M_IOV, 0); } return res; }


static int decode_idat_chunk(AVCodecContext *avctx, PNGDecContext *s, uint32_t length, AVFrame *p) { int ret; size_t byte_depth = s->bit_depth > 8 ? 2 : 1; if (!(s->state & PNG_IHDR)) { av_log(avctx, AV_LOG_ERROR, "IDAT without IHDR\n"); return AVERROR_INVALIDDATA; } if (!(s->state & PNG_IDAT)) { /* init image info */ avctx->width = s->width; avctx->height = s->height; s->channels = ff_png_get_nb_channels(s->color_type); s->bits_per_pixel = s->bit_depth * s->channels; s->bpp = (s->bits_per_pixel + 7) >> 3; s->row_size = (s->cur_w * s->bits_per_pixel + 7) >> 3; if ((s->bit_depth == 2 || s->bit_depth == 4 || s->bit_depth == 8) && s->color_type == PNG_COLOR_TYPE_RGB) { avctx->pix_fmt = AV_PIX_FMT_RGB24; } else if ((s->bit_depth == 2 || s->bit_depth == 4 || s->bit_depth == 8) && s->color_type == PNG_COLOR_TYPE_RGB_ALPHA) { avctx->pix_fmt = AV_PIX_FMT_RGBA; } else if ((s->bit_depth == 2 || s->bit_depth == 4 || s->bit_depth == 8) && s->color_type == PNG_COLOR_TYPE_GRAY) { avctx->pix_fmt = AV_PIX_FMT_GRAY8; } else if (s->bit_depth == 16 && s->color_type == PNG_COLOR_TYPE_GRAY) { avctx->pix_fmt = AV_PIX_FMT_GRAY16BE; } else if (s->bit_depth == 16 && s->color_type == PNG_COLOR_TYPE_RGB) { avctx->pix_fmt = AV_PIX_FMT_RGB48BE; } else if (s->bit_depth == 16 && s->color_type == PNG_COLOR_TYPE_RGB_ALPHA) { avctx->pix_fmt = AV_PIX_FMT_RGBA64BE; } else if ((s->bits_per_pixel == 1 || s->bits_per_pixel == 2 || s->bits_per_pixel == 4 || s->bits_per_pixel == 8) && s->color_type == PNG_COLOR_TYPE_PALETTE) { avctx->pix_fmt = AV_PIX_FMT_PAL8; } else if (s->bit_depth == 1 && s->bits_per_pixel == 1 && avctx->codec_id != AV_CODEC_ID_APNG) { avctx->pix_fmt = AV_PIX_FMT_MONOBLACK; } else if (s->bit_depth == 8 && s->color_type == PNG_COLOR_TYPE_GRAY_ALPHA) { avctx->pix_fmt = AV_PIX_FMT_YA8; } else if (s->bit_depth == 16 && s->color_type == PNG_COLOR_TYPE_GRAY_ALPHA) { avctx->pix_fmt = AV_PIX_FMT_YA16BE; } else { av_log(avctx, AV_LOG_ERROR, "unsupported bit depth %d " "and color type %d\n", s->bit_depth, s->color_type); return AVERROR_INVALIDDATA; } if (s->has_trns && s->color_type != PNG_COLOR_TYPE_PALETTE) { switch (avctx->pix_fmt) { case AV_PIX_FMT_RGB24: avctx->pix_fmt = AV_PIX_FMT_RGBA; break; case AV_PIX_FMT_RGB48BE: avctx->pix_fmt = AV_PIX_FMT_RGBA64BE; break; case AV_PIX_FMT_GRAY8: avctx->pix_fmt = AV_PIX_FMT_YA8; break; case AV_PIX_FMT_GRAY16BE: avctx->pix_fmt = AV_PIX_FMT_YA16BE; break; default: avpriv_request_sample(avctx, "bit depth %d " "and color type %d with TRNS", s->bit_depth, s->color_type); return AVERROR_INVALIDDATA; } s->bpp += byte_depth; } if ((ret = ff_thread_get_buffer(avctx, &s->picture, AV_GET_BUFFER_FLAG_REF)) < 0) return ret; if (avctx->codec_id == AV_CODEC_ID_APNG && s->last_dispose_op != APNG_DISPOSE_OP_PREVIOUS) { ff_thread_release_buffer(avctx, &s->previous_picture); if ((ret = ff_thread_get_buffer(avctx, &s->previous_picture, AV_GET_BUFFER_FLAG_REF)) < 0) return ret; } ff_thread_finish_setup(avctx); p->pict_type = AV_PICTURE_TYPE_I; p->key_frame = 1; p->interlaced_frame = !!s->interlace_type; /* compute the compressed row size */ if (!s->interlace_type) { s->crow_size = s->row_size + 1; } else { s->pass = 0; s->pass_row_size = ff_png_pass_row_size(s->pass, s->bits_per_pixel, s->cur_w); s->crow_size = s->pass_row_size + 1; } ff_dlog(avctx, "row_size=%d crow_size =%d\n", s->row_size, s->crow_size); s->image_buf = p->data[0]; s->image_linesize = p->linesize[0]; /* copy the palette if needed */ if (avctx->pix_fmt == AV_PIX_FMT_PAL8) memcpy(p->data[1], s->palette, 256 * sizeof(uint32_t)); /* empty row is used if differencing to the first row */ av_fast_padded_mallocz(&s->last_row, &s->last_row_size, s->row_size); if (!s->last_row) return AVERROR_INVALIDDATA; if (s->interlace_type || s->color_type == PNG_COLOR_TYPE_RGB_ALPHA) { av_fast_padded_malloc(&s->tmp_row, &s->tmp_row_size, s->row_size); if (!s->tmp_row) return AVERROR_INVALIDDATA; } /* compressed row */ av_fast_padded_malloc(&s->buffer, &s->buffer_size, s->row_size + 16); if (!s->buffer) return AVERROR(ENOMEM); /* we want crow_buf+1 to be 16-byte aligned */ s->crow_buf = s->buffer + 15; s->zstream.avail_out = s->crow_size; s->zstream.next_out = s->crow_buf; } s->state |= PNG_IDAT; /* set image to non-transparent bpp while decompressing */ if (s->has_trns && s->color_type != PNG_COLOR_TYPE_PALETTE) s->bpp -= byte_depth; ret = png_decode_idat(s, length); if (s->has_trns && s->color_type != PNG_COLOR_TYPE_PALETTE) s->bpp += byte_depth; if (ret < 0) return ret; bytestream2_skip(&s->gb, 4); /* crc */ return 0; }


static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl) { VGACommonState *vga = &qxl->vga; DisplaySurface *surface; int i; if (qxl->guest_primary.resized) { qxl->guest_primary.resized = 0; qxl->guest_primary.data = qxl_phys2virt(qxl, qxl->guest_primary.surface.mem, MEMSLOT_GROUP_GUEST); if (!qxl->guest_primary.data) { return; } qxl_set_rect_to_surface(qxl, &qxl->dirty[0]); qxl->num_dirty_rects = 1; trace_qxl_render_guest_primary_resized( qxl->guest_primary.surface.width, qxl->guest_primary.surface.height, qxl->guest_primary.qxl_stride, qxl->guest_primary.bytes_pp, qxl->guest_primary.bits_pp); if (qxl->guest_primary.qxl_stride > 0) { surface = qemu_create_displaysurface_from (qxl->guest_primary.surface.width, qxl->guest_primary.surface.height, qxl->guest_primary.bits_pp, qxl->guest_primary.abs_stride, qxl->guest_primary.data, false); } else { surface = qemu_create_displaysurface (qxl->guest_primary.surface.width, qxl->guest_primary.surface.height); } dpy_gfx_replace_surface(vga->con, surface); } if (!qxl->guest_primary.data) { return; } for (i = 0; i < qxl->num_dirty_rects; i++) { if (qemu_spice_rect_is_empty(qxl->dirty+i)) { break; } if (qxl->dirty[i].left > qxl->dirty[i].right || qxl->dirty[i].top > qxl->dirty[i].bottom || qxl->dirty[i].right > qxl->guest_primary.surface.width || qxl->dirty[i].bottom > qxl->guest_primary.surface.height) { continue; } qxl_blit(qxl, qxl->dirty+i); dpy_gfx_update(vga->con, qxl->dirty[i].left, qxl->dirty[i].top, qxl->dirty[i].right - qxl->dirty[i].left, qxl->dirty[i].bottom - qxl->dirty[i].top); } qxl->num_dirty_rects = 0; }


void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base, ram_addr_t vga_ram_offset, int vga_ram_size) { int i, j, v, b; for(i = 0;i < 256; i++) { v = 0; for(j = 0; j < 8; j++) { v |= ((i >> j) & 1) << (j * 4); } expand4[i] = v; v = 0; for(j = 0; j < 4; j++) { v |= ((i >> (2 * j)) & 3) << (j * 4); } expand2[i] = v; } for(i = 0; i < 16; i++) { v = 0; for(j = 0; j < 4; j++) { b = ((i >> j) & 1); v |= b << (2 * j); v |= b << (2 * j + 1); } expand4to8[i] = v; } s->vram_ptr = vga_ram_base; s->vram_offset = vga_ram_offset; s->vram_size = vga_ram_size; s->ds = ds; s->get_bpp = vga_get_bpp; s->get_offsets = vga_get_offsets; s->get_resolution = vga_get_resolution; s->update = vga_update_display; s->invalidate = vga_invalidate_display; s->screen_dump = vga_screen_dump; s->text_update = vga_update_text; switch (vga_retrace_method) { case VGA_RETRACE_DUMB: s->retrace = vga_dumb_retrace; s->update_retrace_info = vga_dumb_update_retrace_info; break; case VGA_RETRACE_PRECISE: s->retrace = vga_precise_retrace; s->update_retrace_info = vga_precise_update_retrace_info; break; } qemu_register_reset(vga_reset, s); vga_reset(s); }


static int rtp_parse_packet_internal(RTPDemuxContext *s, AVPacket *pkt, const uint8_t *buf, int len) { unsigned int ssrc, h; int payload_type, seq, ret, flags = 0; int ext; AVStream *st; uint32_t timestamp; int rv = 0; ext = buf[0] & 0x10; payload_type = buf[1] & 0x7f; if (buf[1] & 0x80) flags |= RTP_FLAG_MARKER; seq = AV_RB16(buf + 2); timestamp = AV_RB32(buf + 4); ssrc = AV_RB32(buf + 8); /* store the ssrc in the RTPDemuxContext */ s->ssrc = ssrc; /* NOTE: we can handle only one payload type */ if (s->payload_type != payload_type) return -1; st = s->st; // only do something with this if all the rtp checks pass... if (!rtp_valid_packet_in_sequence(&s->statistics, seq)) { av_log(st ? st->codec : NULL, AV_LOG_ERROR, "RTP: PT=%02x: bad cseq %04x expected=%04x\n", payload_type, seq, ((s->seq + 1) & 0xffff)); return -1; } if (buf[0] & 0x20) { int padding = buf[len - 1]; if (len >= 12 + padding) len -= padding; } s->seq = seq; len -= 12; buf += 12; /* RFC 3550 Section 5.3.1 RTP Header Extension handling */ if (ext) { if (len < 4) return -1; /* calculate the header extension length (stored as number * of 32-bit words) */ ext = (AV_RB16(buf + 2) + 1) << 2; if (len < ext) return -1; // skip past RTP header extension len -= ext; buf += ext; } if (!st) { /* specific MPEG2-TS demux support */ ret = ff_mpegts_parse_packet(s->ts, pkt, buf, len); /* The only error that can be returned from ff_mpegts_parse_packet * is "no more data to return from the provided buffer", so return * AVERROR(EAGAIN) for all errors */ if (ret < 0) return AVERROR(EAGAIN); if (ret < len) { s->read_buf_size = len - ret; memcpy(s->buf, buf + ret, s->read_buf_size); s->read_buf_index = 0; return 1; } return 0; } else if (s->parse_packet) { rv = s->parse_packet(s->ic, s->dynamic_protocol_context, s->st, pkt, &timestamp, buf, len, flags); } else { /* At this point, the RTP header has been stripped; * This is ASSUMING that there is only 1 CSRC, which isn't wise. */ switch (st->codec->codec_id) { case AV_CODEC_ID_MP2: case AV_CODEC_ID_MP3: /* better than nothing: skip MPEG audio RTP header */ if (len <= 4) return -1; h = AV_RB32(buf); len -= 4; buf += 4; av_new_packet(pkt, len); memcpy(pkt->data, buf, len); break; case AV_CODEC_ID_MPEG1VIDEO: case AV_CODEC_ID_MPEG2VIDEO: /* better than nothing: skip MPEG video RTP header */ if (len <= 4) return -1; h = AV_RB32(buf); buf += 4; len -= 4; if (h & (1 << 26)) { /* MPEG-2 */ if (len <= 4) return -1; buf += 4; len -= 4; } av_new_packet(pkt, len); memcpy(pkt->data, buf, len); break; default: av_new_packet(pkt, len); memcpy(pkt->data, buf, len); break; } pkt->stream_index = st->index; } // now perform timestamp things.... finalize_packet(s, pkt, timestamp); return rv; }


static int tiff_decode_tag(TiffContext *s, const uint8_t *start, const uint8_t *buf, const uint8_t *end_buf) { int tag, type, count, off, value = 0; int i, j; uint32_t *pal; const uint8_t *rp, *gp, *bp; tag = tget_short(&buf, s->le); type = tget_short(&buf, s->le); count = tget_long(&buf, s->le); off = tget_long(&buf, s->le); if(count == 1){ switch(type){ case TIFF_BYTE: case TIFF_SHORT: buf -= 4; value = tget(&buf, type, s->le); buf = NULL; break; case TIFF_LONG: value = off; buf = NULL; break; case TIFF_STRING: if(count <= 4){ buf -= 4; break; } default: value = -1; buf = start + off; } }else if(type_sizes[type] * count <= 4){ buf -= 4; }else{ buf = start + off; } if(buf && (buf < start || buf > end_buf)){ av_log(s->avctx, AV_LOG_ERROR, "Tag referencing position outside the image\n"); return -1; } switch(tag){ case TIFF_WIDTH: s->width = value; break; case TIFF_HEIGHT: s->height = value; break; case TIFF_BPP: if(count == 1) s->bpp = value; else{ switch(type){ case TIFF_BYTE: s->bpp = (off & 0xFF) + ((off >> 8) & 0xFF) + ((off >> 16) & 0xFF) + ((off >> 24) & 0xFF); break; case TIFF_SHORT: case TIFF_LONG: s->bpp = 0; for(i = 0; i < count; i++) s->bpp += tget(&buf, type, s->le); break; default: s->bpp = -1; } } if(count > 4){ av_log(s->avctx, AV_LOG_ERROR, "This format is not supported (bpp=%d, %d components)\n", s->bpp, count); return -1; } switch(s->bpp*10 + count){ case 11: s->avctx->pix_fmt = PIX_FMT_MONOBLACK; break; case 81: s->avctx->pix_fmt = PIX_FMT_PAL8; break; case 243: s->avctx->pix_fmt = PIX_FMT_RGB24; break; case 161: s->avctx->pix_fmt = PIX_FMT_GRAY16BE; break; case 324: s->avctx->pix_fmt = PIX_FMT_RGBA; break; case 483: s->avctx->pix_fmt = s->le ? PIX_FMT_RGB48LE : PIX_FMT_RGB48BE; break; default: av_log(s->avctx, AV_LOG_ERROR, "This format is not supported (bpp=%d, %d components)\n", s->bpp, count); return -1; } if(s->width != s->avctx->width || s->height != s->avctx->height){ if(av_image_check_size(s->width, s->height, 0, s->avctx)) return -1; avcodec_set_dimensions(s->avctx, s->width, s->height); } if(s->picture.data[0]) s->avctx->release_buffer(s->avctx, &s->picture); if(s->avctx->get_buffer(s->avctx, &s->picture) < 0){ av_log(s->avctx, AV_LOG_ERROR, "get_buffer() failed\n"); return -1; } if(s->bpp == 8){ /* make default grayscale pal */ pal = (uint32_t *) s->picture.data[1]; for(i = 0; i < 256; i++) pal[i] = i * 0x010101; } break; case TIFF_COMPR: s->compr = value; s->predictor = 0; switch(s->compr){ case TIFF_RAW: case TIFF_PACKBITS: case TIFF_LZW: case TIFF_CCITT_RLE: break; case TIFF_G3: case TIFF_G4: s->fax_opts = 0; break; case TIFF_DEFLATE: case TIFF_ADOBE_DEFLATE: #if CONFIG_ZLIB break; #else av_log(s->avctx, AV_LOG_ERROR, "Deflate: ZLib not compiled in\n"); return -1; #endif case TIFF_JPEG: case TIFF_NEWJPEG: av_log(s->avctx, AV_LOG_ERROR, "JPEG compression is not supported\n"); return -1; default: av_log(s->avctx, AV_LOG_ERROR, "Unknown compression method %i\n", s->compr); return -1; } break; case TIFF_ROWSPERSTRIP: if(type == TIFF_LONG && value == -1) value = s->avctx->height; if(value < 1){ av_log(s->avctx, AV_LOG_ERROR, "Incorrect value of rows per strip\n"); return -1; } s->rps = value; break; case TIFF_STRIP_OFFS: if(count == 1){ s->stripdata = NULL; s->stripoff = value; }else s->stripdata = start + off; s->strips = count; if(s->strips == 1) s->rps = s->height; s->sot = type; if(s->stripdata > end_buf){ av_log(s->avctx, AV_LOG_ERROR, "Tag referencing position outside the image\n"); return -1; } break; case TIFF_STRIP_SIZE: if(count == 1){ s->stripsizes = NULL; s->stripsize = value; s->strips = 1; }else{ s->stripsizes = start + off; } s->strips = count; s->sstype = type; if(s->stripsizes > end_buf){ av_log(s->avctx, AV_LOG_ERROR, "Tag referencing position outside the image\n"); return -1; } break; case TIFF_PREDICTOR: s->predictor = value; break; case TIFF_INVERT: switch(value){ case 0: s->invert = 1; break; case 1: s->invert = 0; break; case 2: case 3: break; default: av_log(s->avctx, AV_LOG_ERROR, "Color mode %d is not supported\n", value); return -1; } break; case TIFF_FILL_ORDER: if(value < 1 || value > 2){ av_log(s->avctx, AV_LOG_ERROR, "Unknown FillOrder value %d, trying default one\n", value); value = 1; } s->fill_order = value - 1; break; case TIFF_PAL: if(s->avctx->pix_fmt != PIX_FMT_PAL8){ av_log(s->avctx, AV_LOG_ERROR, "Palette met but this is not palettized format\n"); return -1; } pal = (uint32_t *) s->picture.data[1]; off = type_sizes[type]; rp = buf; gp = buf + count / 3 * off; bp = buf + count / 3 * off * 2; off = (type_sizes[type] - 1) << 3; for(i = 0; i < count / 3; i++){ j = (tget(&rp, type, s->le) >> off) << 16; j |= (tget(&gp, type, s->le) >> off) << 8; j |= tget(&bp, type, s->le) >> off; pal[i] = j; } break; case TIFF_PLANAR: if(value == 2){ av_log(s->avctx, AV_LOG_ERROR, "Planar format is not supported\n"); return -1; } break; case TIFF_T4OPTIONS: if(s->compr == TIFF_G3) s->fax_opts = value; break; case TIFF_T6OPTIONS: if(s->compr == TIFF_G4) s->fax_opts = value; break; } return 0; }


static int qcow2_open(BlockDriverState *bs, QDict *options, int flags, Error **errp) { BDRVQcowState *s = bs->opaque; int len, i, ret = 0; QCowHeader header; QemuOpts *opts; Error *local_err = NULL; uint64_t ext_end; uint64_t l1_vm_state_index; const char *opt_overlap_check; int overlap_check_template = 0; ret = bdrv_pread(bs->file, 0, &header, sizeof(header)); if (ret < 0) { error_setg_errno(errp, -ret, "Could not read qcow2 header"); be32_to_cpus(&header.magic); be32_to_cpus(&header.version); be64_to_cpus(&header.backing_file_offset); be32_to_cpus(&header.backing_file_size); be64_to_cpus(&header.size); be32_to_cpus(&header.cluster_bits); be32_to_cpus(&header.crypt_method); be64_to_cpus(&header.l1_table_offset); be32_to_cpus(&header.l1_size); be64_to_cpus(&header.refcount_table_offset); be32_to_cpus(&header.refcount_table_clusters); be64_to_cpus(&header.snapshots_offset); be32_to_cpus(&header.nb_snapshots); if (header.magic != QCOW_MAGIC) { error_setg(errp, "Image is not in qcow2 format"); if (header.version < 2 || header.version > 3) { report_unsupported(bs, errp, "QCOW version %d", header.version); ret = -ENOTSUP; s->qcow_version = header.version; /* Initialise cluster size */ if (header.cluster_bits < MIN_CLUSTER_BITS || header.cluster_bits > MAX_CLUSTER_BITS) { error_setg(errp, "Unsupported cluster size: 2^%i", header.cluster_bits); s->cluster_bits = header.cluster_bits; s->cluster_size = 1 << s->cluster_bits; s->cluster_sectors = 1 << (s->cluster_bits - 9); /* Initialise version 3 header fields */ if (header.version == 2) { header.incompatible_features = 0; header.compatible_features = 0; header.autoclear_features = 0; header.refcount_order = 4; header.header_length = 72; } else { be64_to_cpus(&header.incompatible_features); be64_to_cpus(&header.compatible_features); be64_to_cpus(&header.autoclear_features); be32_to_cpus(&header.refcount_order); be32_to_cpus(&header.header_length); if (header.header_length < 104) { error_setg(errp, "qcow2 header too short"); if (header.header_length > s->cluster_size) { error_setg(errp, "qcow2 header exceeds cluster size"); if (header.header_length > sizeof(header)) { s->unknown_header_fields_size = header.header_length - sizeof(header); s->unknown_header_fields = g_malloc(s->unknown_header_fields_size); ret = bdrv_pread(bs->file, sizeof(header), s->unknown_header_fields, s->unknown_header_fields_size); if (ret < 0) { error_setg_errno(errp, -ret, "Could not read unknown qcow2 header " "fields"); if (header.backing_file_offset) { ext_end = header.backing_file_offset; } else { ext_end = 1 << header.cluster_bits; /* Handle feature bits */ s->incompatible_features = header.incompatible_features; s->compatible_features = header.compatible_features; s->autoclear_features = header.autoclear_features; if (s->incompatible_features & ~QCOW2_INCOMPAT_MASK) { void *feature_table = NULL; qcow2_read_extensions(bs, header.header_length, ext_end, &feature_table, NULL); report_unsupported_feature(bs, errp, feature_table, s->incompatible_features & ~QCOW2_INCOMPAT_MASK); ret = -ENOTSUP; g_free(feature_table); if (s->incompatible_features & QCOW2_INCOMPAT_CORRUPT) { /* Corrupt images may not be written to unless they are being repaired */ if ((flags & BDRV_O_RDWR) && !(flags & BDRV_O_CHECK)) { error_setg(errp, "qcow2: Image is corrupt; cannot be opened " "read/write"); ret = -EACCES; /* Check support for various header values */ if (header.refcount_order != 4) { report_unsupported(bs, errp, "%d bit reference counts", 1 << header.refcount_order); ret = -ENOTSUP; s->refcount_order = header.refcount_order; if (header.crypt_method > QCOW_CRYPT_AES) { error_setg(errp, "Unsupported encryption method: %i", header.crypt_method); s->crypt_method_header = header.crypt_method; if (s->crypt_method_header) { bs->encrypted = 1; s->l2_bits = s->cluster_bits - 3; /* L2 is always one cluster */ s->l2_size = 1 << s->l2_bits; bs->total_sectors = header.size / 512; s->csize_shift = (62 - (s->cluster_bits - 8)); s->csize_mask = (1 << (s->cluster_bits - 8)) - 1; s->cluster_offset_mask = (1LL << s->csize_shift) - 1; s->refcount_table_offset = header.refcount_table_offset; s->refcount_table_size = header.refcount_table_clusters << (s->cluster_bits - 3); s->snapshots_offset = header.snapshots_offset; s->nb_snapshots = header.nb_snapshots; /* read the level 1 table */ s->l1_size = header.l1_size; l1_vm_state_index = size_to_l1(s, header.size); if (l1_vm_state_index > INT_MAX) { error_setg(errp, "Image is too big"); ret = -EFBIG; s->l1_vm_state_index = l1_vm_state_index; /* the L1 table must contain at least enough entries to put header.size bytes */ if (s->l1_size < s->l1_vm_state_index) { error_setg(errp, "L1 table is too small"); s->l1_table_offset = header.l1_table_offset; if (s->l1_size > 0) { s->l1_table = g_malloc0( align_offset(s->l1_size * sizeof(uint64_t), 512)); ret = bdrv_pread(bs->file, s->l1_table_offset, s->l1_table, s->l1_size * sizeof(uint64_t)); if (ret < 0) { error_setg_errno(errp, -ret, "Could not read L1 table"); for(i = 0;i < s->l1_size; i++) { be64_to_cpus(&s->l1_table[i]); /* alloc L2 table/refcount block cache */ s->l2_table_cache = qcow2_cache_create(bs, L2_CACHE_SIZE); s->refcount_block_cache = qcow2_cache_create(bs, REFCOUNT_CACHE_SIZE); s->cluster_cache = g_malloc(s->cluster_size); /* one more sector for decompressed data alignment */ s->cluster_data = qemu_blockalign(bs, QCOW_MAX_CRYPT_CLUSTERS * s->cluster_size + 512); s->cluster_cache_offset = -1; s->flags = flags; ret = qcow2_refcount_init(bs); if (ret != 0) { error_setg_errno(errp, -ret, "Could not initialize refcount handling"); QLIST_INIT(&s->cluster_allocs); QTAILQ_INIT(&s->discards); /* read qcow2 extensions */ if (qcow2_read_extensions(bs, header.header_length, ext_end, NULL, &local_err)) { error_propagate(errp, local_err); /* read the backing file name */ if (header.backing_file_offset != 0) { len = header.backing_file_size; if (len > 1023) { len = 1023; ret = bdrv_pread(bs->file, header.backing_file_offset, bs->backing_file, len); if (ret < 0) { error_setg_errno(errp, -ret, "Could not read backing file name"); bs->backing_file[len] = '\0'; ret = qcow2_read_snapshots(bs); if (ret < 0) { error_setg_errno(errp, -ret, "Could not read snapshots"); /* Clear unknown autoclear feature bits */ if (!bs->read_only && !(flags & BDRV_O_INCOMING) && s->autoclear_features) { s->autoclear_features = 0; ret = qcow2_update_header(bs); if (ret < 0) { error_setg_errno(errp, -ret, "Could not update qcow2 header"); /* Initialise locks */ qemu_co_mutex_init(&s->lock); /* Repair image if dirty */ if (!(flags & (BDRV_O_CHECK | BDRV_O_INCOMING)) && !bs->read_only && (s->incompatible_features & QCOW2_INCOMPAT_DIRTY)) { BdrvCheckResult result = {0}; ret = qcow2_check(bs, &result, BDRV_FIX_ERRORS); if (ret < 0) { error_setg_errno(errp, -ret, "Could not repair dirty image"); /* Enable lazy_refcounts according to image and command line options */ opts = qemu_opts_create(&qcow2_runtime_opts, NULL, 0, &error_abort); qemu_opts_absorb_qdict(opts, options, &local_err); if (local_err) { error_propagate(errp, local_err); s->use_lazy_refcounts = qemu_opt_get_bool(opts, QCOW2_OPT_LAZY_REFCOUNTS, (s->compatible_features & QCOW2_COMPAT_LAZY_REFCOUNTS)); s->discard_passthrough[QCOW2_DISCARD_NEVER] = false; s->discard_passthrough[QCOW2_DISCARD_ALWAYS] = true; s->discard_passthrough[QCOW2_DISCARD_REQUEST] = qemu_opt_get_bool(opts, QCOW2_OPT_DISCARD_REQUEST, flags & BDRV_O_UNMAP); s->discard_passthrough[QCOW2_DISCARD_SNAPSHOT] = qemu_opt_get_bool(opts, QCOW2_OPT_DISCARD_SNAPSHOT, true); s->discard_passthrough[QCOW2_DISCARD_OTHER] = qemu_opt_get_bool(opts, QCOW2_OPT_DISCARD_OTHER, false); opt_overlap_check = qemu_opt_get(opts, "overlap-check") ?: "cached"; if (!strcmp(opt_overlap_check, "none")) { overlap_check_template = 0; } else if (!strcmp(opt_overlap_check, "constant")) { overlap_check_template = QCOW2_OL_CONSTANT; } else if (!strcmp(opt_overlap_check, "cached")) { overlap_check_template = QCOW2_OL_CACHED; } else if (!strcmp(opt_overlap_check, "all")) { overlap_check_template = QCOW2_OL_ALL; } else { error_setg(errp, "Unsupported value '%s' for qcow2 option " "'overlap-check'. Allowed are either of the following: " "none, constant, cached, all", opt_overlap_check); qemu_opts_del(opts); s->overlap_check = 0; for (i = 0; i < QCOW2_OL_MAX_BITNR; i++) { /* overlap-check defines a template bitmask, but every flag may be * overwritten through the associated boolean option */ s->overlap_check |= qemu_opt_get_bool(opts, overlap_bool_option_names[i], overlap_check_template & (1 << i)) << i; qemu_opts_del(opts); if (s->use_lazy_refcounts && s->qcow_version < 3) { error_setg(errp, "Lazy refcounts require a qcow2 image with at least " "qemu 1.1 compatibility level"); #ifdef DEBUG_ALLOC { BdrvCheckResult result = {0}; qcow2_check_refcounts(bs, &result, 0); #endif return ret; fail: g_free(s->unknown_header_fields); cleanup_unknown_header_ext(bs); qcow2_free_snapshots(bs); qcow2_refcount_close(bs); g_free(s->l1_table); /* else pre-write overlap checks in cache_destroy may crash */ s->l1_table = NULL; if (s->l2_table_cache) { qcow2_cache_destroy(bs, s->l2_table_cache); if (s->refcount_block_cache) { qcow2_cache_destroy(bs, s->refcount_block_cache); g_free(s->cluster_cache); qemu_vfree(s->cluster_data); return ret;


static void ape_unpack_mono(APEContext *ctx, int count) { if (ctx->frameflags & APE_FRAMECODE_STEREO_SILENCE) { /* We are pure silence, so we're done. */ av_log(ctx->avctx, AV_LOG_DEBUG, "pure silence mono\n"); return; } entropy_decode(ctx, count, 0); ape_apply_filters(ctx, ctx->decoded[0], NULL, count); /* Now apply the predictor decoding */ predictor_decode_mono(ctx, count); /* Pseudo-stereo - just copy left channel to right channel */ if (ctx->channels == 2) { memcpy(ctx->decoded[1], ctx->decoded[0], count * sizeof(*ctx->decoded[1])); } }


static int _do_bit_allocation(AC3DecodeContext *ctx, int chnl) { ac3_audio_block *ab = &ctx->audio_block; int16_t sdecay, fdecay, sgain, dbknee, floor; int16_t lowcomp, fgain, snroffset, fastleak, slowleak; int16_t psd[256], bndpsd[50], excite[50], mask[50], delta; uint8_t start, end, bin, i, j, k, lastbin, bndstrt, bndend, begin, deltnseg, band, seg, address; uint8_t fscod = ctx->sync_info.fscod; uint8_t *exps, *deltoffst, *deltlen, *deltba; uint8_t *baps; int do_delta = 0; /* initialization */ sdecay = sdecaytab[ab->sdcycod]; fdecay = fdecaytab[ab->fdcycod]; sgain = sgaintab[ab->sgaincod]; dbknee = dbkneetab[ab->dbpbcod]; floor = floortab[ab->floorcod]; if (chnl == 5) { start = ab->cplstrtmant; end = ab->cplendmant; fgain = fgaintab[ab->cplfgaincod]; snroffset = (((ab->csnroffst - 15) << 4) + ab->cplfsnroffst) << 2; fastleak = (ab->cplfleak << 8) + 768; slowleak = (ab->cplsleak << 8) + 768; exps = ab->dcplexps; baps = ab->cplbap; if (ab->cpldeltbae == 0 || ab->cpldeltbae == 1) { do_delta = 1; deltnseg = ab->cpldeltnseg; deltoffst = ab->cpldeltoffst; deltlen = ab->cpldeltlen; deltba = ab->cpldeltba; } } else if (chnl == 6) { start = 0; end = 7; lowcomp = 0; fgain = fgaintab[ab->lfefgaincod]; snroffset = (((ab->csnroffst - 15) << 4) + ab->lfefsnroffst) << 2; exps = ab->dlfeexps; baps = ab->lfebap; } else { start = 0; end = ab->endmant[chnl]; lowcomp = 0; fgain = fgaintab[ab->fgaincod[chnl]]; snroffset = (((ab->csnroffst - 15) << 4) + ab->fsnroffst[chnl]) << 2; exps = ab->dexps[chnl]; baps = ab->bap[chnl]; if (ab->deltbae[chnl] == 0 || ab->deltbae[chnl] == 1) { do_delta = 1; deltnseg = ab->deltnseg[chnl]; deltoffst = ab->deltoffst[chnl]; deltlen = ab->deltlen[chnl]; deltba = ab->deltba[chnl]; } } for (bin = start; bin < end; bin++) /* exponent mapping into psd */ psd[bin] = (3072 - ((int16_t) (exps[bin] << 7))); /* psd integration */ j = start; k = masktab[start]; do { lastbin = FFMIN(bndtab[k] + bndsz[k], end); bndpsd[k] = psd[j]; j++; for (i = j; i < lastbin; i++) { bndpsd[k] = logadd(bndpsd[k], psd[j]); j++; } k++; } while (end > lastbin); /* compute the excite function */ bndstrt = masktab[start]; bndend = masktab[end - 1] + 1; if (bndstrt == 0) { lowcomp = calc_lowcomp(lowcomp, bndpsd[0], bndpsd[1], 0); excite[0] = bndpsd[0] - fgain - lowcomp; lowcomp = calc_lowcomp(lowcomp, bndpsd[1], bndpsd[2], 1); excite[1] = bndpsd[1] - fgain - lowcomp; begin = 7; for (bin = 2; bin < 7; bin++) { if (bndend != 7 || bin != 6) lowcomp = calc_lowcomp(lowcomp, bndpsd[bin], bndpsd[bin + 1], bin); fastleak = bndpsd[bin] - fgain; slowleak = bndpsd[bin] - sgain; excite[bin] = fastleak - lowcomp; if (bndend != 7 || bin != 6) if (bndpsd[bin] <= bndpsd[bin + 1]) { begin = bin + 1; break; } } for (bin = begin; bin < (FFMIN(bndend, 22)); bin++) { if (bndend != 7 || bin != 6) lowcomp = calc_lowcomp(lowcomp, bndpsd[bin], bndpsd[bin + 1], bin); fastleak -= fdecay; fastleak = FFMAX(fastleak, bndpsd[bin] - fgain); slowleak -= sdecay; slowleak = FFMAX(slowleak, bndpsd[bin] - sgain); excite[bin] = FFMAX(fastleak - lowcomp, slowleak); } begin = 22; } else { begin = bndstrt; } for (bin = begin; bin < bndend; bin++) { fastleak -= fdecay; fastleak = FFMAX(fastleak, bndpsd[bin] - fgain); slowleak -= sdecay; slowleak = FFMAX(slowleak, bndpsd[bin] - sgain); excite[bin] = FFMAX(fastleak, slowleak); } /* compute the masking curve */ for (bin = bndstrt; bin < bndend; bin++) { if (bndpsd[bin] < dbknee) excite[bin] += ((dbknee - bndpsd[bin]) >> 2); mask[bin] = FFMAX(excite[bin], hth[bin][fscod]); } /* apply the delta bit allocation */ if (do_delta) { band = 0; for (seg = 0; seg < deltnseg + 1; seg++) { band += deltoffst[seg]; if (deltba[seg] >= 4) delta = (deltba[seg] - 3) << 7; else delta = (deltba[seg] - 4) << 7; for (k = 0; k < deltlen[seg]; k++) { mask[band] += delta; band++; } } } /*compute the bit allocation */ i = start; j = masktab[start]; do { lastbin = FFMIN(bndtab[j] + bndsz[j], end); mask[j] -= snroffset; mask[j] -= floor; if (mask[j] < 0) mask[j] = 0; mask[j] &= 0x1fe0; mask[j] += floor; for (k = i; k < lastbin; k++) { address = (psd[i] - mask[j]) >> 5; address = FFMIN(63, (FFMAX(0, address))); baps[i] = baptab[address]; i++; } j++; } while (end > lastbin); return 0; }


struct omap_mcspi_s *omap_mcspi_init(struct omap_target_agent_s *ta, int chnum, qemu_irq irq, qemu_irq *drq, omap_clk fclk, omap_clk iclk) { struct omap_mcspi_s *s = (struct omap_mcspi_s *) g_malloc0(sizeof(struct omap_mcspi_s)); struct omap_mcspi_ch_s *ch = s->ch; s->irq = irq; s->chnum = chnum; while (chnum --) { ch->txdrq = *drq ++; ch->rxdrq = *drq ++; ch ++; } omap_mcspi_reset(s); memory_region_init_io(&s->iomem, NULL, &omap_mcspi_ops, s, "omap.mcspi", omap_l4_region_size(ta, 0)); omap_l4_attach(ta, 0, &s->iomem); return s; }


int pci_vga_init(PCIBus *bus, unsigned long vga_bios_offset, int vga_bios_size) { PCIDevice *dev; dev = pci_create(bus, -1, "VGA"); qdev_prop_set_uint32(&dev->qdev, "bios-offset", vga_bios_offset); qdev_prop_set_uint32(&dev->qdev, "bios-size", vga_bios_offset); qdev_init(&dev->qdev); return 0; }


void vm_start(void) { RunState requested; qemu_vmstop_requested(&requested); if (runstate_is_running() && requested == RUN_STATE__MAX) { return; } /* Ensure that a STOP/RESUME pair of events is emitted if a * vmstop request was pending. The BLOCK_IO_ERROR event, for * example, according to documentation is always followed by * the STOP event. */ if (runstate_is_running()) { qapi_event_send_stop(&error_abort); } else { cpu_enable_ticks(); runstate_set(RUN_STATE_RUNNING); vm_state_notify(1, RUN_STATE_RUNNING); resume_all_vcpus(); } qapi_event_send_resume(&error_abort); }


static inline void RENAME(rgb32tobgr32)(const uint8_t *src, uint8_t *dst, unsigned int src_size) { #ifdef HAVE_MMX /* TODO: unroll this loop */ asm volatile ( "xor %%"REG_a", %%"REG_a" \n\t" ".balign 16 \n\t" "1: \n\t" PREFETCH" 32(%0, %%"REG_a") \n\t" "movq (%0, %%"REG_a"), %%mm0 \n\t" "movq %%mm0, %%mm1 \n\t" "movq %%mm0, %%mm2 \n\t" "pslld $16, %%mm0 \n\t" "psrld $16, %%mm1 \n\t" "pand "MANGLE(mask32r)", %%mm0 \n\t" "pand "MANGLE(mask32g)", %%mm2 \n\t" "pand "MANGLE(mask32b)", %%mm1 \n\t" "por %%mm0, %%mm2 \n\t" "por %%mm1, %%mm2 \n\t" MOVNTQ" %%mm2, (%1, %%"REG_a") \n\t" "add $8, %%"REG_a" \n\t" "cmp %2, %%"REG_a" \n\t" " jb 1b \n\t" :: "r" (src), "r"(dst), "r" ((long)src_size-7) : "%"REG_a ); __asm __volatile(SFENCE:::"memory"); __asm __volatile(EMMS:::"memory"); #else unsigned i; unsigned num_pixels = src_size >> 2; for(i=0; i<num_pixels; i++) { #ifdef WORDS_BIGENDIAN dst[4*i + 1] = src[4*i + 3]; dst[4*i + 2] = src[4*i + 2]; dst[4*i + 3] = src[4*i + 1]; #else dst[4*i + 0] = src[4*i + 2]; dst[4*i + 1] = src[4*i + 1]; dst[4*i + 2] = src[4*i + 0]; #endif } #endif }


static void v9fs_xattrcreate(void *opaque) { int flags; int32_t fid; int64_t size; ssize_t err = 0; V9fsString name; size_t offset = 7; V9fsFidState *file_fidp; V9fsFidState *xattr_fidp; V9fsPDU *pdu = opaque; V9fsState *s = pdu->s; pdu_unmarshal(pdu, offset, "dsqd", &fid, &name, &size, &flags); file_fidp = get_fid(pdu, fid); if (file_fidp == NULL) { err = -EINVAL; goto out_nofid; } /* Make the file fid point to xattr */ xattr_fidp = file_fidp; xattr_fidp->fid_type = P9_FID_XATTR; xattr_fidp->fs.xattr.copied_len = 0; xattr_fidp->fs.xattr.len = size; xattr_fidp->fs.xattr.flags = flags; v9fs_string_init(&xattr_fidp->fs.xattr.name); v9fs_string_copy(&xattr_fidp->fs.xattr.name, &name); if (size) { xattr_fidp->fs.xattr.value = g_malloc(size); } else { xattr_fidp->fs.xattr.value = NULL; } err = offset; put_fid(pdu, file_fidp); out_nofid: complete_pdu(s, pdu, err); v9fs_string_free(&name); }


static void spr_read_sdr1 (void *opaque, int gprn, int sprn) { tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUState, sdr1)); }


void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, unsigned long vga_ram_offset, int vga_ram_size) { CirrusVGAState *s; s = qemu_mallocz(sizeof(CirrusVGAState)); vga_common_init((VGAState *)s, ds, vga_ram_base, vga_ram_offset, vga_ram_size); cirrus_init_common(s, CIRRUS_ID_CLGD5430, 0); s->console = graphic_console_init(s->ds, s->update, s->invalidate, s->screen_dump, s->text_update, s); /* XXX ISA-LFB support */ }


StringInputVisitor *string_input_visitor_new(const char *str) { StringInputVisitor *v; v = g_malloc0(sizeof(*v)); v->visitor.type = VISITOR_INPUT; v->visitor.type_int64 = parse_type_int64; v->visitor.type_uint64 = parse_type_uint64; v->visitor.type_size = parse_type_size; v->visitor.type_bool = parse_type_bool; v->visitor.type_str = parse_type_str; v->visitor.type_number = parse_type_number; v->visitor.start_list = start_list; v->visitor.next_list = next_list; v->visitor.end_list = end_list; v->visitor.optional = parse_optional; v->string = str; v->head = true; return v; }


void spapr_vio_bus_register_withprop(VIOsPAPRDeviceInfo *info) { info->qdev.init = spapr_vio_busdev_init; info->qdev.bus_info = &spapr_vio_bus_info; assert(info->qdev.size >= sizeof(VIOsPAPRDevice)); qdev_register(&info->qdev); }


static inline void tcg_out_adr(TCGContext *s, TCGReg rd, void *target) { ptrdiff_t offset = tcg_pcrel_diff(s, target); assert(offset == sextract64(offset, 0, 21)); tcg_out_insn(s, 3406, ADR, rd, offset); }


static int pc_boot_set(void *opaque, const char *boot_device) { return set_boot_dev(opaque, boot_device); }


static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi, TCGMemOp opc, int mem_index, bool is_load) { TCGReg base = TCG_AREG0; int cmp_off = (is_load ? offsetof(CPUArchState, tlb_table[mem_index][0].addr_read) : offsetof(CPUArchState, tlb_table[mem_index][0].addr_write)); int add_off = offsetof(CPUArchState, tlb_table[mem_index][0].addend); unsigned s_bits = opc & MO_SIZE; unsigned a_bits = get_alignment_bits(opc); /* V7 generates the following: * ubfx r0, addrlo, #TARGET_PAGE_BITS, #CPU_TLB_BITS * add r2, env, #high * add r2, r2, r0, lsl #CPU_TLB_ENTRY_BITS * ldr r0, [r2, #cmp] * ldr r2, [r2, #add] * movw tmp, #page_align_mask * bic tmp, addrlo, tmp * cmp r0, tmp * * Otherwise we generate: * shr tmp, addrlo, #TARGET_PAGE_BITS * add r2, env, #high * and r0, tmp, #(CPU_TLB_SIZE - 1) * add r2, r2, r0, lsl #CPU_TLB_ENTRY_BITS * ldr r0, [r2, #cmp] * ldr r2, [r2, #add] * tst addrlo, #s_mask * cmpeq r0, tmp, lsl #TARGET_PAGE_BITS */ if (use_armv7_instructions) { tcg_out_extract(s, COND_AL, TCG_REG_R0, addrlo, TARGET_PAGE_BITS, CPU_TLB_BITS); } else { tcg_out_dat_reg(s, COND_AL, ARITH_MOV, TCG_REG_TMP, 0, addrlo, SHIFT_IMM_LSR(TARGET_PAGE_BITS)); } /* We checked that the offset is contained within 16 bits above. */ if (add_off > 0xfff || (use_armv6_instructions && cmp_off > 0xff)) { tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R2, base, (24 << 7) | (cmp_off >> 8)); base = TCG_REG_R2; add_off -= cmp_off & 0xff00; cmp_off &= 0xff; } if (!use_armv7_instructions) { tcg_out_dat_imm(s, COND_AL, ARITH_AND, TCG_REG_R0, TCG_REG_TMP, CPU_TLB_SIZE - 1); } tcg_out_dat_reg(s, COND_AL, ARITH_ADD, TCG_REG_R2, base, TCG_REG_R0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS)); /* Load the tlb comparator. Use ldrd if needed and available, but due to how the pointer needs setting up, ldm isn't useful. Base arm5 doesn't have ldrd, but armv5te does. */ if (use_armv6_instructions && TARGET_LONG_BITS == 64) { tcg_out_ldrd_8(s, COND_AL, TCG_REG_R0, TCG_REG_R2, cmp_off); } else { tcg_out_ld32_12(s, COND_AL, TCG_REG_R0, TCG_REG_R2, cmp_off); if (TARGET_LONG_BITS == 64) { tcg_out_ld32_12(s, COND_AL, TCG_REG_R1, TCG_REG_R2, cmp_off + 4); } } /* Load the tlb addend. */ tcg_out_ld32_12(s, COND_AL, TCG_REG_R2, TCG_REG_R2, add_off); /* Check alignment. We don't support inline unaligned acceses, but we can easily support overalignment checks. */ if (a_bits < s_bits) { a_bits = s_bits; } if (use_armv7_instructions) { tcg_target_ulong mask = ~(TARGET_PAGE_MASK | ((1 << a_bits) - 1)); int rot = encode_imm(mask); if (rot >= 0) { tcg_out_dat_imm(s, COND_AL, ARITH_BIC, TCG_REG_TMP, addrlo, rotl(mask, rot) | (rot << 7)); } else { tcg_out_movi32(s, COND_AL, TCG_REG_TMP, mask); tcg_out_dat_reg(s, COND_AL, ARITH_BIC, TCG_REG_TMP, addrlo, TCG_REG_TMP, 0); } tcg_out_dat_reg(s, COND_AL, ARITH_CMP, 0, TCG_REG_R0, TCG_REG_TMP, 0); } else { if (a_bits) { tcg_out_dat_imm(s, COND_AL, ARITH_TST, 0, addrlo, (1 << a_bits) - 1); } tcg_out_dat_reg(s, (a_bits ? COND_EQ : COND_AL), ARITH_CMP, 0, TCG_REG_R0, TCG_REG_TMP, SHIFT_IMM_LSL(TARGET_PAGE_BITS)); } if (TARGET_LONG_BITS == 64) { tcg_out_dat_reg(s, COND_EQ, ARITH_CMP, 0, TCG_REG_R1, addrhi, 0); } return TCG_REG_R2; }


static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg *args, TCGArg dst, TCGArg val) { TCGOpcode new_op = op_to_movi(op->opc); tcg_target_ulong mask; op->opc = new_op; reset_temp(dst); temps[dst].state = TCG_TEMP_CONST; temps[dst].val = val; mask = val; if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) { /* High bits of the destination are now garbage. */ mask |= ~0xffffffffull; } temps[dst].mask = mask; args[0] = dst; args[1] = val; }


static int colo_do_checkpoint_transaction(MigrationState *s) { Error *local_err = NULL; colo_send_message(s->to_dst_file, COLO_MESSAGE_CHECKPOINT_REQUEST, &local_err); if (local_err) { goto out; } colo_receive_check_message(s->rp_state.from_dst_file, COLO_MESSAGE_CHECKPOINT_REPLY, &local_err); if (local_err) { goto out; } /* TODO: suspend and save vm state to colo buffer */ colo_send_message(s->to_dst_file, COLO_MESSAGE_VMSTATE_SEND, &local_err); if (local_err) { goto out; } /* TODO: send vmstate to Secondary */ colo_receive_check_message(s->rp_state.from_dst_file, COLO_MESSAGE_VMSTATE_RECEIVED, &local_err); if (local_err) { goto out; } colo_receive_check_message(s->rp_state.from_dst_file, COLO_MESSAGE_VMSTATE_LOADED, &local_err); if (local_err) { goto out; } /* TODO: resume Primary */ return 0; out: if (local_err) { error_report_err(local_err); } return -EINVAL; }


static int load_ipmovie_packet(IPMVEContext *s, AVIOContext *pb, AVPacket *pkt) { int chunk_type; if (s->audio_chunk_offset && s->audio_channels && s->audio_bits) { if (s->audio_type == AV_CODEC_ID_NONE) { av_log(s->avf, AV_LOG_ERROR, "Can not read audio packet before" "audio codec is known\n"); return CHUNK_BAD; } /* adjust for PCM audio by skipping chunk header */ if (s->audio_type != AV_CODEC_ID_INTERPLAY_DPCM) { s->audio_chunk_offset += 6; s->audio_chunk_size -= 6; } avio_seek(pb, s->audio_chunk_offset, SEEK_SET); s->audio_chunk_offset = 0; if (s->audio_chunk_size != av_get_packet(pb, pkt, s->audio_chunk_size)) return CHUNK_EOF; pkt->stream_index = s->audio_stream_index; pkt->pts = s->audio_frame_count; /* audio frame maintenance */ if (s->audio_type != AV_CODEC_ID_INTERPLAY_DPCM) s->audio_frame_count += (s->audio_chunk_size / s->audio_channels / (s->audio_bits / 8)); else s->audio_frame_count += (s->audio_chunk_size - 6 - s->audio_channels) / s->audio_channels; av_log(s->avf, AV_LOG_TRACE, "sending audio frame with pts %"PRId64" (%d audio frames)\n", pkt->pts, s->audio_frame_count); chunk_type = CHUNK_VIDEO; } else if (s->decode_map_chunk_offset) { /* send both the decode map and the video data together */ if (av_new_packet(pkt, 2 + s->decode_map_chunk_size + s->video_chunk_size)) return CHUNK_NOMEM; if (s->has_palette) { uint8_t *pal; pal = av_packet_new_side_data(pkt, AV_PKT_DATA_PALETTE, AVPALETTE_SIZE); if (pal) { memcpy(pal, s->palette, AVPALETTE_SIZE); s->has_palette = 0; } } if (s->changed) { ff_add_param_change(pkt, 0, 0, 0, s->video_width, s->video_height); s->changed = 0; } pkt->pos= s->decode_map_chunk_offset; avio_seek(pb, s->decode_map_chunk_offset, SEEK_SET); s->decode_map_chunk_offset = 0; AV_WL16(pkt->data, s->decode_map_chunk_size); if (avio_read(pb, pkt->data + 2, s->decode_map_chunk_size) != s->decode_map_chunk_size) { av_packet_unref(pkt); return CHUNK_EOF; } avio_seek(pb, s->video_chunk_offset, SEEK_SET); s->video_chunk_offset = 0; if (avio_read(pb, pkt->data + 2 + s->decode_map_chunk_size, s->video_chunk_size) != s->video_chunk_size) { av_packet_unref(pkt); return CHUNK_EOF; } pkt->stream_index = s->video_stream_index; pkt->pts = s->video_pts; av_log(s->avf, AV_LOG_TRACE, "sending video frame with pts %"PRId64"\n", pkt->pts); s->video_pts += s->frame_pts_inc; chunk_type = CHUNK_VIDEO; } else { avio_seek(pb, s->next_chunk_offset, SEEK_SET); chunk_type = CHUNK_DONE; } return chunk_type; }


static void verdex_init(ram_addr_t ram_size, int vga_ram_size, const char *boot_device, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model) { struct pxa2xx_state_s *cpu; int index; uint32_t verdex_rom = 0x02000000; uint32_t verdex_ram = 0x10000000; if (ram_size < (verdex_ram + verdex_rom + PXA2XX_INTERNAL_SIZE)) { fprintf(stderr, "This platform requires %i bytes of memory\n", verdex_ram + verdex_rom + PXA2XX_INTERNAL_SIZE); exit(1); } cpu = pxa270_init(verdex_ram, cpu_model ?: "pxa270-c0"); index = drive_get_index(IF_PFLASH, 0, 0); if (index == -1) { fprintf(stderr, "A flash image must be given with the " "'pflash' parameter\n"); exit(1); } if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(verdex_rom), drives_table[index].bdrv, sector_len, verdex_rom / sector_len, 2, 0, 0, 0, 0)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); exit(1); } cpu->env->regs[15] = 0x00000000; /* Interrupt line of NIC is connected to GPIO line 99 */ smc91c111_init(&nd_table[0], 0x04000300, pxa2xx_gpio_in_get(cpu->gpio)[99]); }


void pci_device_save(PCIDevice *s, QEMUFile *f) { int i; qemu_put_be32(f, s->version_id); /* PCI device version */ qemu_put_buffer(f, s->config, 256); for (i = 0; i < 4; i++) qemu_put_be32(f, s->irq_state[i]); }


static void qxl_flip(PCIQXLDevice *qxl, QXLRect *rect) { uint8_t *src = qxl->guest_primary.data; uint8_t *dst = qxl->guest_primary.flipped; int len, i; src += (qxl->guest_primary.surface.height - rect->top - 1) * qxl->guest_primary.stride; dst += rect->top * qxl->guest_primary.stride; src += rect->left * qxl->guest_primary.bytes_pp; dst += rect->left * qxl->guest_primary.bytes_pp; len = (rect->right - rect->left) * qxl->guest_primary.bytes_pp; for (i = rect->top; i < rect->bottom; i++) { memcpy(dst, src, len); dst += qxl->guest_primary.stride; src -= qxl->guest_primary.stride; } }


START_TEST(qdict_destroy_simple_test) { QDict *qdict; qdict = qdict_new(); qdict_put_obj(qdict, "num", QOBJECT(qint_from_int(0))); qdict_put_obj(qdict, "str", QOBJECT(qstring_from_str("foo"))); QDECREF(qdict); }


static int pcibus_reset(BusState *qbus) { pci_bus_reset(DO_UPCAST(PCIBus, qbus, qbus)); /* topology traverse is done by pci_bus_reset(). Tell qbus/qdev walker not to traverse the tree */ return 1; }


int AC3_NAME(encode_frame)(AVCodecContext *avctx, AVPacket *avpkt, const AVFrame *frame, int *got_packet_ptr) { AC3EncodeContext *s = avctx->priv_data; int ret; if (s->options.allow_per_frame_metadata) { ret = ff_ac3_validate_metadata(s); if (ret) return ret; } if (s->bit_alloc.sr_code == 1 || s->eac3) ff_ac3_adjust_frame_size(s); copy_input_samples(s, (SampleType **)frame->extended_data); apply_mdct(s); if (s->fixed_point) scale_coefficients(s); clip_coefficients(&s->dsp, s->blocks[0].mdct_coef[1], AC3_MAX_COEFS * s->num_blocks * s->channels); s->cpl_on = s->cpl_enabled; ff_ac3_compute_coupling_strategy(s); if (s->cpl_on) apply_channel_coupling(s); compute_rematrixing_strategy(s); if (!s->fixed_point) scale_coefficients(s); ff_ac3_apply_rematrixing(s); ff_ac3_process_exponents(s); ret = ff_ac3_compute_bit_allocation(s); if (ret) { av_log(avctx, AV_LOG_ERROR, "Bit allocation failed. Try increasing the bitrate.\n"); return ret; } ff_ac3_group_exponents(s); ff_ac3_quantize_mantissas(s); if ((ret = ff_alloc_packet2(avctx, avpkt, s->frame_size))) return ret; ff_ac3_output_frame(s, avpkt->data); if (frame->pts != AV_NOPTS_VALUE) avpkt->pts = frame->pts - ff_samples_to_time_base(avctx, avctx->delay); *got_packet_ptr = 1; return 0; }


static int read_channel_params(MLPDecodeContext *m, unsigned int substr, GetBitContext *gbp, unsigned int ch) { ChannelParams *cp = &m->channel_params[ch]; FilterParams *fir = &cp->filter_params[FIR]; FilterParams *iir = &cp->filter_params[IIR]; SubStream *s = &m->substream[substr]; if (s->param_presence_flags & PARAM_FIR) if (get_bits1(gbp)) if (read_filter_params(m, gbp, ch, FIR) < 0) return -1; if (s->param_presence_flags & PARAM_IIR) if (get_bits1(gbp)) if (read_filter_params(m, gbp, ch, IIR) < 0) return -1; if (fir->order && iir->order && fir->shift != iir->shift) { av_log(m->avctx, AV_LOG_ERROR, "FIR and IIR filters must use the same precision.\n"); return -1; } /* The FIR and IIR filters must have the same precision. * To simplify the filtering code, only the precision of the * FIR filter is considered. If only the IIR filter is employed, * the FIR filter precision is set to that of the IIR filter, so * that the filtering code can use it. */ if (!fir->order && iir->order) fir->shift = iir->shift; if (s->param_presence_flags & PARAM_HUFFOFFSET) if (get_bits1(gbp)) cp->huff_offset = get_sbits(gbp, 15); cp->codebook = get_bits(gbp, 2); cp->huff_lsbs = get_bits(gbp, 5); cp->sign_huff_offset = calculate_sign_huff(m, substr, ch); /* TODO: validate */ return 0; }


static int64_t rm_read_dts(AVFormatContext *s, int stream_index, int64_t *ppos, int64_t pos_limit) { RMDemuxContext *rm = s->priv_data; int64_t pos, dts; int stream_index2, flags, len, h; pos = *ppos; if(rm->old_format) return AV_NOPTS_VALUE; avio_seek(s->pb, pos, SEEK_SET); rm->remaining_len=0; for(;;){ int seq=1; AVStream *st; len=sync(s, &dts, &flags, &stream_index2, &pos); if(len<0) return AV_NOPTS_VALUE; st = s->streams[stream_index2]; if (st->codec->codec_type == AVMEDIA_TYPE_VIDEO) { h= avio_r8(s->pb); len--; if(!(h & 0x40)){ seq = avio_r8(s->pb); len--; } } if((flags&2) && (seq&0x7F) == 1){ // av_log(s, AV_LOG_DEBUG, "%d %d-%d %"PRId64" %d\n", flags, stream_index2, stream_index, dts, seq); av_add_index_entry(st, pos, dts, 0, 0, AVINDEX_KEYFRAME); if(stream_index2 == stream_index) break; } avio_skip(s->pb, len); } *ppos = pos; return dts; }


static int gif_image_write_header(AVIOContext *pb, int width, int height, int loop_count, uint32_t *palette) { int i; avio_write(pb, "GIF", 3); avio_write(pb, "89a", 3); avio_wl16(pb, width); avio_wl16(pb, height); if (palette) { avio_w8(pb, 0xf7); /* flags: global clut, 256 entries */ avio_w8(pb, 0x1f); /* background color index */ avio_w8(pb, 0); /* aspect ratio */ for (i = 0; i < 256; i++) { const uint32_t v = palette[i] & 0xffffff; avio_wb24(pb, v); } } else { avio_w8(pb, 0); /* flags */ avio_w8(pb, 0); /* background color index */ avio_w8(pb, 0); /* aspect ratio */ } /* "NETSCAPE EXTENSION" for looped animation GIF */ avio_w8(pb, 0x21); /* GIF Extension code */ avio_w8(pb, 0xff); /* Application Extension Label */ avio_w8(pb, 0x0b); /* Length of Application Block */ avio_write(pb, "NETSCAPE2.0", sizeof("NETSCAPE2.0") - 1); avio_w8(pb, 0x03); /* Length of Data Sub-Block */ avio_w8(pb, 0x01); avio_wl16(pb, (uint16_t)loop_count); avio_w8(pb, 0x00); /* Data Sub-block Terminator */ return 0; }


static av_cold int omx_encode_init(AVCodecContext *avctx) { OMXCodecContext *s = avctx->priv_data; int ret = AVERROR_ENCODER_NOT_FOUND; const char *role; OMX_BUFFERHEADERTYPE *buffer; OMX_ERRORTYPE err; #if CONFIG_OMX_RPI s->input_zerocopy = 1; #endif s->omx_context = omx_init(avctx, s->libname, s->libprefix); if (!s->omx_context) return AVERROR_ENCODER_NOT_FOUND; pthread_mutex_init(&s->state_mutex, NULL); pthread_cond_init(&s->state_cond, NULL); pthread_mutex_init(&s->input_mutex, NULL); pthread_cond_init(&s->input_cond, NULL); pthread_mutex_init(&s->output_mutex, NULL); pthread_cond_init(&s->output_cond, NULL); s->mutex_cond_inited = 1; s->avctx = avctx; s->state = OMX_StateLoaded; s->error = OMX_ErrorNone; switch (avctx->codec->id) { case AV_CODEC_ID_MPEG4: role = "video_encoder.mpeg4"; break; case AV_CODEC_ID_H264: role = "video_encoder.avc"; break; default: return AVERROR(ENOSYS); } if ((ret = find_component(s->omx_context, avctx, role, s->component_name, sizeof(s->component_name))) < 0) goto fail; av_log(avctx, AV_LOG_INFO, "Using %s\n", s->component_name); if ((ret = omx_component_init(avctx, role)) < 0) goto fail; if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) { while (1) { buffer = get_buffer(&s->output_mutex, &s->output_cond, &s->num_done_out_buffers, s->done_out_buffers, 1); if (buffer->nFlags & OMX_BUFFERFLAG_CODECCONFIG) { if ((ret = av_reallocp(&avctx->extradata, avctx->extradata_size + buffer->nFilledLen + AV_INPUT_BUFFER_PADDING_SIZE)) < 0) { avctx->extradata_size = 0; goto fail; } memcpy(avctx->extradata + avctx->extradata_size, buffer->pBuffer + buffer->nOffset, buffer->nFilledLen); avctx->extradata_size += buffer->nFilledLen; memset(avctx->extradata + avctx->extradata_size, 0, AV_INPUT_BUFFER_PADDING_SIZE); } err = OMX_FillThisBuffer(s->handle, buffer); if (err != OMX_ErrorNone) { append_buffer(&s->output_mutex, &s->output_cond, &s->num_done_out_buffers, s->done_out_buffers, buffer); av_log(avctx, AV_LOG_ERROR, "OMX_FillThisBuffer failed: %x\n", err); ret = AVERROR_UNKNOWN; goto fail; } if (avctx->codec->id == AV_CODEC_ID_H264) { // For H.264, the extradata can be returned in two separate buffers // (the videocore encoder on raspberry pi does this); // therefore check that we have got both SPS and PPS before continuing. int nals[32] = { 0 }; int i; for (i = 0; i + 4 < avctx->extradata_size; i++) { if (!avctx->extradata[i + 0] && !avctx->extradata[i + 1] && !avctx->extradata[i + 2] && avctx->extradata[i + 3] == 1) { nals[avctx->extradata[i + 4] & 0x1f]++; } } if (nals[NAL_SPS] && nals[NAL_PPS]) break; } else { if (avctx->extradata_size > 0) break; } } } return 0; fail: return ret; }


static int check_pkt(AVFormatContext *s, AVPacket *pkt) { MOVMuxContext *mov = s->priv_data; MOVTrack *trk = &mov->tracks[pkt->stream_index]; int64_t ref; uint64_t duration; if (trk->entry) { ref = trk->cluster[trk->entry - 1].dts; } else if ( trk->start_dts != AV_NOPTS_VALUE && !trk->frag_discont) { ref = trk->start_dts + trk->track_duration; } else ref = pkt->dts; // Skip tests for the first packet duration = pkt->dts - ref; if (pkt->dts < ref || duration >= INT_MAX) { av_log(s, AV_LOG_ERROR, "Application provided duration: %"PRId64" / timestamp: %"PRId64" is out of range for mov/mp4 format\n", duration, pkt->dts ); pkt->dts = ref + 1; pkt->pts = AV_NOPTS_VALUE; if (pkt->duration < 0 || pkt->duration > INT_MAX) { av_log(s, AV_LOG_ERROR, "Application provided duration: %"PRId64" is invalid\n", pkt->duration); return AVERROR(EINVAL); return 0;


static int vc9_init_common(VC9Context *v) { static int done = 0; int i; /* Set the bit planes */ v->mv_type_mb_plane = (struct BitPlane) { NULL, 0, 0, 0 }; v->direct_mb_plane = (struct BitPlane) { NULL, 0, 0, 0 }; v->skip_mb_plane = (struct BitPlane) { NULL, 0, 0, 0 }; #if HAS_ADVANCED_PROFILE v->ac_pred_plane = v->over_flags_plane = (struct BitPlane) { NULL, 0, 0, 0 }; v->hrd_rate = v->hrd_buffer = NULL; #endif /* VLC tables */ #if VLC_NORM6_METH0D == 1 # if 0 // spec -> actual tables converter for(i=0; i<64; i++){ int code= (vc9_norm6_spec[i][1] << vc9_norm6_spec[i][4]) + vc9_norm6_spec[i][3]; av_log(NULL, AV_LOG_DEBUG, "0x%03X, ", code); if(i%16==15) av_log(NULL, AV_LOG_DEBUG, "\n"); } for(i=0; i<64; i++){ int code= vc9_norm6_spec[i][2] + vc9_norm6_spec[i][4]; av_log(NULL, AV_LOG_DEBUG, "%2d, ", code); if(i%16==15) av_log(NULL, AV_LOG_DEBUG, "\n"); } # endif #endif if(!done) { done = 1; INIT_VLC(&vc9_bfraction_vlc, VC9_BFRACTION_VLC_BITS, 23, vc9_bfraction_bits, 1, 1, vc9_bfraction_codes, 1, 1, 1); INIT_VLC(&vc9_norm2_vlc, VC9_NORM2_VLC_BITS, 4, vc9_norm2_bits, 1, 1, vc9_norm2_codes, 1, 1, 1); #if VLC_NORM6_METH0D == 1 INIT_VLC(&vc9_norm6_vlc, VC9_NORM6_VLC_BITS, 64, vc9_norm6_bits, 1, 1, vc9_norm6_codes, 2, 2, 1); #endif #if VLC_NORM6_METH0D == 2 INIT_VLC(&vc9_norm6_first_vlc, VC9_NORM6_FIRST_BITS, 24, &vc9_norm6_first[0][1], 1, 1, &vc9_norm6_first[0][0], 1, 1, 1); INIT_VLC(&vc9_norm6_second_vlc, VC9_NORM6_SECOND_BITS, 22, &vc9_norm6_second[0][1], 1, 1, &vc9_norm6_second[0][0], 1, 1, 1); #endif INIT_VLC(&vc9_imode_vlc, VC9_IMODE_VLC_BITS, 7, vc9_imode_bits, 1, 1, vc9_imode_codes, 1, 1, 1); for (i=0; i<3; i++) { INIT_VLC(&vc9_ttmb_vlc[i], VC9_TTMB_VLC_BITS, 16, vc9_ttmb_bits[i], 1, 1, vc9_ttmb_codes[i], 2, 2, 1); } for(i=0; i<4; i++) { INIT_VLC(&vc9_4mv_block_pattern_vlc[i], VC9_4MV_BLOCK_PATTERN_VLC_BITS, 16, vc9_4mv_block_pattern_bits[i], 1, 1, vc9_4mv_block_pattern_codes[i], 1, 1, 1); INIT_VLC(&vc9_cbpcy_p_vlc[i], VC9_CBPCY_P_VLC_BITS, 64, vc9_cbpcy_p_bits[i], 1, 1, vc9_cbpcy_p_codes[i], 2, 2, 1); INIT_VLC(&vc9_mv_diff_vlc[i], VC9_MV_DIFF_VLC_BITS, 73, vc9_mv_diff_bits[i], 1, 1, vc9_mv_diff_codes[i], 2, 2, 1); } } /* Other defaults */ v->pq = -1; v->mvrange = 0; /* 7.1.1.18, p80 */ return 0; }


int av_packet_unpack_dictionary(const uint8_t *data, int size, AVDictionary **dict) { const uint8_t *end = data + size; int ret = 0; if (!dict || !data || !size) return ret; if (size && end[-1]) return AVERROR_INVALIDDATA; while (data < end) { const uint8_t *key = data; const uint8_t *val = data + strlen(key) + 1; if (val >= end) return AVERROR_INVALIDDATA; ret = av_dict_set(dict, key, val, 0); if (ret < 0) break; data = val + strlen(val) + 1; } return ret; }


void cpu_interrupt(CPUState *env, int mask) { #if !defined(USE_NPTL) TranslationBlock *tb; static spinlock_t interrupt_lock = SPIN_LOCK_UNLOCKED; #endif int old_mask; old_mask = env->interrupt_request; /* FIXME: This is probably not threadsafe. A different thread could be in the middle of a read-modify-write operation. */ env->interrupt_request |= mask; #if defined(USE_NPTL) /* FIXME: TB unchaining isn't SMP safe. For now just ignore the problem and hope the cpu will stop of its own accord. For userspace emulation this often isn't actually as bad as it sounds. Often signals are used primarily to interrupt blocking syscalls. */ #else if (use_icount) { env->icount_decr.u16.high = 0xffff; #ifndef CONFIG_USER_ONLY /* CPU_INTERRUPT_EXIT isn't a real interrupt. It just means an async event happened and we need to process it. */ if (!can_do_io(env) && (mask & ~(old_mask | CPU_INTERRUPT_EXIT)) != 0) { cpu_abort(env, "Raised interrupt while not in I/O function"); } #endif } else { tb = env->current_tb; /* if the cpu is currently executing code, we must unlink it and all the potentially executing TB */ if (tb && !testandset(&interrupt_lock)) { env->current_tb = NULL; tb_reset_jump_recursive(tb); resetlock(&interrupt_lock); } } #endif }


static always_inline int translate_one (DisasContext *ctx, uint32_t insn) { uint32_t palcode; int32_t disp21, disp16, disp12; uint16_t fn11, fn16; uint8_t opc, ra, rb, rc, sbz, fpfn, fn7, fn2, islit; uint8_t lit; int ret; /* Decode all instruction fields */ opc = insn >> 26; ra = (insn >> 21) & 0x1F; rb = (insn >> 16) & 0x1F; rc = insn & 0x1F; sbz = (insn >> 13) & 0x07; islit = (insn >> 12) & 1; if (rb == 31 && !islit) { islit = 1; lit = 0; } else lit = (insn >> 13) & 0xFF; palcode = insn & 0x03FFFFFF; disp21 = ((int32_t)((insn & 0x001FFFFF) << 11)) >> 11; disp16 = (int16_t)(insn & 0x0000FFFF); disp12 = (int32_t)((insn & 0x00000FFF) << 20) >> 20; fn16 = insn & 0x0000FFFF; fn11 = (insn >> 5) & 0x000007FF; fpfn = fn11 & 0x3F; fn7 = (insn >> 5) & 0x0000007F; fn2 = (insn >> 5) & 0x00000003; ret = 0; #if defined ALPHA_DEBUG_DISAS if (logfile != NULL) { fprintf(logfile, "opc %02x ra %d rb %d rc %d disp16 %04x\n", opc, ra, rb, rc, disp16); } #endif switch (opc) { case 0x00: /* CALL_PAL */ if (palcode >= 0x80 && palcode < 0xC0) { /* Unprivileged PAL call */ gen_excp(ctx, EXCP_CALL_PAL + ((palcode & 0x1F) << 6), 0); #if !defined (CONFIG_USER_ONLY) } else if (palcode < 0x40) { /* Privileged PAL code */ if (ctx->mem_idx & 1) goto invalid_opc; else gen_excp(ctx, EXCP_CALL_PALP + ((palcode & 0x1F) << 6), 0); #endif } else { /* Invalid PAL call */ goto invalid_opc; } ret = 3; break; case 0x01: /* OPC01 */ goto invalid_opc; case 0x02: /* OPC02 */ goto invalid_opc; case 0x03: /* OPC03 */ goto invalid_opc; case 0x04: /* OPC04 */ goto invalid_opc; case 0x05: /* OPC05 */ goto invalid_opc; case 0x06: /* OPC06 */ goto invalid_opc; case 0x07: /* OPC07 */ goto invalid_opc; case 0x08: /* LDA */ if (likely(ra != 31)) { if (rb != 31) tcg_gen_addi_i64(cpu_ir[ra], cpu_ir[rb], disp16); else tcg_gen_movi_i64(cpu_ir[ra], disp16); } break; case 0x09: /* LDAH */ if (likely(ra != 31)) { if (rb != 31) tcg_gen_addi_i64(cpu_ir[ra], cpu_ir[rb], disp16 << 16); else tcg_gen_movi_i64(cpu_ir[ra], disp16 << 16); } break; case 0x0A: /* LDBU */ if (!(ctx->amask & AMASK_BWX)) goto invalid_opc; gen_load_mem(ctx, &tcg_gen_qemu_ld8u, ra, rb, disp16, 0, 0); break; case 0x0B: /* LDQ_U */ gen_load_mem(ctx, &tcg_gen_qemu_ld64, ra, rb, disp16, 0, 1); break; case 0x0C: /* LDWU */ if (!(ctx->amask & AMASK_BWX)) goto invalid_opc; gen_load_mem(ctx, &tcg_gen_qemu_ld16u, ra, rb, disp16, 0, 1); break; case 0x0D: /* STW */ gen_store_mem(ctx, &tcg_gen_qemu_st16, ra, rb, disp16, 0, 0); break; case 0x0E: /* STB */ gen_store_mem(ctx, &tcg_gen_qemu_st8, ra, rb, disp16, 0, 0); break; case 0x0F: /* STQ_U */ gen_store_mem(ctx, &tcg_gen_qemu_st64, ra, rb, disp16, 0, 1); break; case 0x10: switch (fn7) { case 0x00: /* ADDL */ if (likely(rc != 31)) { if (ra != 31) { if (islit) { tcg_gen_addi_i64(cpu_ir[rc], cpu_ir[ra], lit); tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); } else { tcg_gen_add_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); } } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], lit); else tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x02: /* S4ADDL */ if (likely(rc != 31)) { if (ra != 31) { TCGv tmp = tcg_temp_new(TCG_TYPE_I64); tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); if (islit) tcg_gen_addi_i64(tmp, tmp, lit); else tcg_gen_add_i64(tmp, tmp, cpu_ir[rb]); tcg_gen_ext32s_i64(cpu_ir[rc], tmp); tcg_temp_free(tmp); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], lit); else tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x09: /* SUBL */ if (likely(rc != 31)) { if (ra != 31) { if (islit) tcg_gen_subi_i64(cpu_ir[rc], cpu_ir[ra], lit); else tcg_gen_sub_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], -lit); else { tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); } } break; case 0x0B: /* S4SUBL */ if (likely(rc != 31)) { if (ra != 31) { TCGv tmp = tcg_temp_new(TCG_TYPE_I64); tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); if (islit) tcg_gen_subi_i64(tmp, tmp, lit); else tcg_gen_sub_i64(tmp, tmp, cpu_ir[rb]); tcg_gen_ext32s_i64(cpu_ir[rc], tmp); tcg_temp_free(tmp); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], -lit); else { tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); } } } break; case 0x0F: /* CMPBGE */ gen_arith3(helper_cmpbge, ra, rb, rc, islit, lit); break; case 0x12: /* S8ADDL */ if (likely(rc != 31)) { if (ra != 31) { TCGv tmp = tcg_temp_new(TCG_TYPE_I64); tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); if (islit) tcg_gen_addi_i64(tmp, tmp, lit); else tcg_gen_add_i64(tmp, tmp, cpu_ir[rb]); tcg_gen_ext32s_i64(cpu_ir[rc], tmp); tcg_temp_free(tmp); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], lit); else tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x1B: /* S8SUBL */ if (likely(rc != 31)) { if (ra != 31) { TCGv tmp = tcg_temp_new(TCG_TYPE_I64); tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); if (islit) tcg_gen_subi_i64(tmp, tmp, lit); else tcg_gen_sub_i64(tmp, tmp, cpu_ir[rb]); tcg_gen_ext32s_i64(cpu_ir[rc], tmp); tcg_temp_free(tmp); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], -lit); else tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); } } } break; case 0x1D: /* CMPULT */ gen_cmp(TCG_COND_LTU, ra, rb, rc, islit, lit); break; case 0x20: /* ADDQ */ if (likely(rc != 31)) { if (ra != 31) { if (islit) tcg_gen_addi_i64(cpu_ir[rc], cpu_ir[ra], lit); else tcg_gen_add_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], lit); else tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x22: /* S4ADDQ */ if (likely(rc != 31)) { if (ra != 31) { TCGv tmp = tcg_temp_new(TCG_TYPE_I64); tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); if (islit) tcg_gen_addi_i64(cpu_ir[rc], tmp, lit); else tcg_gen_add_i64(cpu_ir[rc], tmp, cpu_ir[rb]); tcg_temp_free(tmp); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], lit); else tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x29: /* SUBQ */ if (likely(rc != 31)) { if (ra != 31) { if (islit) tcg_gen_subi_i64(cpu_ir[rc], cpu_ir[ra], lit); else tcg_gen_sub_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], -lit); else tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x2B: /* S4SUBQ */ if (likely(rc != 31)) { if (ra != 31) { TCGv tmp = tcg_temp_new(TCG_TYPE_I64); tcg_gen_shli_i64(tmp, cpu_ir[ra], 2); if (islit) tcg_gen_subi_i64(cpu_ir[rc], tmp, lit); else tcg_gen_sub_i64(cpu_ir[rc], tmp, cpu_ir[rb]); tcg_temp_free(tmp); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], -lit); else tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x2D: /* CMPEQ */ gen_cmp(TCG_COND_EQ, ra, rb, rc, islit, lit); break; case 0x32: /* S8ADDQ */ if (likely(rc != 31)) { if (ra != 31) { TCGv tmp = tcg_temp_new(TCG_TYPE_I64); tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); if (islit) tcg_gen_addi_i64(cpu_ir[rc], tmp, lit); else tcg_gen_add_i64(cpu_ir[rc], tmp, cpu_ir[rb]); tcg_temp_free(tmp); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], lit); else tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x3B: /* S8SUBQ */ if (likely(rc != 31)) { if (ra != 31) { TCGv tmp = tcg_temp_new(TCG_TYPE_I64); tcg_gen_shli_i64(tmp, cpu_ir[ra], 3); if (islit) tcg_gen_subi_i64(cpu_ir[rc], tmp, lit); else tcg_gen_sub_i64(cpu_ir[rc], tmp, cpu_ir[rb]); tcg_temp_free(tmp); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], -lit); else tcg_gen_neg_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x3D: /* CMPULE */ gen_cmp(TCG_COND_LEU, ra, rb, rc, islit, lit); break; case 0x40: /* ADDL/V */ gen_arith3(helper_addlv, ra, rb, rc, islit, lit); break; case 0x49: /* SUBL/V */ gen_arith3(helper_sublv, ra, rb, rc, islit, lit); break; case 0x4D: /* CMPLT */ gen_cmp(TCG_COND_LT, ra, rb, rc, islit, lit); break; case 0x60: /* ADDQ/V */ gen_arith3(helper_addqv, ra, rb, rc, islit, lit); break; case 0x69: /* SUBQ/V */ gen_arith3(helper_subqv, ra, rb, rc, islit, lit); break; case 0x6D: /* CMPLE */ gen_cmp(TCG_COND_LE, ra, rb, rc, islit, lit); break; default: goto invalid_opc; } break; case 0x11: switch (fn7) { case 0x00: /* AND */ if (likely(rc != 31)) { if (ra == 31) tcg_gen_movi_i64(cpu_ir[rc], 0); else if (islit) tcg_gen_andi_i64(cpu_ir[rc], cpu_ir[ra], lit); else tcg_gen_and_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); } break; case 0x08: /* BIC */ if (likely(rc != 31)) { if (ra != 31) { if (islit) tcg_gen_andi_i64(cpu_ir[rc], cpu_ir[ra], ~lit); else tcg_gen_andc_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); } else tcg_gen_movi_i64(cpu_ir[rc], 0); } break; case 0x14: /* CMOVLBS */ gen_cmov(TCG_COND_EQ, ra, rb, rc, islit, lit, 1); break; case 0x16: /* CMOVLBC */ gen_cmov(TCG_COND_NE, ra, rb, rc, islit, lit, 1); break; case 0x20: /* BIS */ if (likely(rc != 31)) { if (ra != 31) { if (islit) tcg_gen_ori_i64(cpu_ir[rc], cpu_ir[ra], lit); else tcg_gen_or_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], lit); else tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x24: /* CMOVEQ */ gen_cmov(TCG_COND_NE, ra, rb, rc, islit, lit, 0); break; case 0x26: /* CMOVNE */ gen_cmov(TCG_COND_EQ, ra, rb, rc, islit, lit, 0); break; case 0x28: /* ORNOT */ if (likely(rc != 31)) { if (ra != 31) { if (islit) tcg_gen_ori_i64(cpu_ir[rc], cpu_ir[ra], ~lit); else tcg_gen_orc_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], ~lit); else tcg_gen_not_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x40: /* XOR */ if (likely(rc != 31)) { if (ra != 31) { if (islit) tcg_gen_xori_i64(cpu_ir[rc], cpu_ir[ra], lit); else tcg_gen_xor_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], lit); else tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x44: /* CMOVLT */ gen_cmov(TCG_COND_GE, ra, rb, rc, islit, lit, 0); break; case 0x46: /* CMOVGE */ gen_cmov(TCG_COND_LT, ra, rb, rc, islit, lit, 0); break; case 0x48: /* EQV */ if (likely(rc != 31)) { if (ra != 31) { if (islit) tcg_gen_xori_i64(cpu_ir[rc], cpu_ir[ra], ~lit); else tcg_gen_eqv_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); } else { if (islit) tcg_gen_movi_i64(cpu_ir[rc], ~lit); else tcg_gen_not_i64(cpu_ir[rc], cpu_ir[rb]); } } break; case 0x61: /* AMASK */ if (likely(rc != 31)) { if (islit) tcg_gen_movi_i64(cpu_ir[rc], helper_amask(lit)); else tcg_gen_helper_1_1(helper_amask, cpu_ir[rc], cpu_ir[rb]); } break; case 0x64: /* CMOVLE */ gen_cmov(TCG_COND_GT, ra, rb, rc, islit, lit, 0); break; case 0x66: /* CMOVGT */ gen_cmov(TCG_COND_LE, ra, rb, rc, islit, lit, 0); break; case 0x6C: /* IMPLVER */ if (rc != 31) tcg_gen_helper_1_0(helper_load_implver, cpu_ir[rc]); break; default: goto invalid_opc; } break; case 0x12: switch (fn7) { case 0x02: /* MSKBL */ gen_arith3(helper_mskbl, ra, rb, rc, islit, lit); break; case 0x06: /* EXTBL */ gen_ext_l(&tcg_gen_ext8u_i64, ra, rb, rc, islit, lit); break; case 0x0B: /* INSBL */ gen_arith3(helper_insbl, ra, rb, rc, islit, lit); break; case 0x12: /* MSKWL */ gen_arith3(helper_mskwl, ra, rb, rc, islit, lit); break; case 0x16: /* EXTWL */ gen_ext_l(&tcg_gen_ext16u_i64, ra, rb, rc, islit, lit); break; case 0x1B: /* INSWL */ gen_arith3(helper_inswl, ra, rb, rc, islit, lit); break; case 0x22: /* MSKLL */ gen_arith3(helper_mskll, ra, rb, rc, islit, lit); break; case 0x26: /* EXTLL */ gen_ext_l(&tcg_gen_ext32u_i64, ra, rb, rc, islit, lit); break; case 0x2B: /* INSLL */ gen_arith3(helper_insll, ra, rb, rc, islit, lit); break; case 0x30: /* ZAP */ gen_arith3(helper_zap, ra, rb, rc, islit, lit); break; case 0x31: /* ZAPNOT */ gen_arith3(helper_zapnot, ra, rb, rc, islit, lit); break; case 0x32: /* MSKQL */ gen_arith3(helper_mskql, ra, rb, rc, islit, lit); break; case 0x34: /* SRL */ if (likely(rc != 31)) { if (ra != 31) { if (islit) tcg_gen_shri_i64(cpu_ir[rc], cpu_ir[ra], lit & 0x3f); else { TCGv shift = tcg_temp_new(TCG_TYPE_I64); tcg_gen_andi_i64(shift, cpu_ir[rb], 0x3f); tcg_gen_shr_i64(cpu_ir[rc], cpu_ir[ra], shift); tcg_temp_free(shift); } } else tcg_gen_movi_i64(cpu_ir[rc], 0); } break; case 0x36: /* EXTQL */ gen_ext_l(NULL, ra, rb, rc, islit, lit); break; case 0x39: /* SLL */ if (likely(rc != 31)) { if (ra != 31) { if (islit) tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], lit & 0x3f); else { TCGv shift = tcg_temp_new(TCG_TYPE_I64); tcg_gen_andi_i64(shift, cpu_ir[rb], 0x3f); tcg_gen_shl_i64(cpu_ir[rc], cpu_ir[ra], shift); tcg_temp_free(shift); } } else tcg_gen_movi_i64(cpu_ir[rc], 0); } break; case 0x3B: /* INSQL */ gen_arith3(helper_insql, ra, rb, rc, islit, lit); break; case 0x3C: /* SRA */ if (likely(rc != 31)) { if (ra != 31) { if (islit) tcg_gen_sari_i64(cpu_ir[rc], cpu_ir[ra], lit & 0x3f); else { TCGv shift = tcg_temp_new(TCG_TYPE_I64); tcg_gen_andi_i64(shift, cpu_ir[rb], 0x3f); tcg_gen_sar_i64(cpu_ir[rc], cpu_ir[ra], shift); tcg_temp_free(shift); } } else tcg_gen_movi_i64(cpu_ir[rc], 0); } break; case 0x52: /* MSKWH */ gen_arith3(helper_mskwh, ra, rb, rc, islit, lit); break; case 0x57: /* INSWH */ gen_arith3(helper_inswh, ra, rb, rc, islit, lit); break; case 0x5A: /* EXTWH */ gen_ext_h(&tcg_gen_ext16u_i64, ra, rb, rc, islit, lit); break; case 0x62: /* MSKLH */ gen_arith3(helper_msklh, ra, rb, rc, islit, lit); break; case 0x67: /* INSLH */ gen_arith3(helper_inslh, ra, rb, rc, islit, lit); break; case 0x6A: /* EXTLH */ gen_ext_h(&tcg_gen_ext16u_i64, ra, rb, rc, islit, lit); break; case 0x72: /* MSKQH */ gen_arith3(helper_mskqh, ra, rb, rc, islit, lit); break; case 0x77: /* INSQH */ gen_arith3(helper_insqh, ra, rb, rc, islit, lit); break; case 0x7A: /* EXTQH */ gen_ext_h(NULL, ra, rb, rc, islit, lit); break; default: goto invalid_opc; } break; case 0x13: switch (fn7) { case 0x00: /* MULL */ if (likely(rc != 31)) { if (ra == 31) tcg_gen_movi_i64(cpu_ir[rc], 0); else { if (islit) tcg_gen_muli_i64(cpu_ir[rc], cpu_ir[ra], lit); else tcg_gen_mul_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); tcg_gen_ext32s_i64(cpu_ir[rc], cpu_ir[rc]); } } break; case 0x20: /* MULQ */ if (likely(rc != 31)) { if (ra == 31) tcg_gen_movi_i64(cpu_ir[rc], 0); else if (islit) tcg_gen_muli_i64(cpu_ir[rc], cpu_ir[ra], lit); else tcg_gen_mul_i64(cpu_ir[rc], cpu_ir[ra], cpu_ir[rb]); } break; case 0x30: /* UMULH */ gen_arith3(helper_umulh, ra, rb, rc, islit, lit); break; case 0x40: /* MULL/V */ gen_arith3(helper_mullv, ra, rb, rc, islit, lit); break; case 0x60: /* MULQ/V */ gen_arith3(helper_mulqv, ra, rb, rc, islit, lit); break; default: goto invalid_opc; } break; case 0x14: switch (fpfn) { /* f11 & 0x3F */ case 0x04: /* ITOFS */ if (!(ctx->amask & AMASK_FIX)) goto invalid_opc; if (likely(rc != 31)) { if (ra != 31) { TCGv tmp = tcg_temp_new(TCG_TYPE_I32); tcg_gen_trunc_i64_i32(tmp, cpu_ir[ra]); tcg_gen_helper_1_1(helper_memory_to_s, cpu_fir[rc], tmp); tcg_temp_free(tmp); } else tcg_gen_movi_i64(cpu_fir[rc], 0); } break; case 0x0A: /* SQRTF */ if (!(ctx->amask & AMASK_FIX)) goto invalid_opc; gen_farith2(&helper_sqrtf, rb, rc); break; case 0x0B: /* SQRTS */ if (!(ctx->amask & AMASK_FIX)) goto invalid_opc; gen_farith2(&helper_sqrts, rb, rc); break; case 0x14: /* ITOFF */ if (!(ctx->amask & AMASK_FIX)) goto invalid_opc; if (likely(rc != 31)) { if (ra != 31) { TCGv tmp = tcg_temp_new(TCG_TYPE_I32); tcg_gen_trunc_i64_i32(tmp, cpu_ir[ra]); tcg_gen_helper_1_1(helper_memory_to_f, cpu_fir[rc], tmp); tcg_temp_free(tmp); } else tcg_gen_movi_i64(cpu_fir[rc], 0); } break; case 0x24: /* ITOFT */ if (!(ctx->amask & AMASK_FIX)) goto invalid_opc; if (likely(rc != 31)) { if (ra != 31) tcg_gen_mov_i64(cpu_fir[rc], cpu_ir[ra]); else tcg_gen_movi_i64(cpu_fir[rc], 0); } break; case 0x2A: /* SQRTG */ if (!(ctx->amask & AMASK_FIX)) goto invalid_opc; gen_farith2(&helper_sqrtg, rb, rc); break; case 0x02B: /* SQRTT */ if (!(ctx->amask & AMASK_FIX)) goto invalid_opc; gen_farith2(&helper_sqrtt, rb, rc); break; default: goto invalid_opc; } break; case 0x15: /* VAX floating point */ /* XXX: rounding mode and trap are ignored (!) */ switch (fpfn) { /* f11 & 0x3F */ case 0x00: /* ADDF */ gen_farith3(&helper_addf, ra, rb, rc); break; case 0x01: /* SUBF */ gen_farith3(&helper_subf, ra, rb, rc); break; case 0x02: /* MULF */ gen_farith3(&helper_mulf, ra, rb, rc); break; case 0x03: /* DIVF */ gen_farith3(&helper_divf, ra, rb, rc); break; case 0x1E: /* CVTDG */ #if 0 // TODO gen_farith2(&helper_cvtdg, rb, rc); #else goto invalid_opc; #endif break; case 0x20: /* ADDG */ gen_farith3(&helper_addg, ra, rb, rc); break; case 0x21: /* SUBG */ gen_farith3(&helper_subg, ra, rb, rc); break; case 0x22: /* MULG */ gen_farith3(&helper_mulg, ra, rb, rc); break; case 0x23: /* DIVG */ gen_farith3(&helper_divg, ra, rb, rc); break; case 0x25: /* CMPGEQ */ gen_farith3(&helper_cmpgeq, ra, rb, rc); break; case 0x26: /* CMPGLT */ gen_farith3(&helper_cmpglt, ra, rb, rc); break; case 0x27: /* CMPGLE */ gen_farith3(&helper_cmpgle, ra, rb, rc); break; case 0x2C: /* CVTGF */ gen_farith2(&helper_cvtgf, rb, rc); break; case 0x2D: /* CVTGD */ #if 0 // TODO gen_farith2(ctx, &helper_cvtgd, rb, rc); #else goto invalid_opc; #endif break; case 0x2F: /* CVTGQ */ gen_farith2(&helper_cvtgq, rb, rc); break; case 0x3C: /* CVTQF */ gen_farith2(&helper_cvtqf, rb, rc); break; case 0x3E: /* CVTQG */ gen_farith2(&helper_cvtqg, rb, rc); break; default: goto invalid_opc; } break; case 0x16: /* IEEE floating-point */ /* XXX: rounding mode and traps are ignored (!) */ switch (fpfn) { /* f11 & 0x3F */ case 0x00: /* ADDS */ gen_farith3(&helper_adds, ra, rb, rc); break; case 0x01: /* SUBS */ gen_farith3(&helper_subs, ra, rb, rc); break; case 0x02: /* MULS */ gen_farith3(&helper_muls, ra, rb, rc); break; case 0x03: /* DIVS */ gen_farith3(&helper_divs, ra, rb, rc); break; case 0x20: /* ADDT */ gen_farith3(&helper_addt, ra, rb, rc); break; case 0x21: /* SUBT */ gen_farith3(&helper_subt, ra, rb, rc); break; case 0x22: /* MULT */ gen_farith3(&helper_mult, ra, rb, rc); break; case 0x23: /* DIVT */ gen_farith3(&helper_divt, ra, rb, rc); break; case 0x24: /* CMPTUN */ gen_farith3(&helper_cmptun, ra, rb, rc); break; case 0x25: /* CMPTEQ */ gen_farith3(&helper_cmpteq, ra, rb, rc); break; case 0x26: /* CMPTLT */ gen_farith3(&helper_cmptlt, ra, rb, rc); break; case 0x27: /* CMPTLE */ gen_farith3(&helper_cmptle, ra, rb, rc); break; case 0x2C: /* XXX: incorrect */ if (fn11 == 0x2AC) { /* CVTST */ gen_farith2(&helper_cvtst, rb, rc); } else { /* CVTTS */ gen_farith2(&helper_cvtts, rb, rc); } break; case 0x2F: /* CVTTQ */ gen_farith2(&helper_cvttq, rb, rc); break; case 0x3C: /* CVTQS */ gen_farith2(&helper_cvtqs, rb, rc); break; case 0x3E: /* CVTQT */ gen_farith2(&helper_cvtqt, rb, rc); break; default: goto invalid_opc; } break; case 0x17: switch (fn11) { case 0x010: /* CVTLQ */ gen_farith2(&helper_cvtlq, rb, rc); break; case 0x020: if (likely(rc != 31)) { if (ra == rb) /* FMOV */ tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]); else /* CPYS */ gen_farith3(&helper_cpys, ra, rb, rc); } break; case 0x021: /* CPYSN */ gen_farith3(&helper_cpysn, ra, rb, rc); break; case 0x022: /* CPYSE */ gen_farith3(&helper_cpyse, ra, rb, rc); break; case 0x024: /* MT_FPCR */ if (likely(ra != 31)) tcg_gen_helper_0_1(helper_store_fpcr, cpu_fir[ra]); else { TCGv tmp = tcg_const_i64(0); tcg_gen_helper_0_1(helper_store_fpcr, tmp); tcg_temp_free(tmp); } break; case 0x025: /* MF_FPCR */ if (likely(ra != 31)) tcg_gen_helper_1_0(helper_load_fpcr, cpu_fir[ra]); break; case 0x02A: /* FCMOVEQ */ gen_fcmov(&helper_cmpfeq, ra, rb, rc); break; case 0x02B: /* FCMOVNE */ gen_fcmov(&helper_cmpfne, ra, rb, rc); break; case 0x02C: /* FCMOVLT */ gen_fcmov(&helper_cmpflt, ra, rb, rc); break; case 0x02D: /* FCMOVGE */ gen_fcmov(&helper_cmpfge, ra, rb, rc); break; case 0x02E: /* FCMOVLE */ gen_fcmov(&helper_cmpfle, ra, rb, rc); break; case 0x02F: /* FCMOVGT */ gen_fcmov(&helper_cmpfgt, ra, rb, rc); break; case 0x030: /* CVTQL */ gen_farith2(&helper_cvtql, rb, rc); break; case 0x130: /* CVTQL/V */ gen_farith2(&helper_cvtqlv, rb, rc); break; case 0x530: /* CVTQL/SV */ gen_farith2(&helper_cvtqlsv, rb, rc); break; default: goto invalid_opc; } break; case 0x18: switch ((uint16_t)disp16) { case 0x0000: /* TRAPB */ /* No-op. Just exit from the current tb */ ret = 2; break; case 0x0400: /* EXCB */ /* No-op. Just exit from the current tb */ ret = 2; break; case 0x4000: /* MB */ /* No-op */ break; case 0x4400: /* WMB */ /* No-op */ break; case 0x8000: /* FETCH */ /* No-op */ break; case 0xA000: /* FETCH_M */ /* No-op */ break; case 0xC000: /* RPCC */ if (ra != 31) tcg_gen_helper_1_0(helper_load_pcc, cpu_ir[ra]); break; case 0xE000: /* RC */ if (ra != 31) tcg_gen_helper_1_0(helper_rc, cpu_ir[ra]); break; case 0xE800: /* ECB */ /* XXX: TODO: evict tb cache at address rb */ #if 0 ret = 2; #else goto invalid_opc; #endif break; case 0xF000: /* RS */ if (ra != 31) tcg_gen_helper_1_0(helper_rs, cpu_ir[ra]); break; case 0xF800: /* WH64 */ /* No-op */ break; default: goto invalid_opc; } break; case 0x19: /* HW_MFPR (PALcode) */ #if defined (CONFIG_USER_ONLY) goto invalid_opc; #else if (!ctx->pal_mode) goto invalid_opc; if (ra != 31) { TCGv tmp = tcg_const_i32(insn & 0xFF); tcg_gen_helper_1_2(helper_mfpr, cpu_ir[ra], tmp, cpu_ir[ra]); tcg_temp_free(tmp); } break; #endif case 0x1A: if (ra != 31) tcg_gen_movi_i64(cpu_ir[ra], ctx->pc); if (rb != 31) tcg_gen_andi_i64(cpu_pc, cpu_ir[rb], ~3); else tcg_gen_movi_i64(cpu_pc, 0); /* Those four jumps only differ by the branch prediction hint */ switch (fn2) { case 0x0: /* JMP */ break; case 0x1: /* JSR */ break; case 0x2: /* RET */ break; case 0x3: /* JSR_COROUTINE */ break; } ret = 1; break; case 0x1B: /* HW_LD (PALcode) */ #if defined (CONFIG_USER_ONLY) goto invalid_opc; #else if (!ctx->pal_mode) goto invalid_opc; if (ra != 31) { TCGv addr = tcg_temp_new(TCG_TYPE_I64); if (rb != 31) tcg_gen_addi_i64(addr, cpu_ir[rb], disp12); else tcg_gen_movi_i64(addr, disp12); switch ((insn >> 12) & 0xF) { case 0x0: /* Longword physical access */ tcg_gen_helper_0_2(helper_ldl_raw, cpu_ir[ra], addr); break; case 0x1: /* Quadword physical access */ tcg_gen_helper_0_2(helper_ldq_raw, cpu_ir[ra], addr); break; case 0x2: /* Longword physical access with lock */ tcg_gen_helper_0_2(helper_ldl_l_raw, cpu_ir[ra], addr); break; case 0x3: /* Quadword physical access with lock */ tcg_gen_helper_0_2(helper_ldq_l_raw, cpu_ir[ra], addr); break; case 0x4: /* Longword virtual PTE fetch */ tcg_gen_helper_0_2(helper_ldl_kernel, cpu_ir[ra], addr); break; case 0x5: /* Quadword virtual PTE fetch */ tcg_gen_helper_0_2(helper_ldq_kernel, cpu_ir[ra], addr); break; case 0x6: /* Incpu_ir[ra]id */ goto incpu_ir[ra]id_opc; case 0x7: /* Incpu_ir[ra]id */ goto incpu_ir[ra]id_opc; case 0x8: /* Longword virtual access */ tcg_gen_helper_1_1(helper_st_virt_to_phys, addr, addr); tcg_gen_helper_0_2(helper_ldl_raw, cpu_ir[ra], addr); break; case 0x9: /* Quadword virtual access */ tcg_gen_helper_1_1(helper_st_virt_to_phys, addr, addr); tcg_gen_helper_0_2(helper_ldq_raw, cpu_ir[ra], addr); break; case 0xA: /* Longword virtual access with protection check */ tcg_gen_qemu_ld32s(cpu_ir[ra], addr, ctx->flags); break; case 0xB: /* Quadword virtual access with protection check */ tcg_gen_qemu_ld64(cpu_ir[ra], addr, ctx->flags); break; case 0xC: /* Longword virtual access with altenate access mode */ tcg_gen_helper_0_0(helper_set_alt_mode); tcg_gen_helper_1_1(helper_st_virt_to_phys, addr, addr); tcg_gen_helper_0_2(helper_ldl_raw, cpu_ir[ra], addr); tcg_gen_helper_0_0(helper_restore_mode); break; case 0xD: /* Quadword virtual access with altenate access mode */ tcg_gen_helper_0_0(helper_set_alt_mode); tcg_gen_helper_1_1(helper_st_virt_to_phys, addr, addr); tcg_gen_helper_0_2(helper_ldq_raw, cpu_ir[ra], addr); tcg_gen_helper_0_0(helper_restore_mode); break; case 0xE: /* Longword virtual access with alternate access mode and * protection checks */ tcg_gen_helper_0_0(helper_set_alt_mode); tcg_gen_helper_0_2(helper_ldl_data, cpu_ir[ra], addr); tcg_gen_helper_0_0(helper_restore_mode); break; case 0xF: /* Quadword virtual access with alternate access mode and * protection checks */ tcg_gen_helper_0_0(helper_set_alt_mode); tcg_gen_helper_0_2(helper_ldq_data, cpu_ir[ra], addr); tcg_gen_helper_0_0(helper_restore_mode); break; } tcg_temp_free(addr); } break; #endif case 0x1C: switch (fn7) { case 0x00: /* SEXTB */ if (!(ctx->amask & AMASK_BWX)) goto invalid_opc; if (likely(rc != 31)) { if (islit) tcg_gen_movi_i64(cpu_ir[rc], (int64_t)((int8_t)lit)); else tcg_gen_ext8s_i64(cpu_ir[rc], cpu_ir[rb]); } break; case 0x01: /* SEXTW */ if (!(ctx->amask & AMASK_BWX)) goto invalid_opc; if (likely(rc != 31)) { if (islit) tcg_gen_movi_i64(cpu_ir[rc], (int64_t)((int16_t)lit)); else tcg_gen_ext16s_i64(cpu_ir[rc], cpu_ir[rb]); } break; case 0x30: /* CTPOP */ if (!(ctx->amask & AMASK_CIX)) goto invalid_opc; if (likely(rc != 31)) { if (islit) tcg_gen_movi_i64(cpu_ir[rc], ctpop64(lit)); else tcg_gen_helper_1_1(helper_ctpop, cpu_ir[rc], cpu_ir[rb]); } break; case 0x31: /* PERR */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x32: /* CTLZ */ if (!(ctx->amask & AMASK_CIX)) goto invalid_opc; if (likely(rc != 31)) { if (islit) tcg_gen_movi_i64(cpu_ir[rc], clz64(lit)); else tcg_gen_helper_1_1(helper_ctlz, cpu_ir[rc], cpu_ir[rb]); } break; case 0x33: /* CTTZ */ if (!(ctx->amask & AMASK_CIX)) goto invalid_opc; if (likely(rc != 31)) { if (islit) tcg_gen_movi_i64(cpu_ir[rc], ctz64(lit)); else tcg_gen_helper_1_1(helper_cttz, cpu_ir[rc], cpu_ir[rb]); } break; case 0x34: /* UNPKBW */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x35: /* UNPKWL */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x36: /* PKWB */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x37: /* PKLB */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x38: /* MINSB8 */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x39: /* MINSW4 */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x3A: /* MINUB8 */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x3B: /* MINUW4 */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x3C: /* MAXUB8 */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x3D: /* MAXUW4 */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x3E: /* MAXSB8 */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x3F: /* MAXSW4 */ if (!(ctx->amask & AMASK_MVI)) goto invalid_opc; /* XXX: TODO */ goto invalid_opc; break; case 0x70: /* FTOIT */ if (!(ctx->amask & AMASK_FIX)) goto invalid_opc; if (likely(rc != 31)) { if (ra != 31) tcg_gen_mov_i64(cpu_ir[rc], cpu_fir[ra]); else tcg_gen_movi_i64(cpu_ir[rc], 0); } break; case 0x78: /* FTOIS */ if (!(ctx->amask & AMASK_FIX)) goto invalid_opc; if (rc != 31) { TCGv tmp1 = tcg_temp_new(TCG_TYPE_I32); if (ra != 31) tcg_gen_helper_1_1(helper_s_to_memory, tmp1, cpu_fir[ra]); else { TCGv tmp2 = tcg_const_i64(0); tcg_gen_helper_1_1(helper_s_to_memory, tmp1, tmp2); tcg_temp_free(tmp2); } tcg_gen_ext_i32_i64(cpu_ir[rc], tmp1); tcg_temp_free(tmp1); } break; default: goto invalid_opc; } break; case 0x1D: /* HW_MTPR (PALcode) */ #if defined (CONFIG_USER_ONLY) goto invalid_opc; #else if (!ctx->pal_mode) goto invalid_opc; else { TCGv tmp1 = tcg_const_i32(insn & 0xFF); if (ra != 31) tcg_gen_helper(helper_mtpr, tmp1, cpu_ir[ra]); else { TCGv tmp2 = tcg_const_i64(0); tcg_gen_helper(helper_mtpr, tmp1, tmp2); tcg_temp_free(tmp2); } tcg_temp_free(tmp1); ret = 2; } break; #endif case 0x1E: /* HW_REI (PALcode) */ #if defined (CONFIG_USER_ONLY) goto invalid_opc; #else if (!ctx->pal_mode) goto invalid_opc; if (rb == 31) { /* "Old" alpha */ tcg_gen_helper_0_0(helper_hw_rei); } else { TCGv tmp; if (ra != 31) { tmp = tcg_temp_new(TCG_TYPE_I64); tcg_gen_addi_i64(tmp, cpu_ir[rb], (((int64_t)insn << 51) >> 51)); } else tmp = tcg_const_i64(((int64_t)insn << 51) >> 51); tcg_gen_helper_0_1(helper_hw_ret, tmp); tcg_temp_free(tmp); } ret = 2; break; #endif case 0x1F: /* HW_ST (PALcode) */ #if defined (CONFIG_USER_ONLY) goto invalid_opc; #else if (!ctx->pal_mode) goto invalid_opc; else { TCGv addr, val; addr = tcg_temp_new(TCG_TYPE_I64); if (rb != 31) tcg_gen_addi_i64(addr, cpu_ir[rb], disp12); else tcg_gen_movi_i64(addr, disp12); if (ra != 31) val = cpu_ir[ra]; else { val = tcg_temp_new(TCG_TYPE_I64); tcg_gen_movi_i64(val, 0); } switch ((insn >> 12) & 0xF) { case 0x0: /* Longword physical access */ tcg_gen_helper_0_2(helper_stl_raw, val, addr); break; case 0x1: /* Quadword physical access */ tcg_gen_helper_0_2(helper_stq_raw, val, addr); break; case 0x2: /* Longword physical access with lock */ tcg_gen_helper_1_2(helper_stl_c_raw, val, val, addr); break; case 0x3: /* Quadword physical access with lock */ tcg_gen_helper_1_2(helper_stq_c_raw, val, val, addr); break; case 0x4: /* Longword virtual access */ tcg_gen_helper_1_1(helper_st_virt_to_phys, addr, addr); tcg_gen_helper_0_2(helper_stl_raw, val, addr); break; case 0x5: /* Quadword virtual access */ tcg_gen_helper_1_1(helper_st_virt_to_phys, addr, addr); tcg_gen_helper_0_2(helper_stq_raw, val, addr); break; case 0x6: /* Invalid */ goto invalid_opc; case 0x7: /* Invalid */ goto invalid_opc; case 0x8: /* Invalid */ goto invalid_opc; case 0x9: /* Invalid */ goto invalid_opc; case 0xA: /* Invalid */ goto invalid_opc; case 0xB: /* Invalid */ goto invalid_opc; case 0xC: /* Longword virtual access with alternate access mode */ tcg_gen_helper_0_0(helper_set_alt_mode); tcg_gen_helper_1_1(helper_st_virt_to_phys, addr, addr); tcg_gen_helper_0_2(helper_stl_raw, val, addr); tcg_gen_helper_0_0(helper_restore_mode); break; case 0xD: /* Quadword virtual access with alternate access mode */ tcg_gen_helper_0_0(helper_set_alt_mode); tcg_gen_helper_1_1(helper_st_virt_to_phys, addr, addr); tcg_gen_helper_0_2(helper_stl_raw, val, addr); tcg_gen_helper_0_0(helper_restore_mode); break; case 0xE: /* Invalid */ goto invalid_opc; case 0xF: /* Invalid */ goto invalid_opc; } if (ra != 31) tcg_temp_free(val); tcg_temp_free(addr); } ret = 2; break; #endif case 0x20: /* LDF */ gen_load_mem(ctx, &gen_qemu_ldf, ra, rb, disp16, 1, 0); break; case 0x21: /* LDG */ gen_load_mem(ctx, &gen_qemu_ldg, ra, rb, disp16, 1, 0); break; case 0x22: /* LDS */ gen_load_mem(ctx, &gen_qemu_lds, ra, rb, disp16, 1, 0); break; case 0x23: /* LDT */ gen_load_mem(ctx, &tcg_gen_qemu_ld64, ra, rb, disp16, 1, 0); break; case 0x24: /* STF */ gen_store_mem(ctx, &gen_qemu_stf, ra, rb, disp16, 1, 0); break; case 0x25: /* STG */ gen_store_mem(ctx, &gen_qemu_stg, ra, rb, disp16, 1, 0); break; case 0x26: /* STS */ gen_store_mem(ctx, &gen_qemu_sts, ra, rb, disp16, 1, 0); break; case 0x27: /* STT */ gen_store_mem(ctx, &tcg_gen_qemu_st64, ra, rb, disp16, 1, 0); break; case 0x28: /* LDL */ gen_load_mem(ctx, &tcg_gen_qemu_ld32s, ra, rb, disp16, 0, 0); break; case 0x29: /* LDQ */ gen_load_mem(ctx, &tcg_gen_qemu_ld64, ra, rb, disp16, 0, 0); break; case 0x2A: /* LDL_L */ gen_load_mem(ctx, &gen_qemu_ldl_l, ra, rb, disp16, 0, 0); break; case 0x2B: /* LDQ_L */ gen_load_mem(ctx, &gen_qemu_ldq_l, ra, rb, disp16, 0, 0); break; case 0x2C: /* STL */ gen_store_mem(ctx, &tcg_gen_qemu_st32, ra, rb, disp16, 0, 0); break; case 0x2D: /* STQ */ gen_store_mem(ctx, &tcg_gen_qemu_st64, ra, rb, disp16, 0, 0); break; case 0x2E: /* STL_C */ gen_store_mem(ctx, &gen_qemu_stl_c, ra, rb, disp16, 0, 0); break; case 0x2F: /* STQ_C */ gen_store_mem(ctx, &gen_qemu_stq_c, ra, rb, disp16, 0, 0); break; case 0x30: /* BR */ if (ra != 31) tcg_gen_movi_i64(cpu_ir[ra], ctx->pc); tcg_gen_movi_i64(cpu_pc, ctx->pc + (int64_t)(disp21 << 2)); ret = 1; break; case 0x31: /* FBEQ */ gen_fbcond(ctx, &helper_cmpfeq, ra, disp16); ret = 1; break; case 0x32: /* FBLT */ gen_fbcond(ctx, &helper_cmpflt, ra, disp16); ret = 1; break; case 0x33: /* FBLE */ gen_fbcond(ctx, &helper_cmpfle, ra, disp16); ret = 1; break; case 0x34: /* BSR */ if (ra != 31) tcg_gen_movi_i64(cpu_ir[ra], ctx->pc); tcg_gen_movi_i64(cpu_pc, ctx->pc + (int64_t)(disp21 << 2)); ret = 1; break; case 0x35: /* FBNE */ gen_fbcond(ctx, &helper_cmpfne, ra, disp16); ret = 1; break; case 0x36: /* FBGE */ gen_fbcond(ctx, &helper_cmpfge, ra, disp16); ret = 1; break; case 0x37: /* FBGT */ gen_fbcond(ctx, &helper_cmpfgt, ra, disp16); ret = 1; break; case 0x38: /* BLBC */ gen_bcond(ctx, TCG_COND_EQ, ra, disp16, 1); ret = 1; break; case 0x39: /* BEQ */ gen_bcond(ctx, TCG_COND_EQ, ra, disp16, 0); ret = 1; break; case 0x3A: /* BLT */ gen_bcond(ctx, TCG_COND_LT, ra, disp16, 0); ret = 1; break; case 0x3B: /* BLE */ gen_bcond(ctx, TCG_COND_LE, ra, disp16, 0); ret = 1; break; case 0x3C: /* BLBS */ gen_bcond(ctx, TCG_COND_NE, ra, disp16, 1); ret = 1; break; case 0x3D: /* BNE */ gen_bcond(ctx, TCG_COND_NE, ra, disp16, 0); ret = 1; break; case 0x3E: /* BGE */ gen_bcond(ctx, TCG_COND_GE, ra, disp16, 0); ret = 1; break; case 0x3F: /* BGT */ gen_bcond(ctx, TCG_COND_GT, ra, disp16, 0); ret = 1; break; invalid_opc: gen_invalid(ctx); ret = 3; break; } return ret; }


void ff_aac_search_for_is(AACEncContext *s, AVCodecContext *avctx, ChannelElement *cpe) { SingleChannelElement *sce0 = &cpe->ch[0]; SingleChannelElement *sce1 = &cpe->ch[1]; int start = 0, count = 0, w, w2, g, i; const float freq_mult = avctx->sample_rate/(1024.0f/sce0->ics.num_windows)/2.0f; if (!cpe->common_window) return; for (w = 0; w < sce0->ics.num_windows; w += sce0->ics.group_len[w]) { start = 0; for (g = 0; g < sce0->ics.num_swb; g++) { if (start*freq_mult > INT_STEREO_LOW_LIMIT*(s->lambda/170.0f) && cpe->ch[0].band_type[w*16+g] != NOISE_BT && !cpe->ch[0].zeroes[w*16+g] && cpe->ch[1].band_type[w*16+g] != NOISE_BT && !cpe->ch[1].zeroes[w*16+g]) { float ener0 = 0.0f, ener1 = 0.0f, ener01 = 0.0f; struct AACISError ph_err1, ph_err2, *erf; if (sce0->band_type[w*16+g] == NOISE_BT || sce1->band_type[w*16+g] == NOISE_BT) { start += sce0->ics.swb_sizes[g]; continue; } for (w2 = 0; w2 < sce0->ics.group_len[w]; w2++) { for (i = 0; i < sce0->ics.swb_sizes[g]; i++) { float coef0 = fabsf(sce0->pcoeffs[start+(w+w2)*128+i]); float coef1 = fabsf(sce1->pcoeffs[start+(w+w2)*128+i]); ener0 += coef0*coef0; ener1 += coef1*coef1; ener01 += (coef0 + coef1)*(coef0 + coef1); } } ph_err1 = ff_aac_is_encoding_err(s, cpe, start, w, g, ener0, ener1, ener01, 0, -1); ph_err2 = ff_aac_is_encoding_err(s, cpe, start, w, g, ener0, ener1, ener01, 0, +1); erf = ph_err1.error < ph_err2.error ? &ph_err1 : &ph_err2; if (erf->pass) { cpe->is_mask[w*16+g] = 1; cpe->ch[0].is_ener[w*16+g] = sqrt(ener0/ener01); cpe->ch[1].is_ener[w*16+g] = ener0/ener1; cpe->ch[1].band_type[w*16+g] = erf->phase ? INTENSITY_BT : INTENSITY_BT2; count++; } } start += sce0->ics.swb_sizes[g]; } } cpe->is_mode = !!count; }


static int yuv4_write_header(AVFormatContext *s) { int* first_pkt = s->priv_data; if (s->nb_streams != 1) return AVERROR(EIO); if (s->streams[0]->codec->pix_fmt == PIX_FMT_YUV411P) { av_log(s, AV_LOG_ERROR, "Warning: generating rarely used 4:1:1 YUV stream, some mjpegtools might not work.\n"); else if ((s->streams[0]->codec->pix_fmt != PIX_FMT_YUV420P) && (s->streams[0]->codec->pix_fmt != PIX_FMT_YUV422P) && (s->streams[0]->codec->pix_fmt != PIX_FMT_GRAY8) && (s->streams[0]->codec->pix_fmt != PIX_FMT_YUV444P)) { av_log(s, AV_LOG_ERROR, "ERROR: yuv4mpeg only handles yuv444p, yuv422p, yuv420p, yuv411p and gray pixel formats. Use -pix_fmt to select one.\n"); return AVERROR(EIO); *first_pkt = 1; return 0;


static void vmmouse_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = vmmouse_realizefn; dc->no_user = 1; dc->reset = vmmouse_reset; dc->vmsd = &vmstate_vmmouse; dc->props = vmmouse_properties; }


static inline void array_free(array_t* array) { if(array->pointer) free(array->pointer); array->size=array->next=0; }


int get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong eaddr, int rw, int access_type) { int ret; #if 0 qemu_log("%s\n", __func__); #endif if ((access_type == ACCESS_CODE && msr_ir == 0) || (access_type != ACCESS_CODE && msr_dr == 0)) { if (env->mmu_model == POWERPC_MMU_BOOKE) { /* The BookE MMU always performs address translation. The IS and DS bits only affect the address space. */ ret = mmubooke_get_physical_address(env, ctx, eaddr, rw, access_type); } else if (env->mmu_model == POWERPC_MMU_BOOKE206) { ret = mmubooke206_get_physical_address(env, ctx, eaddr, rw, access_type); } else { /* No address translation. */ ret = check_physical(env, ctx, eaddr, rw); } } else { ret = -1; switch (env->mmu_model) { case POWERPC_MMU_32B: case POWERPC_MMU_601: case POWERPC_MMU_SOFT_6xx: case POWERPC_MMU_SOFT_74xx: /* Try to find a BAT */ if (env->nb_BATs != 0) { ret = get_bat(env, ctx, eaddr, rw, access_type); } #if defined(TARGET_PPC64) case POWERPC_MMU_620: case POWERPC_MMU_64B: case POWERPC_MMU_2_06: #endif if (ret < 0) { /* We didn't match any BAT entry or don't have BATs */ ret = get_segment(env, ctx, eaddr, rw, access_type); } break; case POWERPC_MMU_SOFT_4xx: case POWERPC_MMU_SOFT_4xx_Z: ret = mmu40x_get_physical_address(env, ctx, eaddr, rw, access_type); break; case POWERPC_MMU_BOOKE: ret = mmubooke_get_physical_address(env, ctx, eaddr, rw, access_type); break; case POWERPC_MMU_BOOKE206: ret = mmubooke206_get_physical_address(env, ctx, eaddr, rw, access_type); break; case POWERPC_MMU_MPC8xx: /* XXX: TODO */ cpu_abort(env, "MPC8xx MMU model is not implemented\n"); break; case POWERPC_MMU_REAL: cpu_abort(env, "PowerPC in real mode do not do any translation\n"); return -1; default: cpu_abort(env, "Unknown or invalid MMU model\n"); return -1; } } #if 0 qemu_log("%s address " TARGET_FMT_lx " => %d " TARGET_FMT_plx "\n", __func__, eaddr, ret, ctx->raddr); #endif return ret; }


static int vaapi_mpeg4_start_frame(AVCodecContext *avctx, av_unused const uint8_t *buffer, av_unused uint32_t size) { Mpeg4DecContext *ctx = avctx->priv_data; MpegEncContext * const s = &ctx->m; struct vaapi_context * const vactx = avctx->hwaccel_context; VAPictureParameterBufferMPEG4 *pic_param; VAIQMatrixBufferMPEG4 *iq_matrix; int i; av_dlog(avctx, "vaapi_mpeg4_start_frame()\n"); vactx->slice_param_size = sizeof(VASliceParameterBufferMPEG4); /* Fill in VAPictureParameterBufferMPEG4 */ pic_param = ff_vaapi_alloc_pic_param(vactx, sizeof(VAPictureParameterBufferMPEG4)); if (!pic_param) return -1; pic_param->vop_width = s->width; pic_param->vop_height = s->height; pic_param->forward_reference_picture = VA_INVALID_ID; pic_param->backward_reference_picture = VA_INVALID_ID; pic_param->vol_fields.value = 0; /* reset all bits */ pic_param->vol_fields.bits.short_video_header = avctx->codec->id == AV_CODEC_ID_H263; pic_param->vol_fields.bits.chroma_format = CHROMA_420; pic_param->vol_fields.bits.interlaced = !s->progressive_sequence; pic_param->vol_fields.bits.obmc_disable = 1; pic_param->vol_fields.bits.sprite_enable = ctx->vol_sprite_usage; pic_param->vol_fields.bits.sprite_warping_accuracy = s->sprite_warping_accuracy; pic_param->vol_fields.bits.quant_type = s->mpeg_quant; pic_param->vol_fields.bits.quarter_sample = s->quarter_sample; pic_param->vol_fields.bits.data_partitioned = s->data_partitioning; pic_param->vol_fields.bits.reversible_vlc = ctx->rvlc; pic_param->vol_fields.bits.resync_marker_disable = !ctx->resync_marker; pic_param->no_of_sprite_warping_points = ctx->num_sprite_warping_points; for (i = 0; i < ctx->num_sprite_warping_points && i < 3; i++) { pic_param->sprite_trajectory_du[i] = ctx->sprite_traj[i][0]; pic_param->sprite_trajectory_dv[i] = ctx->sprite_traj[i][1]; } pic_param->quant_precision = s->quant_precision; pic_param->vop_fields.value = 0; /* reset all bits */ pic_param->vop_fields.bits.vop_coding_type = s->pict_type - AV_PICTURE_TYPE_I; pic_param->vop_fields.bits.backward_reference_vop_coding_type = s->pict_type == AV_PICTURE_TYPE_B ? s->next_picture.f.pict_type - AV_PICTURE_TYPE_I : 0; pic_param->vop_fields.bits.vop_rounding_type = s->no_rounding; pic_param->vop_fields.bits.intra_dc_vlc_thr = mpeg4_get_intra_dc_vlc_thr(ctx); pic_param->vop_fields.bits.top_field_first = s->top_field_first; pic_param->vop_fields.bits.alternate_vertical_scan_flag = s->alternate_scan; pic_param->vop_fcode_forward = s->f_code; pic_param->vop_fcode_backward = s->b_code; pic_param->vop_time_increment_resolution = avctx->time_base.den; pic_param->num_macroblocks_in_gob = s->mb_width * ff_h263_get_gob_height(s); pic_param->num_gobs_in_vop = (s->mb_width * s->mb_height) / pic_param->num_macroblocks_in_gob; pic_param->TRB = s->pb_time; pic_param->TRD = s->pp_time; if (s->pict_type == AV_PICTURE_TYPE_B) pic_param->backward_reference_picture = ff_vaapi_get_surface_id(&s->next_picture.f); if (s->pict_type != AV_PICTURE_TYPE_I) pic_param->forward_reference_picture = ff_vaapi_get_surface_id(&s->last_picture.f); /* Fill in VAIQMatrixBufferMPEG4 */ /* Only the first inverse quantisation method uses the weighting matrices */ if (pic_param->vol_fields.bits.quant_type) { iq_matrix = ff_vaapi_alloc_iq_matrix(vactx, sizeof(VAIQMatrixBufferMPEG4)); if (!iq_matrix) return -1; iq_matrix->load_intra_quant_mat = 1; iq_matrix->load_non_intra_quant_mat = 1; for (i = 0; i < 64; i++) { int n = s->dsp.idct_permutation[ff_zigzag_direct[i]]; iq_matrix->intra_quant_mat[i] = s->intra_matrix[n]; iq_matrix->non_intra_quant_mat[i] = s->inter_matrix[n]; } } return 0; }


static inline int mpeg2_fast_decode_block_intra(MpegEncContext *s, int16_t *block, int n) { int level, dc, diff, j, run; int component; RLTable *rl; uint8_t * scantable = s->intra_scantable.permutated; const uint16_t *quant_matrix; const int qscale = s->qscale; /* DC coefficient */ if (n < 4) { quant_matrix = s->intra_matrix; component = 0; } else { quant_matrix = s->chroma_intra_matrix; component = (n & 1) + 1; } diff = decode_dc(&s->gb, component); if (diff >= 0xffff) return -1; dc = s->last_dc[component]; dc += diff; s->last_dc[component] = dc; block[0] = dc << (3 - s->intra_dc_precision); if (s->intra_vlc_format) rl = &ff_rl_mpeg2; else rl = &ff_rl_mpeg1; { OPEN_READER(re, &s->gb); /* now quantify & encode AC coefficients */ for (;;) { UPDATE_CACHE(re, &s->gb); GET_RL_VLC(level, run, re, &s->gb, rl->rl_vlc[0], TEX_VLC_BITS, 2, 0); if (level == 127) { break; } else if (level != 0) { scantable += run; j = *scantable; level = (level * qscale * quant_matrix[j]) >> 4; level = (level ^ SHOW_SBITS(re, &s->gb, 1)) - SHOW_SBITS(re, &s->gb, 1); LAST_SKIP_BITS(re, &s->gb, 1); } else { /* escape */ run = SHOW_UBITS(re, &s->gb, 6) + 1; LAST_SKIP_BITS(re, &s->gb, 6); UPDATE_CACHE(re, &s->gb); level = SHOW_SBITS(re, &s->gb, 12); SKIP_BITS(re, &s->gb, 12); scantable += run; j = *scantable; if (level < 0) { level = (-level * qscale * quant_matrix[j]) >> 4; level = -level; } else { level = (level * qscale * quant_matrix[j]) >> 4; } } block[j] = level; } CLOSE_READER(re, &s->gb); } s->block_last_index[n] = scantable - s->intra_scantable.permutated; return 0; }


target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr) { mmu_ctx_t ctx; if (unlikely(get_physical_address(env, &ctx, addr, 0, ACCESS_INT, 1) != 0)) return -1; return ctx.raddr & TARGET_PAGE_MASK; }


static unsigned tget_long(const uint8_t **p, int le) { unsigned v = le ? AV_RL32(*p) : AV_RB32(*p); *p += 4; return v; }