static void decode_hrd(HEVCContext *s, int common_inf_present, int max_sublayers) { GetBitContext *gb = &s->HEVClc.gb; int nal_params_present = 0, vcl_params_present = 0; int subpic_params_present = 0; int i; if (common_inf_present) { nal_params_present = get_bits1(gb); vcl_params_present = get_bits1(gb); if (nal_params_present || vcl_params_present) { subpic_params_present = get_bits1(gb); if (subpic_params_present) { skip_bits(gb, 8); // tick_divisor_minus2 skip_bits(gb, 5); // du_cpb_removal_delay_increment_length_minus1 skip_bits(gb, 1); // sub_pic_cpb_params_in_pic_timing_sei_flag skip_bits(gb, 5); // dpb_output_delay_du_length_minus1 } skip_bits(gb, 4); // bit_rate_scale skip_bits(gb, 4); // cpb_size_scale if (subpic_params_present) skip_bits(gb, 4); // cpb_size_du_scale skip_bits(gb, 5); // initial_cpb_removal_delay_length_minus1 skip_bits(gb, 5); // au_cpb_removal_delay_length_minus1 skip_bits(gb, 5); // dpb_output_delay_length_minus1 } } for (i = 0; i < max_sublayers; i++) { int low_delay = 0; int nb_cpb = 1; int fixed_rate = get_bits1(gb); if (!fixed_rate) fixed_rate = get_bits1(gb); if (fixed_rate) get_ue_golomb_long(gb); // elemental_duration_in_tc_minus1 else low_delay = get_bits1(gb); if (!low_delay) nb_cpb = get_ue_golomb_long(gb) + 1; if (nal_params_present) decode_sublayer_hrd(s, nb_cpb, subpic_params_present); if (vcl_params_present) decode_sublayer_hrd(s, nb_cpb, subpic_params_present); } }


static uint8_t eepro100_read1(EEPRO100State * s, uint32_t addr) { uint8_t val; if (addr <= sizeof(s->mem) - sizeof(val)) { memcpy(&val, &s->mem[addr], sizeof(val)); } switch (addr) { case SCBStatus: case SCBAck: TRACE(OTHER, logout("addr=%s val=0x%02x\n", regname(addr), val)); break; case SCBCmd: TRACE(OTHER, logout("addr=%s val=0x%02x\n", regname(addr), val)); #if 0 val = eepro100_read_command(s); #endif break; case SCBIntmask: TRACE(OTHER, logout("addr=%s val=0x%02x\n", regname(addr), val)); break; case SCBPort + 3: TRACE(OTHER, logout("addr=%s val=0x%02x\n", regname(addr), val)); break; case SCBeeprom: val = eepro100_read_eeprom(s); break; case SCBpmdr: /* Power Management Driver Register */ val = 0; TRACE(OTHER, logout("addr=%s val=0x%02x\n", regname(addr), val)); break; case SCBgstat: /* General Status Register */ /* 100 Mbps full duplex, valid link */ val = 0x07; TRACE(OTHER, logout("addr=General Status val=%02x\n", val)); break; default: logout("addr=%s val=0x%02x\n", regname(addr), val); missing("unknown byte read"); } return val; }


void qmp_migrate_set_parameters(MigrationParameters *params, Error **errp) { MigrationState *s = migrate_get_current(); if (params->has_compress_level && (params->compress_level < 0 || params->compress_level > 9)) { error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "compress_level", "is invalid, it should be in the range of 0 to 9"); } if (params->has_compress_threads && (params->compress_threads < 1 || params->compress_threads > 255)) { error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "compress_threads", "is invalid, it should be in the range of 1 to 255"); } if (params->has_decompress_threads && (params->decompress_threads < 1 || params->decompress_threads > 255)) { error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "decompress_threads", "is invalid, it should be in the range of 1 to 255"); } if (params->has_cpu_throttle_initial && (params->cpu_throttle_initial < 1 || params->cpu_throttle_initial > 99)) { error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "cpu_throttle_initial", "an integer in the range of 1 to 99"); } if (params->has_cpu_throttle_increment && (params->cpu_throttle_increment < 1 || params->cpu_throttle_increment > 99)) { error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "cpu_throttle_increment", "an integer in the range of 1 to 99"); } if (params->has_compress_level) { s->parameters.compress_level = params->compress_level; } if (params->has_compress_threads) { s->parameters.compress_threads = params->compress_threads; } if (params->has_decompress_threads) { s->parameters.decompress_threads = params->decompress_threads; } if (params->has_cpu_throttle_initial) { s->parameters.cpu_throttle_initial = params->cpu_throttle_initial; } if (params->has_cpu_throttle_increment) { s->parameters.cpu_throttle_increment = params->cpu_throttle_increment; } if (params->has_tls_creds) { g_free(s->parameters.tls_creds); s->parameters.tls_creds = g_strdup(params->tls_creds); } if (params->has_tls_hostname) { g_free(s->parameters.tls_hostname); s->parameters.tls_hostname = g_strdup(params->tls_hostname); } }


static int vorbis_parse_setup_hdr_floors(vorbis_context *vc) { GetBitContext *gb = &vc->gb; int i,j,k; vc->floor_count = get_bits(gb, 6) + 1; vc->floors = av_mallocz(vc->floor_count * sizeof(*vc->floors)); for (i = 0; i < vc->floor_count; ++i) { vorbis_floor *floor_setup = &vc->floors[i]; floor_setup->floor_type = get_bits(gb, 16); av_dlog(NULL, " %d. floor type %d \n", i, floor_setup->floor_type); if (floor_setup->floor_type == 1) { int maximum_class = -1; unsigned rangebits, rangemax, floor1_values = 2; floor_setup->decode = vorbis_floor1_decode; floor_setup->data.t1.partitions = get_bits(gb, 5); av_dlog(NULL, " %d.floor: %d partitions \n", i, floor_setup->data.t1.partitions); for (j = 0; j < floor_setup->data.t1.partitions; ++j) { floor_setup->data.t1.partition_class[j] = get_bits(gb, 4); if (floor_setup->data.t1.partition_class[j] > maximum_class) maximum_class = floor_setup->data.t1.partition_class[j]; av_dlog(NULL, " %d. floor %d partition class %d \n", i, j, floor_setup->data.t1.partition_class[j]); av_dlog(NULL, " maximum class %d \n", maximum_class); for (j = 0; j <= maximum_class; ++j) { floor_setup->data.t1.class_dimensions[j] = get_bits(gb, 3) + 1; floor_setup->data.t1.class_subclasses[j] = get_bits(gb, 2); av_dlog(NULL, " %d floor %d class dim: %d subclasses %d \n", i, j, floor_setup->data.t1.class_dimensions[j], floor_setup->data.t1.class_subclasses[j]); if (floor_setup->data.t1.class_subclasses[j]) { GET_VALIDATED_INDEX(floor_setup->data.t1.class_masterbook[j], 8, vc->codebook_count) av_dlog(NULL, " masterbook: %d \n", floor_setup->data.t1.class_masterbook[j]); for (k = 0; k < (1 << floor_setup->data.t1.class_subclasses[j]); ++k) { int16_t bits = get_bits(gb, 8) - 1; if (bits != -1) VALIDATE_INDEX(bits, vc->codebook_count) floor_setup->data.t1.subclass_books[j][k] = bits; av_dlog(NULL, " book %d. : %d \n", k, floor_setup->data.t1.subclass_books[j][k]); floor_setup->data.t1.multiplier = get_bits(gb, 2) + 1; floor_setup->data.t1.x_list_dim = 2; for (j = 0; j < floor_setup->data.t1.partitions; ++j) floor_setup->data.t1.x_list_dim+=floor_setup->data.t1.class_dimensions[floor_setup->data.t1.partition_class[j]]; floor_setup->data.t1.list = av_mallocz(floor_setup->data.t1.x_list_dim * sizeof(*floor_setup->data.t1.list)); rangebits = get_bits(gb, 4); rangemax = (1 << rangebits); if (rangemax > vc->blocksize[1] / 2) { "Floor value is too large for blocksize: %u (%"PRIu32")\n", rangemax, vc->blocksize[1] / 2); floor_setup->data.t1.list[0].x = 0; floor_setup->data.t1.list[1].x = rangemax; for (j = 0; j < floor_setup->data.t1.partitions; ++j) { for (k = 0; k < floor_setup->data.t1.class_dimensions[floor_setup->data.t1.partition_class[j]]; ++k, ++floor1_values) { floor_setup->data.t1.list[floor1_values].x = get_bits(gb, rangebits); av_dlog(NULL, " %u. floor1 Y coord. %d\n", floor1_values, floor_setup->data.t1.list[floor1_values].x); // Precalculate order of x coordinates - needed for decode if (ff_vorbis_ready_floor1_list(vc->avccontext, floor_setup->data.t1.list, floor_setup->data.t1.x_list_dim)) { } else if (floor_setup->floor_type == 0) { unsigned max_codebook_dim = 0; floor_setup->decode = vorbis_floor0_decode; floor_setup->data.t0.order = get_bits(gb, 8); floor_setup->data.t0.rate = get_bits(gb, 16); floor_setup->data.t0.bark_map_size = get_bits(gb, 16); floor_setup->data.t0.amplitude_bits = get_bits(gb, 6); /* zero would result in a div by zero later * * 2^0 - 1 == 0 */ if (floor_setup->data.t0.amplitude_bits == 0) { "Floor 0 amplitude bits is 0.\n"); floor_setup->data.t0.amplitude_offset = get_bits(gb, 8); floor_setup->data.t0.num_books = get_bits(gb, 4) + 1; /* allocate mem for booklist */ floor_setup->data.t0.book_list = av_malloc(floor_setup->data.t0.num_books); if (!floor_setup->data.t0.book_list) return AVERROR(ENOMEM); /* read book indexes */ { int idx; unsigned book_idx; for (idx = 0; idx < floor_setup->data.t0.num_books; ++idx) { GET_VALIDATED_INDEX(book_idx, 8, vc->codebook_count) floor_setup->data.t0.book_list[idx] = book_idx; if (vc->codebooks[book_idx].dimensions > max_codebook_dim) max_codebook_dim = vc->codebooks[book_idx].dimensions; create_map(vc, i); /* codebook dim is for padding if codebook dim doesn't * * divide order+1 then we need to read more data */ floor_setup->data.t0.lsp = av_malloc((floor_setup->data.t0.order + 1 + max_codebook_dim) * sizeof(*floor_setup->data.t0.lsp)); if (!floor_setup->data.t0.lsp) return AVERROR(ENOMEM); /* debug output parsed headers */ av_dlog(NULL, "floor0 order: %u\n", floor_setup->data.t0.order); av_dlog(NULL, "floor0 rate: %u\n", floor_setup->data.t0.rate); av_dlog(NULL, "floor0 bark map size: %u\n", floor_setup->data.t0.bark_map_size); av_dlog(NULL, "floor0 amplitude bits: %u\n", floor_setup->data.t0.amplitude_bits); av_dlog(NULL, "floor0 amplitude offset: %u\n", floor_setup->data.t0.amplitude_offset); av_dlog(NULL, "floor0 number of books: %u\n", floor_setup->data.t0.num_books); av_dlog(NULL, "floor0 book list pointer: %p\n", floor_setup->data.t0.book_list); { int idx; for (idx = 0; idx < floor_setup->data.t0.num_books; ++idx) { av_dlog(NULL, " Book %d: %u\n", idx + 1, floor_setup->data.t0.book_list[idx]); } else { av_log(vc->avccontext, AV_LOG_ERROR, "Invalid floor type!\n"); return 0;


static void ppc_core99_init(MachineState *machine) { ram_addr_t ram_size = machine->ram_size; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; const char *boot_device = machine->boot_order; PowerPCCPU *cpu = NULL; CPUPPCState *env = NULL; char *filename; qemu_irq *pic, **openpic_irqs; MemoryRegion *isa = g_new(MemoryRegion, 1); MemoryRegion *unin_memory = g_new(MemoryRegion, 1); MemoryRegion *unin2_memory = g_new(MemoryRegion, 1); int linux_boot, i, j, k; MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1); hwaddr kernel_base, initrd_base, cmdline_base = 0; long kernel_size, initrd_size; PCIBus *pci_bus; PCIDevice *macio; MACIOIDEState *macio_ide; BusState *adb_bus; MacIONVRAMState *nvr; int bios_size, ndrv_size; uint8_t *ndrv_file; MemoryRegion *pic_mem, *escc_mem; MemoryRegion *escc_bar = g_new(MemoryRegion, 1); int ppc_boot_device; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; void *fw_cfg; int machine_arch; SysBusDevice *s; DeviceState *dev; int *token = g_new(int, 1); hwaddr nvram_addr = 0xFFF04000; uint64_t tbfreq; linux_boot = (kernel_filename != NULL); /* init CPUs */ if (machine->cpu_model == NULL) { #ifdef TARGET_PPC64 machine->cpu_model = "970fx"; #else machine->cpu_model = "G4"; #endif } for (i = 0; i < smp_cpus; i++) { cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model)); if (cpu == NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); } env = &cpu->env; /* Set time-base frequency to 100 Mhz */ cpu_ppc_tb_init(env, TBFREQ); qemu_register_reset(ppc_core99_reset, cpu); } /* allocate RAM */ memory_region_allocate_system_memory(ram, NULL, "ppc_core99.ram", ram_size); memory_region_add_subregion(get_system_memory(), 0, ram); /* allocate and load BIOS */ memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE, &error_fatal); if (bios_name == NULL) bios_name = PROM_FILENAME; filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); memory_region_set_readonly(bios, true); memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios); /* Load OpenBIOS (ELF) */ if (filename) { bios_size = load_elf(filename, NULL, NULL, NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); g_free(filename); } else { bios_size = -1; } if (bios_size < 0 || bios_size > BIOS_SIZE) { error_report("could not load PowerPC bios '%s'", bios_name); exit(1); } if (linux_boot) { uint64_t lowaddr = 0; int bswap_needed; #ifdef BSWAP_NEEDED bswap_needed = 1; #else bswap_needed = 0; #endif kernel_base = KERNEL_LOAD_ADDR; kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, 0, 0); if (kernel_size < 0) kernel_size = load_aout(kernel_filename, kernel_base, ram_size - kernel_base, bswap_needed, TARGET_PAGE_SIZE); if (kernel_size < 0) kernel_size = load_image_targphys(kernel_filename, kernel_base, ram_size - kernel_base); if (kernel_size < 0) { error_report("could not load kernel '%s'", kernel_filename); exit(1); } /* load initrd */ if (initrd_filename) { initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP); initrd_size = load_image_targphys(initrd_filename, initrd_base, ram_size - initrd_base); if (initrd_size < 0) { error_report("could not load initial ram disk '%s'", initrd_filename); exit(1); } cmdline_base = round_page(initrd_base + initrd_size); } else { initrd_base = 0; initrd_size = 0; cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP); } ppc_boot_device = 'm'; } else { kernel_base = 0; kernel_size = 0; initrd_base = 0; initrd_size = 0; ppc_boot_device = '\0'; /* We consider that NewWorld PowerMac never have any floppy drive * For now, OHW cannot boot from the network. */ for (i = 0; boot_device[i] != '\0'; i++) { if (boot_device[i] >= 'c' && boot_device[i] <= 'f') { ppc_boot_device = boot_device[i]; break; } } if (ppc_boot_device == '\0') { fprintf(stderr, "No valid boot device for Mac99 machine\n"); exit(1); } } /* Register 8 MB of ISA IO space */ memory_region_init_alias(isa, NULL, "isa_mmio", get_system_io(), 0, 0x00800000); memory_region_add_subregion(get_system_memory(), 0xf2000000, isa); /* UniN init: XXX should be a real device */ memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000); memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory); memory_region_init_io(unin2_memory, NULL, &unin_ops, token, "unin", 0x1000); memory_region_add_subregion(get_system_memory(), 0xf3000000, unin2_memory); openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *)); openpic_irqs[0] = g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); for (i = 0; i < smp_cpus; i++) { /* Mac99 IRQ connection between OpenPIC outputs pins * and PowerPC input pins */ switch (PPC_INPUT(env)) { case PPC_FLAGS_INPUT_6xx: openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); openpic_irqs[i][OPENPIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; openpic_irqs[i][OPENPIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; openpic_irqs[i][OPENPIC_OUTPUT_MCK] = ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; /* Not connected ? */ openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; /* Check this */ openpic_irqs[i][OPENPIC_OUTPUT_RESET] = ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; break; #if defined(TARGET_PPC64) case PPC_FLAGS_INPUT_970: openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); openpic_irqs[i][OPENPIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; openpic_irqs[i][OPENPIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; openpic_irqs[i][OPENPIC_OUTPUT_MCK] = ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; /* Not connected ? */ openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; /* Check this */ openpic_irqs[i][OPENPIC_OUTPUT_RESET] = ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; break; #endif /* defined(TARGET_PPC64) */ default: error_report("Bus model not supported on mac99 machine"); exit(1); } } pic = g_new0(qemu_irq, 64); dev = qdev_create(NULL, TYPE_OPENPIC); qdev_prop_set_uint32(dev, "model", OPENPIC_MODEL_RAVEN); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); pic_mem = s->mmio[0].memory; k = 0; for (i = 0; i < smp_cpus; i++) { for (j = 0; j < OPENPIC_OUTPUT_NB; j++) { sysbus_connect_irq(s, k++, openpic_irqs[i][j]); } } for (i = 0; i < 64; i++) { pic[i] = qdev_get_gpio_in(dev, i); } if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { /* 970 gets a U3 bus */ pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io()); machine_arch = ARCH_MAC99_U3; } else { pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io()); machine_arch = ARCH_MAC99; } object_property_set_bool(OBJECT(pci_bus), true, "realized", &error_abort); machine->usb |= defaults_enabled() && !machine->usb_disabled; /* Timebase Frequency */ if (kvm_enabled()) { tbfreq = kvmppc_get_tbfreq(); } else { tbfreq = TBFREQ; } /* init basic PC hardware */ escc_mem = escc_init(0, pic[0x25], pic[0x24], serial_hds[0], serial_hds[1], ESCC_CLOCK, 4); memory_region_init_alias(escc_bar, NULL, "escc-bar", escc_mem, 0, memory_region_size(escc_mem)); macio = pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO); dev = DEVICE(macio); qdev_connect_gpio_out(dev, 0, pic[0x19]); /* CUDA */ qdev_connect_gpio_out(dev, 1, pic[0x0d]); /* IDE */ qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE DMA */ qdev_connect_gpio_out(dev, 3, pic[0x0e]); /* IDE */ qdev_connect_gpio_out(dev, 4, pic[0x03]); /* IDE DMA */ qdev_prop_set_uint64(dev, "frequency", tbfreq); macio_init(macio, pic_mem, escc_bar); /* We only emulate 2 out of 3 IDE controllers for now */ ide_drive_get(hd, ARRAY_SIZE(hd)); macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), "ide[0]")); macio_ide_init_drives(macio_ide, hd); macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), "ide[1]")); macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); adb_bus = qdev_get_child_bus(dev, "adb.0"); dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); qdev_init_nofail(dev); dev = qdev_create(adb_bus, TYPE_ADB_MOUSE); qdev_init_nofail(dev); if (machine->usb) { pci_create_simple(pci_bus, -1, "pci-ohci"); /* U3 needs to use USB for input because Linux doesn't support via-cuda on PPC64 */ if (machine_arch == ARCH_MAC99_U3) { USBBus *usb_bus = usb_bus_find(-1); usb_create_simple(usb_bus, "usb-kbd"); usb_create_simple(usb_bus, "usb-mouse"); } } pci_vga_init(pci_bus); if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) { graphic_depth = 15; } for (i = 0; i < nb_nics; i++) { pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); } /* The NewWorld NVRAM is not located in the MacIO device */ #ifdef CONFIG_KVM if (kvm_enabled() && getpagesize() > 4096) { /* We can't combine read-write and read-only in a single page, so move the NVRAM out of ROM again for KVM */ nvram_addr = 0xFFE00000; } #endif dev = qdev_create(NULL, TYPE_MACIO_NVRAM); qdev_prop_set_uint32(dev, "size", 0x2000); qdev_prop_set_uint32(dev, "it_shift", 1); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr); nvr = MACIO_NVRAM(dev); pmac_format_nvram_partition(nvr, 0x2000); /* No PCI init: the BIOS will do it */ fw_cfg = fw_cfg_init_mem(CFG_ADDR, CFG_ADDR + 2); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch); fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); if (kernel_cmdline) { fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline); } else { fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); } fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); if (kvm_enabled()) { #ifdef CONFIG_KVM uint8_t *hypercall; hypercall = g_malloc(16); kvmppc_get_hypercall(env, hypercall, 16); fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); #endif } fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq); /* Mac OS X requires a "known good" clock-frequency value; pass it one. */ fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ); fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ); fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr); /* MacOS NDRV VGA driver */ filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME); if (filename) { ndrv_size = get_image_size(filename); if (ndrv_size != -1) { ndrv_file = g_malloc(ndrv_size); ndrv_size = load_image(filename, ndrv_file); fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size); } g_free(filename); } qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); }


static void test_qemu_strtoull_empty(void) { const char *str = ""; char f = 'X'; const char *endptr = &f; uint64_t res = 999; int err; err = qemu_strtoull(str, &endptr, 0, &res); g_assert_cmpint(err, ==, 0); g_assert_cmpint(res, ==, 0); g_assert(endptr == str); }


void pcmcia_socket_unregister(PCMCIASocket *socket) { struct pcmcia_socket_entry_s *entry, **ptr; ptr = &pcmcia_sockets; for (entry = *ptr; entry; ptr = &entry->next, entry = *ptr) if (entry->socket == socket) { *ptr = entry->next; g_free(entry); } }


static ssize_t qsb_get_iovec(const QEMUSizedBuffer *qsb, off_t pos, off_t *d_off) { ssize_t i; off_t curr = 0; if (pos > qsb->used) { return -1; } for (i = 0; i < qsb->n_iov; i++) { if (curr + qsb->iov[i].iov_len > pos) { *d_off = pos - curr; return i; } curr += qsb->iov[i].iov_len; } return -1; }


static gboolean fd_chr_read(GIOChannel *chan, GIOCondition cond, void *opaque) { CharDriverState *chr = opaque; FDCharDriver *s = chr->opaque; int len; uint8_t buf[READ_BUF_LEN]; GIOStatus status; gsize bytes_read; len = sizeof(buf); if (len > s->max_size) { len = s->max_size; } if (len == 0) { return TRUE; } status = g_io_channel_read_chars(chan, (gchar *)buf, len, &bytes_read, NULL); if (status == G_IO_STATUS_EOF) { if (s->fd_in_tag) { g_source_remove(s->fd_in_tag); s->fd_in_tag = 0; } qemu_chr_be_event(chr, CHR_EVENT_CLOSED); return FALSE; } if (status == G_IO_STATUS_NORMAL) { qemu_chr_be_write(chr, buf, bytes_read); } return TRUE; }


void hmp_drive_add_node(Monitor *mon, const char *optstr) { QemuOpts *opts; QDict *qdict; Error *local_err = NULL; opts = qemu_opts_parse_noisily(&qemu_drive_opts, optstr, false); if (!opts) { return; } qdict = qemu_opts_to_qdict(opts, NULL); if (!qdict_get_try_str(qdict, "node-name")) { error_report("'node-name' needs to be specified"); goto out; } BlockDriverState *bs = bds_tree_init(qdict, &local_err); if (!bs) { error_report_err(local_err); goto out; } QTAILQ_INSERT_TAIL(&monitor_bdrv_states, bs, monitor_list); out: qemu_opts_del(opts); }


void cpu_breakpoint_remove_all(CPUState *cpu, int mask) { #if defined(TARGET_HAS_ICE) CPUBreakpoint *bp, *next; QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) { if (bp->flags & mask) { cpu_breakpoint_remove_by_ref(cpu, bp); } } #endif }


solisten(port, laddr, lport, flags) u_int port; u_int32_t laddr; u_int lport; int flags; { struct sockaddr_in addr; struct socket *so; int s, addrlen = sizeof(addr), opt = 1; DEBUG_CALL("solisten"); DEBUG_ARG("port = %d", port); DEBUG_ARG("laddr = %x", laddr); DEBUG_ARG("lport = %d", lport); DEBUG_ARG("flags = %x", flags); if ((so = socreate()) == NULL) { /* free(so); Not sofree() ??? free(NULL) == NOP */ return NULL; } /* Don't tcp_attach... we don't need so_snd nor so_rcv */ if ((so->so_tcpcb = tcp_newtcpcb(so)) == NULL) { free(so); return NULL; } insque(so,&tcb); /* * SS_FACCEPTONCE sockets must time out. */ if (flags & SS_FACCEPTONCE) so->so_tcpcb->t_timer[TCPT_KEEP] = TCPTV_KEEP_INIT*2; so->so_state = (SS_FACCEPTCONN|flags); so->so_lport = lport; /* Kept in network format */ so->so_laddr.s_addr = laddr; /* Ditto */ addr.sin_family = AF_INET; addr.sin_addr.s_addr = INADDR_ANY; addr.sin_port = port; if (((s = socket(AF_INET,SOCK_STREAM,0)) < 0) || (setsockopt(s,SOL_SOCKET,SO_REUSEADDR,(char *)&opt,sizeof(int)) < 0) || (bind(s,(struct sockaddr *)&addr, sizeof(addr)) < 0) || (listen(s,1) < 0)) { int tmperrno = errno; /* Don't clobber the real reason we failed */ close(s); sofree(so); /* Restore the real errno */ #ifdef _WIN32 WSASetLastError(tmperrno); #else errno = tmperrno; #endif return NULL; } setsockopt(s,SOL_SOCKET,SO_OOBINLINE,(char *)&opt,sizeof(int)); getsockname(s,(struct sockaddr *)&addr,&addrlen); so->so_fport = addr.sin_port; if (addr.sin_addr.s_addr == 0 || addr.sin_addr.s_addr == loopback_addr.s_addr) so->so_faddr = alias_addr; else so->so_faddr = addr.sin_addr; so->s = s; return so; }


static void *qemu_tcg_cpu_thread_fn(void *arg) { CPUState *cpu = arg; qemu_tcg_init_cpu_signals(); qemu_thread_get_self(cpu->thread); qemu_mutex_lock(&qemu_global_mutex); CPU_FOREACH(cpu) { cpu->thread_id = qemu_get_thread_id(); cpu->created = true; cpu->exception_index = -1; cpu->can_do_io = 1; } qemu_cond_signal(&qemu_cpu_cond); /* wait for initial kick-off after machine start */ while (QTAILQ_FIRST(&cpus)->stopped) { qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); /* process any pending work */ CPU_FOREACH(cpu) { qemu_wait_io_event_common(cpu); } } while (1) { tcg_exec_all(); if (use_icount) { int64_t deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL); if (deadline == 0) { qemu_clock_notify(QEMU_CLOCK_VIRTUAL); } } qemu_tcg_wait_io_event(); } return NULL; }


int attribute_align_arg avcodec_encode_video2(AVCodecContext *avctx, AVPacket *avpkt, const AVFrame *frame, int *got_packet_ptr) { int ret; AVPacket user_pkt = *avpkt; *got_packet_ptr = 0; if (!(avctx->codec->capabilities & CODEC_CAP_DELAY) && !frame) { av_free_packet(avpkt); av_init_packet(avpkt); avpkt->size = 0; return 0; } if (av_image_check_size(avctx->width, avctx->height, 0, avctx)) return AVERROR(EINVAL); av_assert0(avctx->codec->encode2); ret = avctx->codec->encode2(avctx, avpkt, frame, got_packet_ptr); av_assert0(ret <= 0); if (avpkt->data && avpkt->data == avctx->internal->byte_buffer) { if (user_pkt.data) { if (user_pkt.size >= avpkt->size) { memcpy(user_pkt.data, avpkt->data, avpkt->size); } else { av_log(avctx, AV_LOG_ERROR, "Provided packet is too small, needs to be %d\n", avpkt->size); avpkt->size = user_pkt.size; ret = -1; } avpkt->data = user_pkt.data; avpkt->destruct = user_pkt.destruct; } else { if (av_dup_packet(avpkt) < 0) { ret = AVERROR(ENOMEM); } } } if (!ret) { if (!*got_packet_ptr) avpkt->size = 0; else if (!(avctx->codec->capabilities & CODEC_CAP_DELAY)) avpkt->pts = avpkt->dts = frame->pts; if (!user_pkt.data && avpkt->data && avpkt->destruct == av_destruct_packet) { uint8_t *new_data = av_realloc(avpkt->data, avpkt->size + FF_INPUT_BUFFER_PADDING_SIZE); if (new_data) avpkt->data = new_data; } avctx->frame_number++; } if (ret < 0 || !*got_packet_ptr) av_free_packet(avpkt); emms_c(); return ret; }


static int net_rx_ok(void *opaque) { struct XenNetDev *netdev = opaque; RING_IDX rc, rp; if (netdev->xendev.be_state != XenbusStateConnected) return 0; rc = netdev->rx_ring.req_cons; rp = netdev->rx_ring.sring->req_prod; xen_rmb(); if (rc == rp || RING_REQUEST_CONS_OVERFLOW(&netdev->rx_ring, rc)) { xen_be_printf(&netdev->xendev, 2, "%s: no rx buffers (%d/%d)\n", __FUNCTION__, rc, rp); return 0; } return 1; }


uint64_t migrate_max_downtime(void) { return max_downtime; }


static void tc6393xb_gpio_set(void *opaque, int line, int level) { // TC6393xbState *s = opaque; if (line > TC6393XB_GPIOS) { printf("%s: No GPIO pin %i\n", __FUNCTION__, line); return; } // FIXME: how does the chip reflect the GPIO input level change? }


static void ne2000_receive(void *opaque, const uint8_t *buf, int size) { NE2000State *s = opaque; uint8_t *p; int total_len, next, avail, len, index, mcast_idx; uint8_t buf1[60]; static const uint8_t broadcast_macaddr[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; #if defined(DEBUG_NE2000) printf("NE2000: received len=%d\n", size); #endif if (s->cmd & E8390_STOP || ne2000_buffer_full(s)) return; /* XXX: check this */ if (s->rxcr & 0x10) { /* promiscuous: receive all */ } else { if (!memcmp(buf, broadcast_macaddr, 6)) { /* broadcast address */ if (!(s->rxcr & 0x04)) return; } else if (buf[0] & 0x01) { /* multicast */ if (!(s->rxcr & 0x08)) return; mcast_idx = compute_mcast_idx(buf); if (!(s->mult[mcast_idx >> 3] & (1 << (mcast_idx & 7)))) return; } else if (s->mem[0] == buf[0] && s->mem[2] == buf[1] && s->mem[4] == buf[2] && s->mem[6] == buf[3] && s->mem[8] == buf[4] && s->mem[10] == buf[5]) { /* match */ } else { return; } } /* if too small buffer, then expand it */ if (size < MIN_BUF_SIZE) { memcpy(buf1, buf, size); memset(buf1 + size, 0, MIN_BUF_SIZE - size); buf = buf1; size = MIN_BUF_SIZE; } index = s->curpag << 8; /* 4 bytes for header */ total_len = size + 4; /* address for next packet (4 bytes for CRC) */ next = index + ((total_len + 4 + 255) & ~0xff); if (next >= s->stop) next -= (s->stop - s->start); /* prepare packet header */ p = s->mem + index; s->rsr = ENRSR_RXOK; /* receive status */ /* XXX: check this */ if (buf[0] & 0x01) s->rsr |= ENRSR_PHY; p[0] = s->rsr; p[1] = next >> 8; p[2] = total_len; p[3] = total_len >> 8; index += 4; /* write packet data */ while (size > 0) { avail = s->stop - index; len = size; if (len > avail) len = avail; memcpy(s->mem + index, buf, len); buf += len; index += len; if (index == s->stop) index = s->start; size -= len; } s->curpag = next >> 8; /* now we can signal we have received something */ s->isr |= ENISR_RX; ne2000_update_irq(s); }


static TCGv gen_muls_i64_i32(TCGv a, TCGv b) { TCGv tmp1 = tcg_temp_new(TCG_TYPE_I64); TCGv tmp2 = tcg_temp_new(TCG_TYPE_I64); tcg_gen_ext_i32_i64(tmp1, a); dead_tmp(a); tcg_gen_ext_i32_i64(tmp2, b); dead_tmp(b); tcg_gen_mul_i64(tmp1, tmp1, tmp2); return tmp1; }


void runstate_set(RunState new_state) { if (new_state >= RUN_STATE_MAX || !runstate_valid_transitions[current_run_state][new_state]) { fprintf(stderr, "invalid runstate transition\n"); abort(); } current_run_state = new_state; }


static int kvmppc_put_books_sregs(PowerPCCPU *cpu) { CPUPPCState *env = &cpu->env; struct kvm_sregs sregs; int i; sregs.pvr = env->spr[SPR_PVR]; sregs.u.s.sdr1 = env->spr[SPR_SDR1]; /* Sync SLB */ #ifdef TARGET_PPC64 for (i = 0; i < ARRAY_SIZE(env->slb); i++) { sregs.u.s.ppc64.slb[i].slbe = env->slb[i].esid; if (env->slb[i].esid & SLB_ESID_V) { sregs.u.s.ppc64.slb[i].slbe |= i; } sregs.u.s.ppc64.slb[i].slbv = env->slb[i].vsid; } #endif /* Sync SRs */ for (i = 0; i < 16; i++) { sregs.u.s.ppc32.sr[i] = env->sr[i]; } /* Sync BATs */ for (i = 0; i < 8; i++) { /* Beware. We have to swap upper and lower bits here */ sregs.u.s.ppc32.dbat[i] = ((uint64_t)env->DBAT[0][i] << 32) | env->DBAT[1][i]; sregs.u.s.ppc32.ibat[i] = ((uint64_t)env->IBAT[0][i] << 32) | env->IBAT[1][i]; } return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_SREGS, &sregs); }


int kvmppc_remove_spapr_tce(void *table, int fd, uint32_t window_size) { long len; if (fd < 0) { return -1; } len = (window_size / SPAPR_TCE_PAGE_SIZE)*sizeof(sPAPRTCE); if ((munmap(table, len) < 0) || (close(fd) < 0)) { fprintf(stderr, "KVM: Unexpected error removing TCE table: %s", strerror(errno)); /* Leak the table */ } return 0; }


static unsigned int crisv32_decoder(CPUCRISState *env, DisasContext *dc) { int insn_len = 2; int i; if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { tcg_gen_debug_insn_start(dc->pc); } /* Load a halfword onto the instruction register. */ dc->ir = cris_fetch(env, dc, dc->pc, 2, 0); /* Now decode it. */ dc->opcode = EXTRACT_FIELD(dc->ir, 4, 11); dc->op1 = EXTRACT_FIELD(dc->ir, 0, 3); dc->op2 = EXTRACT_FIELD(dc->ir, 12, 15); dc->zsize = EXTRACT_FIELD(dc->ir, 4, 4); dc->zzsize = EXTRACT_FIELD(dc->ir, 4, 5); dc->postinc = EXTRACT_FIELD(dc->ir, 10, 10); /* Large switch for all insns. */ for (i = 0; i < ARRAY_SIZE(decinfo); i++) { if ((dc->opcode & decinfo[i].mask) == decinfo[i].bits) { insn_len = decinfo[i].dec(env, dc); break; } } #if !defined(CONFIG_USER_ONLY) /* Single-stepping ? */ if (dc->tb_flags & S_FLAG) { int l1; l1 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_NE, cpu_PR[PR_SPC], dc->pc, l1); /* We treat SPC as a break with an odd trap vector. */ cris_evaluate_flags(dc); t_gen_mov_env_TN(trap_vector, tcg_const_tl(3)); tcg_gen_movi_tl(env_pc, dc->pc + insn_len); tcg_gen_movi_tl(cpu_PR[PR_SPC], dc->pc + insn_len); t_gen_raise_exception(EXCP_BREAK); gen_set_label(l1); } #endif return insn_len; }


static int64_t coroutine_fn cow_co_get_block_status(BlockDriverState *bs, int64_t sector_num, int nb_sectors, int *num_same) { BDRVCowState *s = bs->opaque; int ret = cow_co_is_allocated(bs, sector_num, nb_sectors, num_same); int64_t offset = s->cow_sectors_offset + (sector_num << BDRV_SECTOR_BITS); if (ret < 0) { return ret; } return (ret ? BDRV_BLOCK_DATA : 0) | offset | BDRV_BLOCK_OFFSET_VALID; }


static int rle_unpack(unsigned char *src, unsigned char *dest, int len) { unsigned char *ps; unsigned char *pd; int i, l; ps = src; pd = dest; if (len & 1) *pd++ = *ps++; len >>= 1; i = 0; do { l = *ps++; if (l & 0x80) { l = (l & 0x7F) * 2; memcpy(pd, ps, l); ps += l; pd += l; } else { for (i = 0; i < l; i++) { *pd++ = ps[0]; *pd++ = ps[1]; } ps += 2; } i += l; } while (i < len); return (ps - src); }


void scsi_bus_legacy_handle_cmdline(SCSIBus *bus, Error **errp) { Location loc; DriveInfo *dinfo; int unit; Error *err = NULL; loc_push_none(&loc); for (unit = 0; unit <= bus->info->max_target; unit++) { dinfo = drive_get(IF_SCSI, bus->busnr, unit); if (dinfo == NULL) { continue; } qemu_opts_loc_restore(dinfo->opts); scsi_bus_legacy_add_drive(bus, blk_bs(blk_by_legacy_dinfo(dinfo)), unit, false, -1, NULL, &err); if (err != NULL) { error_report("%s", error_get_pretty(err)); error_propagate(errp, err); break; } } loc_pop(&loc); }


static void netfilter_print_info(Monitor *mon, NetFilterState *nf) { char *str; ObjectProperty *prop; ObjectPropertyIterator iter; StringOutputVisitor *ov; /* generate info str */ object_property_iter_init(&iter, OBJECT(nf)); while ((prop = object_property_iter_next(&iter))) { if (!strcmp(prop->name, "type")) { continue; } ov = string_output_visitor_new(false); object_property_get(OBJECT(nf), string_output_get_visitor(ov), prop->name, NULL); str = string_output_get_string(ov); visit_free(string_output_get_visitor(ov)); monitor_printf(mon, ",%s=%s", prop->name, str); g_free(str); } monitor_printf(mon, "\n"); }


static int restore_user_regs(CPUPPCState *env, struct target_mcontext *frame, int sig) { target_ulong save_r2 = 0; target_ulong msr; target_ulong ccr; int i; if (!sig) { save_r2 = env->gpr[2]; } /* Restore general registers. */ for (i = 0; i < ARRAY_SIZE(env->gpr); i++) { if (__get_user(env->gpr[i], &frame->mc_gregs[i])) { return 1; } } if (__get_user(env->nip, &frame->mc_gregs[TARGET_PT_NIP]) || __get_user(env->ctr, &frame->mc_gregs[TARGET_PT_CTR]) || __get_user(env->lr, &frame->mc_gregs[TARGET_PT_LNK]) || __get_user(env->xer, &frame->mc_gregs[TARGET_PT_XER])) return 1; if (__get_user(ccr, &frame->mc_gregs[TARGET_PT_CCR])) return 1; for (i = 0; i < ARRAY_SIZE(env->crf); i++) { env->crf[i] = (ccr >> (32 - ((i + 1) * 4))) & 0xf; } if (!sig) { env->gpr[2] = save_r2; } /* Restore MSR. */ if (__get_user(msr, &frame->mc_gregs[TARGET_PT_MSR])) return 1; /* If doing signal return, restore the previous little-endian mode. */ if (sig) env->msr = (env->msr & ~MSR_LE) | (msr & MSR_LE); /* Restore Altivec registers if necessary. */ if (env->insns_flags & PPC_ALTIVEC) { for (i = 0; i < ARRAY_SIZE(env->avr); i++) { ppc_avr_t *avr = &env->avr[i]; ppc_avr_t *vreg = &frame->mc_vregs.altivec[i]; if (__get_user(avr->u64[0], &vreg->u64[0]) || __get_user(avr->u64[1], &vreg->u64[1])) { return 1; } } /* Set MSR_VEC in the saved MSR value to indicate that frame->mc_vregs contains valid data. */ if (__get_user(env->spr[SPR_VRSAVE], (target_ulong *)(&frame->mc_vregs.altivec[32].u32[3]))) return 1; } /* Restore floating point registers. */ if (env->insns_flags & PPC_FLOAT) { uint64_t fpscr; for (i = 0; i < ARRAY_SIZE(env->fpr); i++) { if (__get_user(env->fpr[i], &frame->mc_fregs[i])) { return 1; } } if (__get_user(fpscr, &frame->mc_fregs[32])) return 1; env->fpscr = (uint32_t) fpscr; } /* Save SPE registers. The kernel only saves the high half. */ if (env->insns_flags & PPC_SPE) { #if defined(TARGET_PPC64) for (i = 0; i < ARRAY_SIZE(env->gpr); i++) { uint32_t hi; if (__get_user(hi, &frame->mc_vregs.spe[i])) { return 1; } env->gpr[i] = ((uint64_t)hi << 32) | ((uint32_t) env->gpr[i]); } #else for (i = 0; i < ARRAY_SIZE(env->gprh); i++) { if (__get_user(env->gprh[i], &frame->mc_vregs.spe[i])) { return 1; } } #endif if (__get_user(env->spe_fscr, &frame->mc_vregs.spe[32])) return 1; } return 0; }


static void virtio_pci_config_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { VirtIOPCIProxy *proxy = opaque; uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev); if (addr < config) { virtio_ioport_write(proxy, addr, val); return; } addr -= config; /* * Virtio-PCI is odd. Ioports are LE but config space is target native * endian. */ switch (size) { case 1: virtio_config_writeb(proxy->vdev, addr, val); break; case 2: if (virtio_is_big_endian()) { val = bswap16(val); } virtio_config_writew(proxy->vdev, addr, val); break; case 4: if (virtio_is_big_endian()) { val = bswap32(val); } virtio_config_writel(proxy->vdev, addr, val); break; } }


int qcow2_alloc_cluster_link_l2(BlockDriverState *bs, QCowL2Meta *m) { BDRVQcowState *s = bs->opaque; int i, j = 0, l2_index, ret; uint64_t *old_cluster, start_sect, l2_offset, *l2_table; uint64_t cluster_offset = m->cluster_offset; bool cow = false; trace_qcow2_cluster_link_l2(qemu_coroutine_self(), m->nb_clusters); if (m->nb_clusters == 0) return 0; old_cluster = g_malloc(m->nb_clusters * sizeof(uint64_t)); /* copy content of unmodified sectors */ start_sect = (m->offset & ~(s->cluster_size - 1)) >> 9; if (m->n_start) { cow = true; qemu_co_mutex_unlock(&s->lock); ret = copy_sectors(bs, start_sect, cluster_offset, 0, m->n_start); qemu_co_mutex_lock(&s->lock); if (ret < 0) goto err; } if (m->nb_available & (s->cluster_sectors - 1)) { uint64_t end = m->nb_available & ~(uint64_t)(s->cluster_sectors - 1); cow = true; qemu_co_mutex_unlock(&s->lock); ret = copy_sectors(bs, start_sect + end, cluster_offset + (end << 9), m->nb_available - end, s->cluster_sectors); qemu_co_mutex_lock(&s->lock); if (ret < 0) goto err; } /* * Update L2 table. * * Before we update the L2 table to actually point to the new cluster, we * need to be sure that the refcounts have been increased and COW was * handled. */ if (cow) { qcow2_cache_depends_on_flush(s->l2_table_cache); } qcow2_cache_set_dependency(bs, s->l2_table_cache, s->refcount_block_cache); ret = get_cluster_table(bs, m->offset, &l2_table, &l2_offset, &l2_index); if (ret < 0) { goto err; } qcow2_cache_entry_mark_dirty(s->l2_table_cache, l2_table); for (i = 0; i < m->nb_clusters; i++) { /* if two concurrent writes happen to the same unallocated cluster * each write allocates separate cluster and writes data concurrently. * The first one to complete updates l2 table with pointer to its * cluster the second one has to do RMW (which is done above by * copy_sectors()), update l2 table with its cluster pointer and free * old cluster. This is what this loop does */ if(l2_table[l2_index + i] != 0) old_cluster[j++] = l2_table[l2_index + i]; l2_table[l2_index + i] = cpu_to_be64((cluster_offset + (i << s->cluster_bits)) | QCOW_OFLAG_COPIED); } ret = qcow2_cache_put(bs, s->l2_table_cache, (void**) &l2_table); if (ret < 0) { goto err; } /* * If this was a COW, we need to decrease the refcount of the old cluster. * Also flush bs->file to get the right order for L2 and refcount update. */ if (j != 0) { for (i = 0; i < j; i++) { qcow2_free_any_clusters(bs, be64_to_cpu(old_cluster[i]) & ~QCOW_OFLAG_COPIED, 1); } } ret = 0; err: g_free(old_cluster); return ret; }


MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, uint8_t *buf, int len, hwaddr addr1, hwaddr l, MemoryRegion *mr) { uint8_t *ptr; uint64_t val; MemTxResult result = MEMTX_OK; bool release_lock = false; for (;;) { if (!memory_access_is_direct(mr, false)) { /* I/O case */ release_lock |= prepare_mmio_access(mr); l = memory_access_size(mr, l, addr1); switch (l) { case 8: /* 64 bit read access */ result |= memory_region_dispatch_read(mr, addr1, &val, 8, attrs); stq_p(buf, val); break; case 4: /* 32 bit read access */ result |= memory_region_dispatch_read(mr, addr1, &val, 4, attrs); stl_p(buf, val); break; case 2: /* 16 bit read access */ result |= memory_region_dispatch_read(mr, addr1, &val, 2, attrs); stw_p(buf, val); break; case 1: /* 8 bit read access */ result |= memory_region_dispatch_read(mr, addr1, &val, 1, attrs); stb_p(buf, val); break; default: abort(); } } else { /* RAM case */ ptr = qemu_map_ram_ptr(mr->ram_block, addr1); memcpy(buf, ptr, l); } if (release_lock) { qemu_mutex_unlock_iothread(); release_lock = false; } len -= l; buf += l; addr += l; if (!len) { break; } l = len; mr = address_space_translate(as, addr, &addr1, &l, false); } return result; }


FsTypeEntry *get_fsdev_fsentry(char *id) { struct FsTypeListEntry *fsle; QTAILQ_FOREACH(fsle, &fstype_entries, next) { if (strcmp(fsle->fse.fsdev_id, id) == 0) { return &fsle->fse; } } return NULL; }


bool eth_parse_ipv6_hdr(struct iovec *pkt, int pkt_frags, size_t ip6hdr_off, uint8_t *l4proto, size_t *full_hdr_len) { struct ip6_header ip6_hdr; struct ip6_ext_hdr ext_hdr; size_t bytes_read; bytes_read = iov_to_buf(pkt, pkt_frags, ip6hdr_off, &ip6_hdr, sizeof(ip6_hdr)); if (bytes_read < sizeof(ip6_hdr)) { return false; } *full_hdr_len = sizeof(struct ip6_header); if (!eth_is_ip6_extension_header_type(ip6_hdr.ip6_nxt)) { *l4proto = ip6_hdr.ip6_nxt; return true; } do { bytes_read = iov_to_buf(pkt, pkt_frags, ip6hdr_off + *full_hdr_len, &ext_hdr, sizeof(ext_hdr)); *full_hdr_len += (ext_hdr.ip6r_len + 1) * IP6_EXT_GRANULARITY; } while (eth_is_ip6_extension_header_type(ext_hdr.ip6r_nxt)); *l4proto = ext_hdr.ip6r_nxt; return true; }


static void kvmppc_timer_hack(void *opaque) { qemu_service_io(); qemu_mod_timer(kvmppc_timer, qemu_get_clock_ns(vm_clock) + kvmppc_timer_rate); }


static void setup_rt_frame(int sig, struct target_sigaction *ka, target_siginfo_t *info, target_sigset_t *set, CPUPPCState *env) { struct target_rt_sigframe *rt_sf; struct target_mcontext *frame; target_ulong rt_sf_addr, newsp = 0; int i, err = 0; int signal; rt_sf_addr = get_sigframe(ka, env, sizeof(*rt_sf)); if (!lock_user_struct(VERIFY_WRITE, rt_sf, rt_sf_addr, 1)) goto sigsegv; signal = current_exec_domain_sig(sig); copy_siginfo_to_user(&rt_sf->info, info); __put_user(0, &rt_sf->uc.tuc_flags); __put_user(0, &rt_sf->uc.tuc_link); __put_user((target_ulong)target_sigaltstack_used.ss_sp, &rt_sf->uc.tuc_stack.ss_sp); __put_user(sas_ss_flags(env->gpr[1]), &rt_sf->uc.tuc_stack.ss_flags); __put_user(target_sigaltstack_used.ss_size, &rt_sf->uc.tuc_stack.ss_size); __put_user(h2g (&rt_sf->uc.tuc_mcontext), &rt_sf->uc.tuc_regs); for(i = 0; i < TARGET_NSIG_WORDS; i++) { __put_user(set->sig[i], &rt_sf->uc.tuc_sigmask.sig[i]); } frame = &rt_sf->uc.tuc_mcontext; err |= save_user_regs(env, frame, TARGET_NR_rt_sigreturn); /* The kernel checks for the presence of a VDSO here. We don't emulate a vdso, so use a sigreturn system call. */ env->lr = (target_ulong) h2g(frame->tramp); /* Turn off all fp exceptions. */ env->fpscr = 0; /* Create a stack frame for the caller of the handler. */ newsp = rt_sf_addr - (SIGNAL_FRAMESIZE + 16); __put_user(env->gpr[1], (target_ulong *)(uintptr_t) newsp); if (err) goto sigsegv; /* Set up registers for signal handler. */ env->gpr[1] = newsp; env->gpr[3] = (target_ulong) signal; env->gpr[4] = (target_ulong) h2g(&rt_sf->info); env->gpr[5] = (target_ulong) h2g(&rt_sf->uc); env->gpr[6] = (target_ulong) h2g(rt_sf); env->nip = (target_ulong) ka->_sa_handler; /* Signal handlers are entered in big-endian mode. */ env->msr &= ~MSR_LE; unlock_user_struct(rt_sf, rt_sf_addr, 1); return; sigsegv: unlock_user_struct(rt_sf, rt_sf_addr, 1); qemu_log("segfaulting from setup_rt_frame\n"); force_sig(TARGET_SIGSEGV); }


static void gen_test_cc(int cc, int label) { TCGv tmp; TCGv tmp2; int inv; switch (cc) { case 0: /* eq: Z */ tmp = load_cpu_field(ZF); tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label); break; case 1: /* ne: !Z */ tmp = load_cpu_field(ZF); tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, label); break; case 2: /* cs: C */ tmp = load_cpu_field(CF); tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, label); break; case 3: /* cc: !C */ tmp = load_cpu_field(CF); tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label); break; case 4: /* mi: N */ tmp = load_cpu_field(NF); tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label); break; case 5: /* pl: !N */ tmp = load_cpu_field(NF); tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label); break; case 6: /* vs: V */ tmp = load_cpu_field(VF); tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label); break; case 7: /* vc: !V */ tmp = load_cpu_field(VF); tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label); break; case 8: /* hi: C && !Z */ inv = gen_new_label(); tmp = load_cpu_field(CF); tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, inv); dead_tmp(tmp); tmp = load_cpu_field(ZF); tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, label); gen_set_label(inv); break; case 9: /* ls: !C || Z */ tmp = load_cpu_field(CF); tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label); dead_tmp(tmp); tmp = load_cpu_field(ZF); tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label); break; case 10: /* ge: N == V -> N ^ V == 0 */ tmp = load_cpu_field(VF); tmp2 = load_cpu_field(NF); tcg_gen_xor_i32(tmp, tmp, tmp2); dead_tmp(tmp2); tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label); break; case 11: /* lt: N != V -> N ^ V != 0 */ tmp = load_cpu_field(VF); tmp2 = load_cpu_field(NF); tcg_gen_xor_i32(tmp, tmp, tmp2); dead_tmp(tmp2); tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label); break; case 12: /* gt: !Z && N == V */ inv = gen_new_label(); tmp = load_cpu_field(ZF); tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, inv); dead_tmp(tmp); tmp = load_cpu_field(VF); tmp2 = load_cpu_field(NF); tcg_gen_xor_i32(tmp, tmp, tmp2); dead_tmp(tmp2); tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label); gen_set_label(inv); break; case 13: /* le: Z || N != V */ tmp = load_cpu_field(ZF); tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label); dead_tmp(tmp); tmp = load_cpu_field(VF); tmp2 = load_cpu_field(NF); tcg_gen_xor_i32(tmp, tmp, tmp2); dead_tmp(tmp2); tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label); break; default: fprintf(stderr, "Bad condition code 0x%x\n", cc); abort(); } dead_tmp(tmp); }


static int kvm_put_xcrs(X86CPU *cpu) { CPUX86State *env = &cpu->env; struct kvm_xcrs xcrs = {}; if (!kvm_has_xcrs()) { return 0; } xcrs.nr_xcrs = 1; xcrs.flags = 0; xcrs.xcrs[0].xcr = 0; xcrs.xcrs[0].value = env->xcr0; return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_XCRS, &xcrs); }


START_TEST(qint_destroy_test) { QInt *qi = qint_from_int(0); QDECREF(qi); }


static void qemu_chr_parse_socket(QemuOpts *opts, ChardevBackend *backend, Error **errp) { bool is_listen = qemu_opt_get_bool(opts, "server", false); bool is_waitconnect = is_listen && qemu_opt_get_bool(opts, "wait", true); bool is_telnet = qemu_opt_get_bool(opts, "telnet", false); bool is_tn3270 = qemu_opt_get_bool(opts, "tn3270", false); bool do_nodelay = !qemu_opt_get_bool(opts, "delay", true); int64_t reconnect = qemu_opt_get_number(opts, "reconnect", 0); const char *path = qemu_opt_get(opts, "path"); const char *host = qemu_opt_get(opts, "host"); const char *port = qemu_opt_get(opts, "port"); const char *tls_creds = qemu_opt_get(opts, "tls-creds"); SocketAddress *addr; ChardevSocket *sock; backend->type = CHARDEV_BACKEND_KIND_SOCKET; if (!path) { if (!host) { error_setg(errp, "chardev: socket: no host given"); return; } if (!port) { error_setg(errp, "chardev: socket: no port given"); return; } } else { if (tls_creds) { error_setg(errp, "TLS can only be used over TCP socket"); return; } } sock = backend->u.socket.data = g_new0(ChardevSocket, 1); qemu_chr_parse_common(opts, qapi_ChardevSocket_base(sock)); sock->has_nodelay = true; sock->nodelay = do_nodelay; sock->has_server = true; sock->server = is_listen; sock->has_telnet = true; sock->telnet = is_telnet; sock->has_tn3270 = true; sock->tn3270 = is_tn3270; sock->has_wait = true; sock->wait = is_waitconnect; sock->has_reconnect = true; sock->reconnect = reconnect; sock->tls_creds = g_strdup(tls_creds); addr = g_new0(SocketAddress, 1); if (path) { UnixSocketAddress *q_unix; addr->type = SOCKET_ADDRESS_KIND_UNIX; q_unix = addr->u.q_unix.data = g_new0(UnixSocketAddress, 1); q_unix->path = g_strdup(path); } else { addr->type = SOCKET_ADDRESS_KIND_INET; addr->u.inet.data = g_new(InetSocketAddress, 1); *addr->u.inet.data = (InetSocketAddress) { .host = g_strdup(host), .port = g_strdup(port), .has_to = qemu_opt_get(opts, "to"), .to = qemu_opt_get_number(opts, "to", 0), .has_ipv4 = qemu_opt_get(opts, "ipv4"), .ipv4 = qemu_opt_get_bool(opts, "ipv4", 0), .has_ipv6 = qemu_opt_get(opts, "ipv6"), .ipv6 = qemu_opt_get_bool(opts, "ipv6", 0), }; } sock->addr = addr; }


void ppc_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr) { tcg_insn_unit i1, i2; uint64_t pair; intptr_t diff = addr - jmp_addr; if (in_range_b(diff)) { i1 = B | (diff & 0x3fffffc); i2 = NOP; } else if (USE_REG_RA) { intptr_t lo, hi; diff = addr - (uintptr_t)tb_ret_addr; lo = (int16_t)diff; hi = (int32_t)(diff - lo); assert(diff == hi + lo); i1 = ADDIS | TAI(TCG_REG_TMP1, TCG_REG_RA, hi >> 16); i2 = ADDI | TAI(TCG_REG_TMP1, TCG_REG_TMP1, lo); } else { assert(TCG_TARGET_REG_BITS == 32 || addr == (int32_t)addr); i1 = ADDIS | TAI(TCG_REG_TMP1, 0, addr >> 16); i2 = ORI | SAI(TCG_REG_TMP1, TCG_REG_TMP1, addr); } #ifdef HOST_WORDS_BIGENDIAN pair = (uint64_t)i1 << 32 | i2; #else pair = (uint64_t)i2 << 32 | i1; #endif /* ??? __atomic_store_8, presuming there's some way to do that for 32-bit, otherwise this is good enough for 64-bit. */ *(uint64_t *)jmp_addr = pair; flush_icache_range(jmp_addr, jmp_addr + 8); }


int qcow2_update_header(BlockDriverState *bs) { BDRVQcowState *s = bs->opaque; QCowHeader *header; char *buf; size_t buflen = s->cluster_size; int ret; uint64_t total_size; uint32_t refcount_table_clusters; size_t header_length; Qcow2UnknownHeaderExtension *uext; buf = qemu_blockalign(bs, buflen); /* Header structure */ header = (QCowHeader*) buf; if (buflen < sizeof(*header)) { ret = -ENOSPC; goto fail; } header_length = sizeof(*header) + s->unknown_header_fields_size; total_size = bs->total_sectors * BDRV_SECTOR_SIZE; refcount_table_clusters = s->refcount_table_size >> (s->cluster_bits - 3); *header = (QCowHeader) { /* Version 2 fields */ .magic = cpu_to_be32(QCOW_MAGIC), .version = cpu_to_be32(s->qcow_version), .backing_file_offset = 0, .backing_file_size = 0, .cluster_bits = cpu_to_be32(s->cluster_bits), .size = cpu_to_be64(total_size), .crypt_method = cpu_to_be32(s->crypt_method_header), .l1_size = cpu_to_be32(s->l1_size), .l1_table_offset = cpu_to_be64(s->l1_table_offset), .refcount_table_offset = cpu_to_be64(s->refcount_table_offset), .refcount_table_clusters = cpu_to_be32(refcount_table_clusters), .nb_snapshots = cpu_to_be32(s->nb_snapshots), .snapshots_offset = cpu_to_be64(s->snapshots_offset), /* Version 3 fields */ .incompatible_features = cpu_to_be64(s->incompatible_features), .compatible_features = cpu_to_be64(s->compatible_features), .autoclear_features = cpu_to_be64(s->autoclear_features), .refcount_order = cpu_to_be32(s->refcount_order), .header_length = cpu_to_be32(header_length), }; /* For older versions, write a shorter header */ switch (s->qcow_version) { case 2: ret = offsetof(QCowHeader, incompatible_features); break; case 3: ret = sizeof(*header); break; default: ret = -EINVAL; goto fail; } buf += ret; buflen -= ret; memset(buf, 0, buflen); /* Preserve any unknown field in the header */ if (s->unknown_header_fields_size) { if (buflen < s->unknown_header_fields_size) { ret = -ENOSPC; goto fail; } memcpy(buf, s->unknown_header_fields, s->unknown_header_fields_size); buf += s->unknown_header_fields_size; buflen -= s->unknown_header_fields_size; } /* Backing file format header extension */ if (*bs->backing_format) { ret = header_ext_add(buf, QCOW2_EXT_MAGIC_BACKING_FORMAT, bs->backing_format, strlen(bs->backing_format), buflen); if (ret < 0) { goto fail; } buf += ret; buflen -= ret; } /* Feature table */ Qcow2Feature features[] = { { .type = QCOW2_FEAT_TYPE_INCOMPATIBLE, .bit = QCOW2_INCOMPAT_DIRTY_BITNR, .name = "dirty bit", }, { .type = QCOW2_FEAT_TYPE_INCOMPATIBLE, .bit = QCOW2_INCOMPAT_CORRUPT_BITNR, .name = "corrupt bit", }, { .type = QCOW2_FEAT_TYPE_COMPATIBLE, .bit = QCOW2_COMPAT_LAZY_REFCOUNTS_BITNR, .name = "lazy refcounts", }, }; ret = header_ext_add(buf, QCOW2_EXT_MAGIC_FEATURE_TABLE, features, sizeof(features), buflen); if (ret < 0) { goto fail; } buf += ret; buflen -= ret; /* Keep unknown header extensions */ QLIST_FOREACH(uext, &s->unknown_header_ext, next) { ret = header_ext_add(buf, uext->magic, uext->data, uext->len, buflen); if (ret < 0) { goto fail; } buf += ret; buflen -= ret; } /* End of header extensions */ ret = header_ext_add(buf, QCOW2_EXT_MAGIC_END, NULL, 0, buflen); if (ret < 0) { goto fail; } buf += ret; buflen -= ret; /* Backing file name */ if (*bs->backing_file) { size_t backing_file_len = strlen(bs->backing_file); if (buflen < backing_file_len) { ret = -ENOSPC; goto fail; } /* Using strncpy is ok here, since buf is not NUL-terminated. */ strncpy(buf, bs->backing_file, buflen); header->backing_file_offset = cpu_to_be64(buf - ((char*) header)); header->backing_file_size = cpu_to_be32(backing_file_len); } /* Write the new header */ ret = bdrv_pwrite(bs->file, 0, header, s->cluster_size); if (ret < 0) { goto fail; } ret = 0; fail: qemu_vfree(header); return ret; }


static void gd_update_cursor(GtkDisplayState *s, gboolean override) { GdkWindow *window; bool on_vga; window = gtk_widget_get_window(GTK_WIDGET(s->drawing_area)); on_vga = (gtk_notebook_get_current_page(GTK_NOTEBOOK(s->notebook)) == 0); if ((override || on_vga) && kbd_mouse_is_absolute()) { gdk_window_set_cursor(window, s->null_cursor); } else { gdk_window_set_cursor(window, NULL); } }


static int load_input_picture(MpegEncContext *s, const AVFrame *pic_arg) { Picture *pic = NULL; int64_t pts; int i, display_picture_number = 0, ret; const int encoding_delay = s->max_b_frames ? s->max_b_frames : (s->low_delay ? 0 : 1); int direct = 1; if (pic_arg) { pts = pic_arg->pts; display_picture_number = s->input_picture_number++; if (pts != AV_NOPTS_VALUE) { if (s->user_specified_pts != AV_NOPTS_VALUE) { int64_t time = pts; int64_t last = s->user_specified_pts; if (time <= last) { av_log(s->avctx, AV_LOG_ERROR, "Error, Invalid timestamp=%"PRId64", " "last=%"PRId64"\n", pts, s->user_specified_pts); return -1; } if (!s->low_delay && display_picture_number == 1) s->dts_delta = time - last; } s->user_specified_pts = pts; } else { if (s->user_specified_pts != AV_NOPTS_VALUE) { s->user_specified_pts = pts = s->user_specified_pts + 1; av_log(s->avctx, AV_LOG_INFO, "Warning: AVFrame.pts=? trying to guess (%"PRId64")\n", pts); } else { pts = display_picture_number; } } } if (pic_arg) { if (!pic_arg->buf[0]) direct = 0; if (pic_arg->linesize[0] != s->linesize) direct = 0; if (pic_arg->linesize[1] != s->uvlinesize) direct = 0; if (pic_arg->linesize[2] != s->uvlinesize) direct = 0; av_dlog(s->avctx, "%d %d %d %d\n", pic_arg->linesize[0], pic_arg->linesize[1], s->linesize, s->uvlinesize); if (direct) { i = ff_find_unused_picture(s, 1); if (i < 0) return i; pic = &s->picture[i]; pic->reference = 3; if ((ret = av_frame_ref(&pic->f, pic_arg)) < 0) return ret; if (ff_alloc_picture(s, pic, 1) < 0) { return -1; } } else { i = ff_find_unused_picture(s, 0); if (i < 0) return i; pic = &s->picture[i]; pic->reference = 3; if (ff_alloc_picture(s, pic, 0) < 0) { return -1; } if (pic->f.data[0] + INPLACE_OFFSET == pic_arg->data[0] && pic->f.data[1] + INPLACE_OFFSET == pic_arg->data[1] && pic->f.data[2] + INPLACE_OFFSET == pic_arg->data[2]) { // empty } else { int h_chroma_shift, v_chroma_shift; av_pix_fmt_get_chroma_sub_sample(s->avctx->pix_fmt, &h_chroma_shift, &v_chroma_shift); for (i = 0; i < 3; i++) { int src_stride = pic_arg->linesize[i]; int dst_stride = i ? s->uvlinesize : s->linesize; int h_shift = i ? h_chroma_shift : 0; int v_shift = i ? v_chroma_shift : 0; int w = s->width >> h_shift; int h = s->height >> v_shift; uint8_t *src = pic_arg->data[i]; uint8_t *dst = pic->f.data[i]; if (s->codec_id == AV_CODEC_ID_AMV && !(s->avctx->flags & CODEC_FLAG_EMU_EDGE)) { h = ((s->height + 15)/16*16) >> v_shift; } if (!s->avctx->rc_buffer_size) dst += INPLACE_OFFSET; if (src_stride == dst_stride) memcpy(dst, src, src_stride * h); else { int h2 = h; uint8_t *dst2 = dst; while (h2--) { memcpy(dst2, src, w); dst2 += dst_stride; src += src_stride; } } if ((s->width & 15) || (s->height & 15)) { s->dsp.draw_edges(dst, dst_stride, w, h, 16>>h_shift, 16>>v_shift, EDGE_BOTTOM); } } } } copy_picture_attributes(s, &pic->f, pic_arg); pic->f.display_picture_number = display_picture_number; pic->f.pts = pts; // we set this here to avoid modifiying pic_arg } /* shift buffer entries */ for (i = 1; i < MAX_PICTURE_COUNT /*s->encoding_delay + 1*/; i++) s->input_picture[i - 1] = s->input_picture[i]; s->input_picture[encoding_delay] = (Picture*) pic; return 0; }


static void pc_i440fx_2_4_machine_options(MachineClass *m) { PCMachineClass *pcmc = PC_MACHINE_CLASS(m); pc_i440fx_2_5_machine_options(m); m->alias = NULL; m->is_default = 0; pcmc->broken_reserved_end = true; pcmc->inter_dimm_gap = false; SET_MACHINE_COMPAT(m, PC_COMPAT_2_4); }


static int vc1_decode_frame(AVCodecContext *avctx, void *data, int *data_size, AVPacket *avpkt) { const uint8_t *buf = avpkt->data; int buf_size = avpkt->size, n_slices = 0, i; VC1Context *v = avctx->priv_data; MpegEncContext *s = &v->s; AVFrame *pict = data; uint8_t *buf2 = NULL; const uint8_t *buf_start = buf, *buf_start_second_field = NULL; int mb_height, n_slices1=-1; struct { uint8_t *buf; GetBitContext gb; int mby_start; } *slices = NULL, *tmp; v->second_field = 0; if(s->flags & CODEC_FLAG_LOW_DELAY) s->low_delay = 1; /* no supplementary picture */ if (buf_size == 0 || (buf_size == 4 && AV_RB32(buf) == VC1_CODE_ENDOFSEQ)) { /* special case for last picture */ if (s->low_delay == 0 && s->next_picture_ptr) { *pict = s->next_picture_ptr->f; s->next_picture_ptr = NULL; *data_size = sizeof(AVFrame); return buf_size; if (s->avctx->codec->capabilities&CODEC_CAP_HWACCEL_VDPAU) { if (v->profile < PROFILE_ADVANCED) avctx->pix_fmt = AV_PIX_FMT_VDPAU_WMV3; else avctx->pix_fmt = AV_PIX_FMT_VDPAU_VC1; //for advanced profile we may need to parse and unescape data if (avctx->codec_id == AV_CODEC_ID_VC1 || avctx->codec_id == AV_CODEC_ID_VC1IMAGE) { int buf_size2 = 0; buf2 = av_mallocz(buf_size + FF_INPUT_BUFFER_PADDING_SIZE); if (IS_MARKER(AV_RB32(buf))) { /* frame starts with marker and needs to be parsed */ const uint8_t *start, *end, *next; int size; next = buf; for (start = buf, end = buf + buf_size; next < end; start = next) { next = find_next_marker(start + 4, end); size = next - start - 4; if (size <= 0) continue; switch (AV_RB32(start)) { case VC1_CODE_FRAME: if (avctx->hwaccel || s->avctx->codec->capabilities&CODEC_CAP_HWACCEL_VDPAU) buf_start = start; buf_size2 = vc1_unescape_buffer(start + 4, size, buf2); break; case VC1_CODE_FIELD: { int buf_size3; if (avctx->hwaccel || s->avctx->codec->capabilities&CODEC_CAP_HWACCEL_VDPAU) buf_start_second_field = start; tmp = av_realloc(slices, sizeof(*slices) * (n_slices+1)); if (!tmp) slices = tmp; slices[n_slices].buf = av_mallocz(buf_size + FF_INPUT_BUFFER_PADDING_SIZE); if (!slices[n_slices].buf) buf_size3 = vc1_unescape_buffer(start + 4, size, slices[n_slices].buf); init_get_bits(&slices[n_slices].gb, slices[n_slices].buf, buf_size3 << 3); /* assuming that the field marker is at the exact middle, hope it's correct */ slices[n_slices].mby_start = s->mb_height >> 1; n_slices1 = n_slices - 1; // index of the last slice of the first field n_slices++; break; case VC1_CODE_ENTRYPOINT: /* it should be before frame data */ buf_size2 = vc1_unescape_buffer(start + 4, size, buf2); init_get_bits(&s->gb, buf2, buf_size2 * 8); ff_vc1_decode_entry_point(avctx, v, &s->gb); break; case VC1_CODE_SLICE: { int buf_size3; tmp = av_realloc(slices, sizeof(*slices) * (n_slices+1)); if (!tmp) slices = tmp; slices[n_slices].buf = av_mallocz(buf_size + FF_INPUT_BUFFER_PADDING_SIZE); if (!slices[n_slices].buf) buf_size3 = vc1_unescape_buffer(start + 4, size, slices[n_slices].buf); init_get_bits(&slices[n_slices].gb, slices[n_slices].buf, buf_size3 << 3); slices[n_slices].mby_start = get_bits(&slices[n_slices].gb, 9); n_slices++; break; } else if (v->interlace && ((buf[0] & 0xC0) == 0xC0)) { /* WVC1 interlaced stores both fields divided by marker */ const uint8_t *divider; int buf_size3; divider = find_next_marker(buf, buf + buf_size); if ((divider == (buf + buf_size)) || AV_RB32(divider) != VC1_CODE_FIELD) { av_log(avctx, AV_LOG_ERROR, "Error in WVC1 interlaced frame\n"); } else { // found field marker, unescape second field if (avctx->hwaccel || s->avctx->codec->capabilities&CODEC_CAP_HWACCEL_VDPAU) buf_start_second_field = divider; tmp = av_realloc(slices, sizeof(*slices) * (n_slices+1)); if (!tmp) slices = tmp; slices[n_slices].buf = av_mallocz(buf_size + FF_INPUT_BUFFER_PADDING_SIZE); if (!slices[n_slices].buf) buf_size3 = vc1_unescape_buffer(divider + 4, buf + buf_size - divider - 4, slices[n_slices].buf); init_get_bits(&slices[n_slices].gb, slices[n_slices].buf, buf_size3 << 3); slices[n_slices].mby_start = s->mb_height >> 1; n_slices1 = n_slices - 1; n_slices++; buf_size2 = vc1_unescape_buffer(buf, divider - buf, buf2); } else { buf_size2 = vc1_unescape_buffer(buf, buf_size, buf2); init_get_bits(&s->gb, buf2, buf_size2*8); } else init_get_bits(&s->gb, buf, buf_size*8); if (v->res_sprite) { v->new_sprite = !get_bits1(&s->gb); v->two_sprites = get_bits1(&s->gb); /* res_sprite means a Windows Media Image stream, AV_CODEC_ID_*IMAGE means we're using the sprite compositor. These are intentionally kept separate so you can get the raw sprites by using the wmv3 decoder for WMVP or the vc1 one for WVP2 */ if (avctx->codec_id == AV_CODEC_ID_WMV3IMAGE || avctx->codec_id == AV_CODEC_ID_VC1IMAGE) { if (v->new_sprite) { // switch AVCodecContext parameters to those of the sprites avctx->width = avctx->coded_width = v->sprite_width; avctx->height = avctx->coded_height = v->sprite_height; } else { goto image; if (s->context_initialized && (s->width != avctx->coded_width || s->height != avctx->coded_height)) { ff_vc1_decode_end(avctx); if (!s->context_initialized) { if (ff_msmpeg4_decode_init(avctx) < 0 || ff_vc1_decode_init_alloc_tables(v) < 0) s->low_delay = !avctx->has_b_frames || v->res_sprite; if (v->profile == PROFILE_ADVANCED) { s->h_edge_pos = avctx->coded_width; s->v_edge_pos = avctx->coded_height; /* We need to set current_picture_ptr before reading the header, * otherwise we cannot store anything in there. */ if (s->current_picture_ptr == NULL || s->current_picture_ptr->f.data[0]) { int i = ff_find_unused_picture(s, 0); if (i < 0) s->current_picture_ptr = &s->picture[i]; // do parse frame header v->pic_header_flag = 0; if (v->profile < PROFILE_ADVANCED) { if (ff_vc1_parse_frame_header(v, &s->gb) < 0) { } else { if (ff_vc1_parse_frame_header_adv(v, &s->gb) < 0) { if (avctx->debug & FF_DEBUG_PICT_INFO) av_log(v->s.avctx, AV_LOG_DEBUG, "pict_type: %c\n", av_get_picture_type_char(s->pict_type)); if ((avctx->codec_id == AV_CODEC_ID_WMV3IMAGE || avctx->codec_id == AV_CODEC_ID_VC1IMAGE) && s->pict_type != AV_PICTURE_TYPE_I) { av_log(v->s.avctx, AV_LOG_ERROR, "Sprite decoder: expected I-frame\n"); // process pulldown flags s->current_picture_ptr->f.repeat_pict = 0; // Pulldown flags are only valid when 'broadcast' has been set. // So ticks_per_frame will be 2 if (v->rff) { // repeat field s->current_picture_ptr->f.repeat_pict = 1; } else if (v->rptfrm) { // repeat frames s->current_picture_ptr->f.repeat_pict = v->rptfrm * 2; // for skipping the frame s->current_picture.f.pict_type = s->pict_type; s->current_picture.f.key_frame = s->pict_type == AV_PICTURE_TYPE_I; /* skip B-frames if we don't have reference frames */ if (s->last_picture_ptr == NULL && (s->pict_type == AV_PICTURE_TYPE_B || s->dropable)) { if ((avctx->skip_frame >= AVDISCARD_NONREF && s->pict_type == AV_PICTURE_TYPE_B) || (avctx->skip_frame >= AVDISCARD_NONKEY && s->pict_type != AV_PICTURE_TYPE_I) || avctx->skip_frame >= AVDISCARD_ALL) { goto end; if (s->next_p_frame_damaged) { if (s->pict_type == AV_PICTURE_TYPE_B) goto end; else s->next_p_frame_damaged = 0; if (ff_MPV_frame_start(s, avctx) < 0) { v->s.current_picture_ptr->f.interlaced_frame = (v->fcm != PROGRESSIVE); v->s.current_picture_ptr->f.top_field_first = v->tff; s->me.qpel_put = s->dsp.put_qpel_pixels_tab; s->me.qpel_avg = s->dsp.avg_qpel_pixels_tab; if ((CONFIG_VC1_VDPAU_DECODER) &&s->avctx->codec->capabilities&CODEC_CAP_HWACCEL_VDPAU) ff_vdpau_vc1_decode_picture(s, buf_start, (buf + buf_size) - buf_start); else if (avctx->hwaccel) { if (v->field_mode && buf_start_second_field) { // decode first field s->picture_structure = PICT_BOTTOM_FIELD - v->tff; if (avctx->hwaccel->start_frame(avctx, buf_start, buf_start_second_field - buf_start) < 0) if (avctx->hwaccel->decode_slice(avctx, buf_start, buf_start_second_field - buf_start) < 0) if (avctx->hwaccel->end_frame(avctx) < 0) // decode second field s->gb = slices[n_slices1 + 1].gb; s->picture_structure = PICT_TOP_FIELD + v->tff; v->second_field = 1; v->pic_header_flag = 0; if (ff_vc1_parse_frame_header_adv(v, &s->gb) < 0) { av_log(avctx, AV_LOG_ERROR, "parsing header for second field failed"); v->s.current_picture_ptr->f.pict_type = v->s.pict_type; if (avctx->hwaccel->start_frame(avctx, buf_start_second_field, (buf + buf_size) - buf_start_second_field) < 0) if (avctx->hwaccel->decode_slice(avctx, buf_start_second_field, (buf + buf_size) - buf_start_second_field) < 0) if (avctx->hwaccel->end_frame(avctx) < 0) } else { s->picture_structure = PICT_FRAME; if (avctx->hwaccel->start_frame(avctx, buf_start, (buf + buf_size) - buf_start) < 0) if (avctx->hwaccel->decode_slice(avctx, buf_start, (buf + buf_size) - buf_start) < 0) if (avctx->hwaccel->end_frame(avctx) < 0) } else { if (v->fcm == ILACE_FRAME && s->pict_type == AV_PICTURE_TYPE_B) goto err; // This codepath is still incomplete thus it is disabled ff_er_frame_start(s); v->bits = buf_size * 8; v->end_mb_x = s->mb_width; if (v->field_mode) { uint8_t *tmp[2]; s->current_picture.f.linesize[0] <<= 1; s->current_picture.f.linesize[1] <<= 1; s->current_picture.f.linesize[2] <<= 1; s->linesize <<= 1; s->uvlinesize <<= 1; tmp[0] = v->mv_f_last[0]; tmp[1] = v->mv_f_last[1]; v->mv_f_last[0] = v->mv_f_next[0]; v->mv_f_last[1] = v->mv_f_next[1]; v->mv_f_next[0] = v->mv_f[0]; v->mv_f_next[1] = v->mv_f[1]; v->mv_f[0] = tmp[0]; v->mv_f[1] = tmp[1]; mb_height = s->mb_height >> v->field_mode; for (i = 0; i <= n_slices; i++) { if (i > 0 && slices[i - 1].mby_start >= mb_height) { if (v->field_mode <= 0) { av_log(v->s.avctx, AV_LOG_ERROR, "Slice %d starts beyond " "picture boundary (%d >= %d)\n", i, slices[i - 1].mby_start, mb_height); continue; v->second_field = 1; v->blocks_off = s->mb_width * s->mb_height << 1; v->mb_off = s->mb_stride * s->mb_height >> 1; } else { v->second_field = 0; v->blocks_off = 0; v->mb_off = 0; if (i) { v->pic_header_flag = 0; if (v->field_mode && i == n_slices1 + 2) { if (ff_vc1_parse_frame_header_adv(v, &s->gb) < 0) { av_log(v->s.avctx, AV_LOG_ERROR, "Field header damaged\n"); continue; } else if (get_bits1(&s->gb)) { v->pic_header_flag = 1; if (ff_vc1_parse_frame_header_adv(v, &s->gb) < 0) { av_log(v->s.avctx, AV_LOG_ERROR, "Slice header damaged\n"); continue; s->start_mb_y = (i == 0) ? 0 : FFMAX(0, slices[i-1].mby_start % mb_height); if (!v->field_mode || v->second_field) s->end_mb_y = (i == n_slices ) ? mb_height : FFMIN(mb_height, slices[i].mby_start % mb_height); else s->end_mb_y = (i <= n_slices1 + 1) ? mb_height : FFMIN(mb_height, slices[i].mby_start % mb_height); if (s->end_mb_y <= s->start_mb_y) { av_log(v->s.avctx, AV_LOG_ERROR, "end mb y %d %d invalid\n", s->end_mb_y, s->start_mb_y); continue; ff_vc1_decode_blocks(v); if (i != n_slices) s->gb = slices[i].gb; if (v->field_mode) { v->second_field = 0; if (s->pict_type == AV_PICTURE_TYPE_B) { memcpy(v->mv_f_base, v->mv_f_next_base, 2 * (s->b8_stride * (s->mb_height * 2 + 1) + s->mb_stride * (s->mb_height + 1) * 2)); s->current_picture.f.linesize[0] >>= 1; s->current_picture.f.linesize[1] >>= 1; s->current_picture.f.linesize[2] >>= 1; s->linesize >>= 1; s->uvlinesize >>= 1; av_dlog(s->avctx, "Consumed %i/%i bits\n", get_bits_count(&s->gb), s->gb.size_in_bits); // if (get_bits_count(&s->gb) > buf_size * 8) // return -1; if(s->error_occurred && s->pict_type == AV_PICTURE_TYPE_B) if(!v->field_mode) ff_er_frame_end(s); ff_MPV_frame_end(s); if (avctx->codec_id == AV_CODEC_ID_WMV3IMAGE || avctx->codec_id == AV_CODEC_ID_VC1IMAGE) { image: avctx->width = avctx->coded_width = v->output_width; avctx->height = avctx->coded_height = v->output_height; if (avctx->skip_frame >= AVDISCARD_NONREF) goto end; #if CONFIG_WMV3IMAGE_DECODER || CONFIG_VC1IMAGE_DECODER if (vc1_decode_sprites(v, &s->gb)) #endif *pict = v->sprite_output_frame; *data_size = sizeof(AVFrame); } else { if (s->pict_type == AV_PICTURE_TYPE_B || s->low_delay) { *pict = s->current_picture_ptr->f; } else if (s->last_picture_ptr != NULL) { *pict = s->last_picture_ptr->f; if (s->last_picture_ptr || s->low_delay) { *data_size = sizeof(AVFrame); ff_print_debug_info(s, pict); end: av_free(buf2); for (i = 0; i < n_slices; i++) av_free(slices[i].buf); av_free(slices); return buf_size; err: av_free(buf2); for (i = 0; i < n_slices; i++) av_free(slices[i].buf); av_free(slices); return -1;


static int local_mknod(FsContext *fs_ctx, V9fsPath *dir_path, const char *name, FsCred *credp) { char *path; int err = -1; int serrno = 0; V9fsString fullname; char *buffer; v9fs_string_init(&fullname); v9fs_string_sprintf(&fullname, "%s/%s", dir_path->data, name); path = fullname.data; /* Determine the security model */ if (fs_ctx->export_flags & V9FS_SM_MAPPED) { buffer = rpath(fs_ctx, path); err = mknod(buffer, SM_LOCAL_MODE_BITS|S_IFREG, 0); if (err == -1) { g_free(buffer); goto out; } err = local_set_xattr(buffer, credp); if (err == -1) { serrno = errno; goto err_end; } } else if (fs_ctx->export_flags & V9FS_SM_MAPPED_FILE) { buffer = rpath(fs_ctx, path); err = mknod(buffer, SM_LOCAL_MODE_BITS|S_IFREG, 0); if (err == -1) { g_free(buffer); goto out; } err = local_set_mapped_file_attr(fs_ctx, path, credp); if (err == -1) { serrno = errno; goto err_end; } } else if ((fs_ctx->export_flags & V9FS_SM_PASSTHROUGH) || (fs_ctx->export_flags & V9FS_SM_NONE)) { buffer = rpath(fs_ctx, path); err = mknod(buffer, credp->fc_mode, credp->fc_rdev); if (err == -1) { g_free(buffer); goto out; } err = local_post_create_passthrough(fs_ctx, path, credp); if (err == -1) { serrno = errno; goto err_end; } } goto out; err_end: remove(buffer); errno = serrno; g_free(buffer); out: v9fs_string_free(&fullname); return err; }


static int flv_set_video_codec(AVFormatContext *s, AVStream *vstream, int flv_codecid) { FLVContext *flv = s->priv_data; AVCodecContext *vcodec = vstream->codec; switch(flv_codecid) { case FLV_CODECID_H263 : vcodec->codec_id = CODEC_ID_FLV1 ; break; case FLV_CODECID_SCREEN: vcodec->codec_id = CODEC_ID_FLASHSV; break; case FLV_CODECID_VP6A : if (!flv->alpha_stream) { AVCodecContext *alpha_codec; flv->alpha_stream = av_new_stream(s, 2); if (flv->alpha_stream) { av_set_pts_info(flv->alpha_stream, 24, 1, 1000); alpha_codec = flv->alpha_stream->codec; alpha_codec->codec_type = CODEC_TYPE_VIDEO; alpha_codec->codec_id = CODEC_ID_VP6F; alpha_codec->extradata_size = 1; alpha_codec->extradata = av_malloc(1); } } case FLV_CODECID_VP6 : vcodec->codec_id = CODEC_ID_VP6F ; if(vcodec->extradata_size != 1) { vcodec->extradata_size = 1; vcodec->extradata = av_malloc(1); } vcodec->extradata[0] = get_byte(&s->pb); if (flv->alpha_stream) flv->alpha_stream->codec->extradata[0] = vcodec->extradata[0]; return 1; // 1 byte body size adjustment for flv_read_packet() default: av_log(s, AV_LOG_INFO, "Unsupported video codec (%x)\n", flv_codecid); vcodec->codec_tag = flv_codecid; } return 0; }


void wdt_ib700_init(void) { watchdog_add_model(&model); timer = qemu_new_timer(vm_clock, ib700_timer_expired, NULL); }


static int sub2video_prepare(InputStream *ist, InputFilter *ifilter) { AVFormatContext *avf = input_files[ist->file_index]->ctx; int i, w, h; /* Compute the size of the canvas for the subtitles stream. If the subtitles codecpar has set a size, use it. Otherwise use the maximum dimensions of the video streams in the same file. */ w = ifilter->width; h = ifilter->height; if (!(w && h)) { for (i = 0; i < avf->nb_streams; i++) { if (avf->streams[i]->codecpar->codec_type == AVMEDIA_TYPE_VIDEO) { w = FFMAX(w, avf->streams[i]->codecpar->width); h = FFMAX(h, avf->streams[i]->codecpar->height); } } if (!(w && h)) { w = FFMAX(w, 720); h = FFMAX(h, 576); } av_log(avf, AV_LOG_INFO, "sub2video: using %dx%d canvas\n", w, h); } ist->sub2video.w = ist->resample_width = w; ist->sub2video.h = ist->resample_height = h; /* rectangles are AV_PIX_FMT_PAL8, but we have no guarantee that the palettes for all rectangles are identical or compatible */ ist->resample_pix_fmt = ifilter->format = AV_PIX_FMT_RGB32; ist->sub2video.frame = av_frame_alloc(); if (!ist->sub2video.frame) return AVERROR(ENOMEM); ist->sub2video.last_pts = INT64_MIN; return 0; }


static int parse_inputs(const char **buf, AVFilterInOut **curr_inputs, AVFilterInOut **open_outputs, AVClass *log_ctx) { int pad = 0; while (**buf == '[') { char *name = parse_link_name(buf, log_ctx); AVFilterInOut *match; if (!name) return -1; /* First check if the label is not in the open_outputs list */ match = extract_inout(name, open_outputs); if (match) { av_free(name); } else { /* Not in the list, so add it as an input */ match = av_mallocz(sizeof(AVFilterInOut)); match->name = name; match->pad_idx = pad; } insert_inout(curr_inputs, match); *buf += strspn(*buf, WHITESPACES); pad++; } return pad; }


static int dnxhd_mb_var_thread(AVCodecContext *avctx, void *arg, int jobnr, int threadnr) { DNXHDEncContext *ctx = avctx->priv_data; int mb_y = jobnr, mb_x; ctx = ctx->thread[threadnr]; if (ctx->cid_table->bit_depth == 8) { uint8_t *pix = ctx->thread[0]->src[0] + ((mb_y<<4) * ctx->m.linesize); for (mb_x = 0; mb_x < ctx->m.mb_width; ++mb_x, pix += 16) { unsigned mb = mb_y * ctx->m.mb_width + mb_x; int sum = ctx->m.dsp.pix_sum(pix, ctx->m.linesize); int varc = (ctx->m.dsp.pix_norm1(pix, ctx->m.linesize) - (((unsigned)(sum*sum))>>8)+128)>>8; ctx->mb_cmp[mb].value = varc; ctx->mb_cmp[mb].mb = mb; } } else { // 10-bit int const linesize = ctx->m.linesize >> 1; for (mb_x = 0; mb_x < ctx->m.mb_width; ++mb_x) { uint16_t *pix = (uint16_t*)ctx->thread[0]->src[0] + ((mb_y << 4) * linesize) + (mb_x << 4); unsigned mb = mb_y * ctx->m.mb_width + mb_x; int sum = 0; int sqsum = 0; int mean, sqmean; int i, j; // Macroblocks are 16x16 pixels, unlike DCT blocks which are 8x8. for (i = 0; i < 16; ++i) { for (j = 0; j < 16; ++j) { // Turn 16-bit pixels into 10-bit ones. int const sample = (unsigned)pix[j] >> 6; sum += sample; sqsum += sample * sample; // 2^10 * 2^10 * 16 * 16 = 2^28, which is less than INT_MAX } pix += linesize; } mean = sum >> 8; // 16*16 == 2^8 sqmean = sqsum >> 8; ctx->mb_cmp[mb].value = sqmean - mean * mean; ctx->mb_cmp[mb].mb = mb; } } return 0; }


static void virtio_blk_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass); dc->exit = virtio_blk_device_exit; dc->props = virtio_blk_properties; set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); vdc->init = virtio_blk_device_init; vdc->get_config = virtio_blk_update_config; vdc->set_config = virtio_blk_set_config; vdc->get_features = virtio_blk_get_features; vdc->set_status = virtio_blk_set_status; vdc->reset = virtio_blk_reset; }


static int cirrus_vga_load(QEMUFile *f, void *opaque, int version_id) { CirrusVGAState *s = opaque; int ret; if (version_id > 2) return -EINVAL; if (s->pci_dev && version_id >= 2) { ret = pci_device_load(s->pci_dev, f); if (ret < 0) return ret; } qemu_get_be32s(f, &s->latch); qemu_get_8s(f, &s->sr_index); qemu_get_buffer(f, s->sr, 256); qemu_get_8s(f, &s->gr_index); qemu_get_8s(f, &s->cirrus_shadow_gr0); qemu_get_8s(f, &s->cirrus_shadow_gr1); s->gr[0x00] = s->cirrus_shadow_gr0 & 0x0f; s->gr[0x01] = s->cirrus_shadow_gr1 & 0x0f; qemu_get_buffer(f, s->gr + 2, 254); qemu_get_8s(f, &s->ar_index); qemu_get_buffer(f, s->ar, 21); s->ar_flip_flop=qemu_get_be32(f); qemu_get_8s(f, &s->cr_index); qemu_get_buffer(f, s->cr, 256); qemu_get_8s(f, &s->msr); qemu_get_8s(f, &s->fcr); qemu_get_8s(f, &s->st00); qemu_get_8s(f, &s->st01); qemu_get_8s(f, &s->dac_state); qemu_get_8s(f, &s->dac_sub_index); qemu_get_8s(f, &s->dac_read_index); qemu_get_8s(f, &s->dac_write_index); qemu_get_buffer(f, s->dac_cache, 3); qemu_get_buffer(f, s->palette, 768); s->bank_offset=qemu_get_be32(f); qemu_get_8s(f, &s->cirrus_hidden_dac_lockindex); qemu_get_8s(f, &s->cirrus_hidden_dac_data); qemu_get_be32s(f, &s->hw_cursor_x); qemu_get_be32s(f, &s->hw_cursor_y); cirrus_update_memory_access(s); /* force refresh */ s->graphic_mode = -1; cirrus_update_bank_ptr(s, 0); cirrus_update_bank_ptr(s, 1); return 0; }


static int ide_dev_initfn(IDEDevice *dev, IDEDriveKind kind) { IDEBus *bus = DO_UPCAST(IDEBus, qbus, dev->qdev.parent_bus); IDEState *s = bus->ifs + dev->unit; Error *err = NULL; if (dev->conf.discard_granularity == -1) { dev->conf.discard_granularity = 512; } else if (dev->conf.discard_granularity && dev->conf.discard_granularity != 512) { error_report("discard_granularity must be 512 for ide"); blkconf_serial(&dev->conf, &dev->serial); if (kind != IDE_CD) { blkconf_geometry(&dev->conf, &dev->chs_trans, 65536, 16, 255, &err); if (err) { error_report("%s", error_get_pretty(err)); error_free(err); if (ide_init_drive(s, dev->conf.blk, kind, dev->version, dev->serial, dev->model, dev->wwn, dev->conf.cyls, dev->conf.heads, dev->conf.secs, dev->chs_trans) < 0) { if (!dev->version) { dev->version = g_strdup(s->version); if (!dev->serial) { dev->serial = g_strdup(s->drive_serial_str); add_boot_device_path(dev->conf.bootindex, &dev->qdev, dev->unit ? "/disk@1" : "/disk@0"); return 0;


static int writer_open(WriterContext **wctx, const Writer *writer, const char *args, const struct section *sections, int nb_sections) { int i, ret = 0; if (!(*wctx = av_malloc(sizeof(WriterContext)))) { ret = AVERROR(ENOMEM); goto fail; } if (!((*wctx)->priv = av_mallocz(writer->priv_size))) { ret = AVERROR(ENOMEM); goto fail; } (*wctx)->class = &writer_class; (*wctx)->writer = writer; (*wctx)->level = -1; (*wctx)->sections = sections; (*wctx)->nb_sections = nb_sections; if (writer->priv_class) { void *priv_ctx = (*wctx)->priv; *((const AVClass **)priv_ctx) = writer->priv_class; av_opt_set_defaults(priv_ctx); if (args && (ret = av_set_options_string(priv_ctx, args, "=", ":")) < 0) goto fail; } for (i = 0; i < SECTION_MAX_NB_LEVELS; i++) av_bprint_init(&(*wctx)->section_pbuf[i], 1, AV_BPRINT_SIZE_UNLIMITED); if ((*wctx)->writer->init) ret = (*wctx)->writer->init(*wctx); if (ret < 0) goto fail; return 0; fail: writer_close(wctx); return ret; }


int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw, int is_user, int is_softmmu) { mmu_ctx_t ctx; int exception = 0, error_code = 0; int access_type; int ret = 0; if (rw == 2) { /* code access */ rw = 0; access_type = ACCESS_CODE; } else { /* data access */ /* XXX: put correct access by using cpu_restore_state() correctly */ access_type = ACCESS_INT; // access_type = env->access_type; } ret = get_physical_address(env, &ctx, address, rw, access_type, 1); if (ret == 0) { ret = tlb_set_page(env, address & TARGET_PAGE_MASK, ctx.raddr & TARGET_PAGE_MASK, ctx.prot, is_user, is_softmmu); } else if (ret < 0) { #if defined (DEBUG_MMU) if (loglevel > 0) cpu_dump_state(env, logfile, fprintf, 0); #endif if (access_type == ACCESS_CODE) { exception = EXCP_ISI; switch (ret) { case -1: /* No matches in page tables or TLB */ if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_6xx)) { exception = EXCP_I_TLBMISS; env->spr[SPR_IMISS] = address; env->spr[SPR_ICMP] = 0x80000000 | ctx.ptem; error_code = 1 << 18; goto tlb_miss; } else if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_4xx)) { /* XXX: TODO */ } else { error_code = 0x40000000; } break; case -2: /* Access rights violation */ error_code = 0x08000000; break; case -3: /* No execute protection violation */ error_code = 0x10000000; break; case -4: /* Direct store exception */ /* No code fetch is allowed in direct-store areas */ error_code = 0x10000000; break; case -5: /* No match in segment table */ exception = EXCP_ISEG; error_code = 0; break; } } else { exception = EXCP_DSI; switch (ret) { case -1: /* No matches in page tables or TLB */ if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_6xx)) { if (rw == 1) { exception = EXCP_DS_TLBMISS; error_code = 1 << 16; } else { exception = EXCP_DL_TLBMISS; error_code = 0; } env->spr[SPR_DMISS] = address; env->spr[SPR_DCMP] = 0x80000000 | ctx.ptem; tlb_miss: error_code |= ctx.key << 19; env->spr[SPR_HASH1] = ctx.pg_addr[0]; env->spr[SPR_HASH2] = ctx.pg_addr[1]; /* Do not alter DAR nor DSISR */ goto out; } else if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_4xx)) { /* XXX: TODO */ } else { error_code = 0x40000000; } break; case -2: /* Access rights violation */ error_code = 0x08000000; break; case -4: /* Direct store exception */ switch (access_type) { case ACCESS_FLOAT: /* Floating point load/store */ exception = EXCP_ALIGN; error_code = EXCP_ALIGN_FP; break; case ACCESS_RES: /* lwarx, ldarx or srwcx. */ error_code = 0x04000000; break; case ACCESS_EXT: /* eciwx or ecowx */ error_code = 0x04100000; break; default: printf("DSI: invalid exception (%d)\n", ret); exception = EXCP_PROGRAM; error_code = EXCP_INVAL | EXCP_INVAL_INVAL; break; } break; case -5: /* No match in segment table */ exception = EXCP_DSEG; error_code = 0; break; } if (exception == EXCP_DSI && rw == 1) error_code |= 0x02000000; /* Store fault address */ env->spr[SPR_DAR] = address; env->spr[SPR_DSISR] = error_code; } out: #if 0 printf("%s: set exception to %d %02x\n", __func__, exception, error_code); #endif env->exception_index = exception; env->error_code = error_code; ret = 1; } return ret; }


static PCIINTxRoute gpex_route_intx_pin_to_irq(void *opaque, int pin) { PCIINTxRoute route; GPEXHost *s = opaque; route.mode = PCI_INTX_ENABLED; route.irq = s->irq_num[pin]; return route; }


static void cuda_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) { CUDAState *s = opaque; addr = (addr >> 9) & 0xf; CUDA_DPRINTF("write: reg=0x%x val=%02x\n", (int)addr, val); switch(addr) { case 0: s->b = val; cuda_update(s); break; case 1: s->a = val; break; case 2: s->dirb = val; break; case 3: s->dira = val; break; case 4: s->timers[0].latch = (s->timers[0].latch & 0xff00) | val; cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock)); break; case 5: s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8); s->ifr &= ~T1_INT; set_counter(s, &s->timers[0], s->timers[0].latch); break; case 6: s->timers[0].latch = (s->timers[0].latch & 0xff00) | val; cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock)); break; case 7: s->timers[0].latch = (s->timers[0].latch & 0xff) | (val << 8); s->ifr &= ~T1_INT; cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock)); break; case 8: s->timers[1].latch = val; set_counter(s, &s->timers[1], val); break; case 9: set_counter(s, &s->timers[1], (val << 8) | s->timers[1].latch); break; case 10: s->sr = val; break; case 11: s->acr = val; cuda_timer_update(s, &s->timers[0], qemu_get_clock_ns(vm_clock)); cuda_update(s); break; case 12: s->pcr = val; break; case 13: /* reset bits */ s->ifr &= ~val; cuda_update_irq(s); break; case 14: if (val & IER_SET) { /* set bits */ s->ier |= val & 0x7f; } else { /* reset bits */ s->ier &= ~val; } cuda_update_irq(s); break; default: case 15: s->anh = val; break; } }


int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t offset, uint8_t size, Error **errp) { uint8_t *config; int i, overlapping_cap; if (!offset) { offset = pci_find_space(pdev, size); /* out of PCI config space is programming error */ assert(offset); } else { /* Verify that capabilities don't overlap. Note: device assignment * depends on this check to verify that the device is not broken. * Should never trigger for emulated devices, but it's helpful * for debugging these. */ for (i = offset; i < offset + size; i++) { overlapping_cap = pci_find_capability_at_offset(pdev, i); if (overlapping_cap) { error_setg(errp, "%s:%02x:%02x.%x " "Attempt to add PCI capability %x at offset " "%x overlaps existing capability %x at offset %x", pci_root_bus_path(pdev), pci_bus_num(pdev->bus), PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), cap_id, offset, overlapping_cap, i); return -EINVAL; } } } config = pdev->config + offset; config[PCI_CAP_LIST_ID] = cap_id; config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST]; pdev->config[PCI_CAPABILITY_LIST] = offset; pdev->config[PCI_STATUS] |= PCI_STATUS_CAP_LIST; memset(pdev->used + offset, 0xFF, QEMU_ALIGN_UP(size, 4)); /* Make capability read-only by default */ memset(pdev->wmask + offset, 0, size); /* Check capability by default */ memset(pdev->cmask + offset, 0xFF, size); return offset; }


void hmp_info_migrate_parameters(Monitor *mon, const QDict *qdict) { MigrationParameters *params; params = qmp_query_migrate_parameters(NULL); if (params) { assert(params->has_compress_level); monitor_printf(mon, "%s: %" PRId64 "\n", MigrationParameter_str(MIGRATION_PARAMETER_COMPRESS_LEVEL), params->compress_level); assert(params->has_compress_threads); monitor_printf(mon, "%s: %" PRId64 "\n", MigrationParameter_str(MIGRATION_PARAMETER_COMPRESS_THREADS), params->compress_threads); assert(params->has_decompress_threads); monitor_printf(mon, "%s: %" PRId64 "\n", MigrationParameter_str(MIGRATION_PARAMETER_DECOMPRESS_THREADS), params->decompress_threads); assert(params->has_cpu_throttle_initial); monitor_printf(mon, "%s: %" PRId64 "\n", MigrationParameter_str(MIGRATION_PARAMETER_CPU_THROTTLE_INITIAL), params->cpu_throttle_initial); assert(params->has_cpu_throttle_increment); monitor_printf(mon, "%s: %" PRId64 "\n", MigrationParameter_str(MIGRATION_PARAMETER_CPU_THROTTLE_INCREMENT), params->cpu_throttle_increment); assert(params->has_tls_creds); monitor_printf(mon, "%s: '%s'\n", MigrationParameter_str(MIGRATION_PARAMETER_TLS_CREDS), params->tls_creds); assert(params->has_tls_hostname); monitor_printf(mon, "%s: '%s'\n", MigrationParameter_str(MIGRATION_PARAMETER_TLS_HOSTNAME), params->tls_hostname); assert(params->has_max_bandwidth); monitor_printf(mon, "%s: %" PRId64 " bytes/second\n", MigrationParameter_str(MIGRATION_PARAMETER_MAX_BANDWIDTH), params->max_bandwidth); assert(params->has_downtime_limit); monitor_printf(mon, "%s: %" PRId64 " milliseconds\n", MigrationParameter_str(MIGRATION_PARAMETER_DOWNTIME_LIMIT), params->downtime_limit); assert(params->has_x_checkpoint_delay); monitor_printf(mon, "%s: %" PRId64 "\n", MigrationParameter_str(MIGRATION_PARAMETER_X_CHECKPOINT_DELAY), params->x_checkpoint_delay); assert(params->has_block_incremental); monitor_printf(mon, "%s: %s\n", MigrationParameter_str(MIGRATION_PARAMETER_BLOCK_INCREMENTAL), params->block_incremental ? "on" : "off"); monitor_printf(mon, "%s: %" PRId64 "\n", MigrationParameter_str(MIGRATION_PARAMETER_X_MULTIFD_CHANNELS), params->x_multifd_channels); monitor_printf(mon, "%s: %" PRId64 "\n", MigrationParameter_str(MIGRATION_PARAMETER_X_MULTIFD_PAGE_COUNT), params->x_multifd_page_count); monitor_printf(mon, "%s: %" PRId64 "\n", MigrationParameter_str(MIGRATION_PARAMETER_XBZRLE_CACHE_SIZE), params->xbzrle_cache_size); } qapi_free_MigrationParameters(params); }


static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) { PXBDev *pxb = convert_to_pxb(dev); DeviceState *ds, *bds = NULL; PCIBus *bus; const char *dev_name = NULL; Error *local_err = NULL; if (pxb->numa_node != NUMA_NODE_UNASSIGNED && pxb->numa_node >= nb_numa_nodes) { error_setg(errp, "Illegal numa node %d", pxb->numa_node); return; } if (dev->qdev.id && *dev->qdev.id) { dev_name = dev->qdev.id; } ds = qdev_create(NULL, TYPE_PXB_HOST); if (pcie) { bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS); } else { bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS); bds = qdev_create(BUS(bus), "pci-bridge"); bds->id = dev_name; qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr); qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false); } bus->parent_dev = dev; bus->address_space_mem = dev->bus->address_space_mem; bus->address_space_io = dev->bus->address_space_io; bus->map_irq = pxb_map_irq_fn; PCI_HOST_BRIDGE(ds)->bus = bus; pxb_register_bus(dev, bus, &local_err); if (local_err) { error_propagate(errp, local_err); goto err_register_bus; } qdev_init_nofail(ds); if (bds) { qdev_init_nofail(bds); } pci_word_test_and_set_mask(dev->config + PCI_STATUS, PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_HOST); pxb_dev_list = g_list_insert_sorted(pxb_dev_list, pxb, pxb_compare); return; err_register_bus: object_unref(OBJECT(bds)); object_unparent(OBJECT(bus)); object_unref(OBJECT(ds)); }


int qemu_read_config_file(const char *filename) { FILE *f = fopen(filename, "r"); int ret; if (f == NULL) { return -errno; } ret = qemu_config_parse(f, vm_config_groups, filename); fclose(f); if (ret == 0) { return 0; } else { return -EINVAL; } }


SocketAddress *socket_parse(const char *str, Error **errp) { SocketAddress *addr; addr = g_new0(SocketAddress, 1); if (strstart(str, "unix:", NULL)) { if (str[5] == '\0') { error_setg(errp, "invalid Unix socket address"); goto fail; } else { addr->type = SOCKET_ADDRESS_KIND_UNIX; addr->u.q_unix.data = g_new(UnixSocketAddress, 1); addr->u.q_unix.data->path = g_strdup(str + 5); } } else if (strstart(str, "fd:", NULL)) { if (str[3] == '\0') { error_setg(errp, "invalid file descriptor address"); goto fail; } else { addr->type = SOCKET_ADDRESS_KIND_FD; addr->u.fd.data = g_new(String, 1); addr->u.fd.data->str = g_strdup(str + 3); } } else if (strstart(str, "vsock:", NULL)) { addr->type = SOCKET_ADDRESS_KIND_VSOCK; addr->u.vsock.data = g_new(VsockSocketAddress, 1); if (vsock_parse(addr->u.vsock.data, str + strlen("vsock:"), errp)) { goto fail; } } else { addr->type = SOCKET_ADDRESS_KIND_INET; addr->u.inet.data = g_new(InetSocketAddress, 1); if (inet_parse(addr->u.inet.data, str, errp)) { goto fail; } } return addr; fail: qapi_free_SocketAddress(addr); return NULL; }